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authorKen Ma <make@marvell.com>2017-04-26 19:14:36 +0800
committerHua Jing <jinghua@marvell.com>2017-04-28 09:14:36 +0300
commit4498ee77016a658c7acb12314439151e92b0b9f4 (patch)
tree5dfaf7045145c14ecee30ba8e566cac2253c97da
parentb771205b24351039fb294f43d29e86a4f60b958a (diff)
fix: cpu-win: a3700: remove remap function for cpu dram windows of 4GB
- When dram size is 4GB, there are 4 cpu dram windows, the number 4 exceeds the limit of io decode windows number, so in this case, only one io decode window whose size is 4GB is used for dram; - In order to have the same view on dram for cpu and ios, cpu dram window must not use remap function, this patch removes remap function for cpu dram windows. Change-Id: I328b7338ee464935917c80857be208c40369d4ba Signed-off-by: Ken Ma <make@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/38925 Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Hua Jing <jinghua@marvell.com>
-rw-r--r--plat/marvell/a3700/common/dram_win.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/plat/marvell/a3700/common/dram_win.c b/plat/marvell/a3700/common/dram_win.c
index 24439ce0..6062ec9c 100644
--- a/plat/marvell/a3700/common/dram_win.c
+++ b/plat/marvell/a3700/common/dram_win.c
@@ -136,7 +136,7 @@ struct cpu_win_configuration mv_cpu_wins[CPU_WIN_CONFIG_MAX][MV_CPU_WIN_NUM] = {
{CPU_WIN_ENABLED, CPU_WIN_TARGET_DRAM, 0x0, 0x80000000, 0x0},
{CPU_WIN_ENABLED, CPU_WIN_TARGET_DRAM, 0x80000000, 0x40000000, 0x80000000},
{CPU_WIN_ENABLED, CPU_WIN_TARGET_DRAM, 0xc0000000, 0x10000000, 0xc0000000},
- {CPU_WIN_ENABLED, CPU_WIN_TARGET_DRAM, 0xdc200000, 0x20000000, 0xd0000000},
+ {CPU_WIN_ENABLED, CPU_WIN_TARGET_DRAM, 0xdc200000, 0x20000000, 0xdc200000},
{CPU_WIN_ENABLED, CPU_WIN_TARGET_PCIE, 0xd8200000, 0x04000000, 0xd8200000},
},
};