gicv3: marvell: add IRQ state PM support

This patch wrap the ARM GICv3 SPI and PPI irq state PM APIs
for Marvell platform, which are used in suspend and resume
process.
Marvell plat_marvell_gic_irq_save/restore APIs are used to
save and restore SPI irq states.
Marvell plat_marvell_gic_irq_pcpu_save/restore APIs are used
to save and restore per-cpu irq states.

Change-Id: I7a466fef369241b3ce7f727c0c7179ec7023a09e
Signed-off-by: Victor Gu <xigu@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/37431
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Hua Jing <jinghua@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/38077
Tested-by: Hua Jing <jinghua@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/38609

2 files changed, 43 insertions, 4 deletions

diff --git a/include/plat/marvell/common/plat_private.h b/include/plat/marvell/common/plat_private.h
index 60b46813..e4fc033f 100644
--- a/include/plat/marvell/common/plat_private.h
+++ b/include/plat/marvell/common/plat_private.h
@@ -48,5 +48,9 @@ void plat_marvell_gic_init(void);
 void plat_marvell_gic_cpuif_enable(void);
 void plat_marvell_gic_cpuif_disable(void);
 void plat_marvell_gic_pcpu_init(void);
+void plat_marvell_gic_irq_save(void);
+void plat_marvell_gic_irq_restore(void);
+void plat_marvell_gic_irq_pcpu_save(void);
+void plat_marvell_gic_irq_pcpu_restore(void);
 
 #endif /* __PLAT_PRIVATE_H__ */
diff --git a/plat/marvell/common/marvell_gicv3.c b/plat/marvell/common/marvell_gicv3.c
index 8f5f368a..22de15b2 100644
--- a/plat/marvell/common/marvell_gicv3.c
+++ b/plat/marvell/common/marvell_gicv3.c
@@ -117,7 +117,7 @@ void plat_marvell_gic_driver_init(void)
 }
 
 /******************************************************************************
- * ARM common helper to initialize the GIC. Only invoked by BL31
+ * Marvell common helper to initialize the GIC. Only invoked by BL31
  *****************************************************************************/
 void plat_marvell_gic_init(void)
 {
@@ -127,7 +127,7 @@ void plat_marvell_gic_init(void)
 }
 
 /******************************************************************************
- * ARM common helper to enable the GIC CPU interface
+ * Marvell common helper to enable the GIC CPU interface
  *****************************************************************************/
 void plat_marvell_gic_cpuif_enable(void)
 {
@@ -135,7 +135,7 @@ void plat_marvell_gic_cpuif_enable(void)
 }
 
 /******************************************************************************
- * ARM common helper to disable the GIC CPU interface
+ * Marvell common helper to disable the GIC CPU interface
  *****************************************************************************/
 void plat_marvell_gic_cpuif_disable(void)
 {
@@ -143,9 +143,44 @@ void plat_marvell_gic_cpuif_disable(void)
 }
 
 /******************************************************************************
- * ARM common helper to initialize the per-cpu redistributor interface in GICv3
+ * Marvell common helper to initialize the per-cpu redistributor interface in GICv3
  *****************************************************************************/
 void plat_marvell_gic_pcpu_init(void)
 {
 	gicv3_rdistif_init(plat_my_core_pos());
 }
+
+/******************************************************************************
+ * Marvell common helper to save SPI irq states in GICv3
+ *****************************************************************************/
+void plat_marvell_gic_irq_save(void)
+{
+	gicv3_irq_save((uintptr_t)PLAT_MARVELL_GICD_BASE);
+}
+
+/******************************************************************************
+ * Marvell common helper to restore SPI irq states in GICv3
+ *****************************************************************************/
+void plat_marvell_gic_irq_restore(void)
+{
+	gicv3_irq_restore((uintptr_t)PLAT_MARVELL_GICD_BASE);
+}
+
+/******************************************************************************
+ * Marvell common helper to save per-cpu PPI irq states in GICv3
+ *****************************************************************************/
+void plat_marvell_gic_irq_pcpu_save(void)
+{
+	gicv3_irq_pcpu_save(marvell_gic_data.rdistif_base_addrs[plat_my_core_pos()],
+			    plat_my_core_pos());
+}
+
+/******************************************************************************
+ * Marvell common helper to restore per-cpu PPI irq states in GICv3
+ *****************************************************************************/
+void plat_marvell_gic_irq_pcpu_restore(void)
+{
+	gicv3_irq_pcpu_restore(marvell_gic_data.rdistif_base_addrs[plat_my_core_pos()],
+			       plat_my_core_pos());
+}
+