diff options
author | Victor Gu <xigu@marvell.com> | 2017-04-17 14:44:09 +0800 |
---|---|---|
committer | Hua Jing <jinghua@marvell.com> | 2017-04-21 09:44:00 +0300 |
commit | c4e4cd3520c8af609dd66d3eadf7063d2a116771 (patch) | |
tree | 5898d0d9a1d4cef8955b4c389462bb6fb934148a | |
parent | c52deb31bf9526eb3943d6618e5eca1585b871e1 (diff) |
fix: pm: a3700: skip setting gpio wake up bit for PPD and stepdown mode
The GPIO wake up enable registers(0xD0013C18 and 0xD0013C1C) are used
to enable the GPIO pin to wake up the CPU from partial powerdown and
step down mode. According to the suspend to RAM testing, the GPIO
wake up do not need to set it, and there is crash if some of its bits
are set.
This patch removes the setting for GPIO wake up bits.
Change-Id: Iae5ab2aac1fe5b8a4023158d4a4fe763c2723f4c
Signed-off-by: Victor Gu <xigu@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/38683
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Hua Jing <jinghua@marvell.com>
-rw-r--r-- | plat/marvell/a3700/common/plat_pm.c | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/plat/marvell/a3700/common/plat_pm.c b/plat/marvell/a3700/common/plat_pm.c index b8d42fe7..5b2cba17 100644 --- a/plat/marvell/a3700/common/plat_pm.c +++ b/plat/marvell/a3700/common/plat_pm.c @@ -483,16 +483,12 @@ static void a3700_pm_en_nb_gpio(uint32_t gpio) /* NB_CPU_WAKE-up ENABLE GPIO int */ mmio_setbits_32(MVEBU_NB_GPIO_IRQ_EN_HIGH_REG, BIT(gpio - 32)); - /* GPIO wakeup enable inside gpio_int_north */ - mmio_setbits_32(MVEBU_NB_GPIO_IRQ_WK_HIGH_REG, BIT(gpio - 32)); } else { /* GPIO int mask */ mmio_clrbits_32(MVEBU_NB_GPIO_IRQ_MASK_1_REG, BIT(gpio)); /* NB_CPU_WAKE-up ENABLE GPIO int */ mmio_setbits_32(MVEBU_NB_GPIO_IRQ_EN_LOW_REG, BIT(gpio)); - /* GPIO wakeup enable inside gpio_int_north */ - mmio_setbits_32(MVEBU_NB_GPIO_IRQ_WK_LOW_REG, BIT(gpio)); } mmio_setbits_32(MVEBU_NB_STEP_DOWN_INT_EN_REG, MVEBU_NB_GPIO_INT_WAKE_WCPU_CLK); @@ -516,9 +512,6 @@ static void a3700_pm_en_sb_gpio(uint32_t gpio) /* NB_CPU_WAKE-up ENABLE GPIO int */ mmio_setbits_32(MVEBU_SB_GPIO_IRQ_EN_REG, BIT(gpio)); - - /* GPIO wakeup enable inside gpio_int_north */ - mmio_setbits_32(MVEBU_SB_GPIO_IRQ_WK_REG, BIT(gpio)); } int a3700_pm_src_gpio(union pm_wake_up_src_data *src_data) |