platform: Add support for Armada 3900 family

Add platform support files for Marvell Armada 3900 SoC family.

A3900 is repackaged from armada-7040.
    AP - APN806 *1
    CP - CPN-110 *1

RFU:
    - map 0xf900_0000 to mochi endpoint.

IOB:
    - remove PCI-1 0xf700_0000 mapping and reserve it for PCI0/PCI2 io space mapping

Add fetures:
    - Add mochi support

Change-Id: I9f636d2d8fa7354eb62327550d5b9006a43a50dc
Signed-off-by: Kevin Shi <kshi@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/41455
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>

4 files changed, 355 insertions, 0 deletions

diff --git a/plat/marvell/a8k/a3900/board/dram_port.c b/plat/marvell/a8k/a3900/board/dram_port.c
new file mode 100644
index 00000000..628e0e73
--- /dev/null
+++ b/plat/marvell/a8k/a3900/board/dram_port.c
@@ -0,0 +1,106 @@
+/*
+* ***************************************************************************
+* Copyright (C) 2016 Marvell International Ltd.
+* ***************************************************************************
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions are met:
+*
+* Redistributions of source code must retain the above copyright notice, this
+* list of conditions and the following disclaimer.
+*
+* Redistributions in binary form must reproduce the above copyright notice,
+* this list of conditions and the following disclaimer in the documentation
+* and/or other materials provided with the distribution.
+*
+* Neither the name of Marvell nor the names of its contributors may be used
+* to endorse or promote products derived from this software without specific
+* prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
+* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.
+*
+***************************************************************************
+*/
+
+#include <arch_helpers.h>
+#include <plat_marvell.h>
+#include <debug.h>
+#include <dram_if.h>
+
+#include <mv_ddr_atf_wrapper.h>
+#include <apn806/mv_ddr_apn806.h>
+#include <apn806/mv_ddr_apn806_topology.h>
+#include <ddr3_topology_def.h>
+
+struct dram_config dram_cfg;
+
+/*
+ * This function may modify the default DRAM parameters
+ * based on information recieved from SPD or bootloader
+ * configuration located on non volatile storage
+ */
+int update_dram_info(struct dram_config *cfg)
+{
+	NOTICE("Gathering DRAM information\n");
+	return 0;
+}
+
+void *plat_get_dram_data(void)
+{
+	/* Update DRAM for dynamic platforms */
+	update_dram_info(&dram_cfg);
+
+	return &dram_cfg;
+}
+
+/*
+ * This struct provides the DRAM training code with
+ * the appropriate board DRAM configuration
+ */
+static struct mv_ddr_topology_map board_topology_map = {
+/* FIXME: Z0 board 1CS 8Gb x16 devices of micron - 2400P */
+	DEBUG_LEVEL_ERROR,
+	0x1, /* active interfaces */
+	/* cs_mask, mirror, dqs_swap, ck_swap X subphys */
+	{ { { {0x1, 0x0, 0, 0},
+	      {0x1, 0x0, 0, 0},
+	      {0x1, 0x0, 0, 0},
+	      {0x1, 0x0, 0, 0},
+	      {0x1, 0x0, 0, 0},
+	      {0x1, 0x0, 0, 0},
+	      {0x1, 0x0, 0, 0},
+	      {0x1, 0x0, 0, 0},
+	      {0x1, 0x0, 0, 0} },
+	   SPEED_BIN_DDR_2400P,		/* speed_bin */
+	   MV_DDR_DEV_WIDTH_16BIT,	/* sdram device width */
+	   MV_DDR_DIE_CAP_8GBIT,	/* die capacity */
+	   DDR_FREQ_SAR,		/* frequency */
+	   0, 0,			/* cas_l, cas_wl */
+	   MV_DDR_TEMP_LOW} },		/* temperature */
+	BUS_MASK_32BIT,			/* subphys mask */
+	MV_DDR_CFG_DEFAULT,		/* ddr configuration data source */
+	{ {0} },			/* raw spd data */
+	{0}				/* timing parameters */
+};
+
+struct mv_ddr_topology_map *mv_ddr_topology_map_get(void)
+{
+	/* Return the board topology as defined in the board code */
+	return &board_topology_map;
+}
+
+struct dram_config *mv_ddr_dram_config_get(void)
+{
+	/* Return dram configuration as defined in the board code */
+	return &dram_cfg;
+}
diff --git a/plat/marvell/a8k/a3900/board/marvell_plat_config.c b/plat/marvell/a8k/a3900/board/marvell_plat_config.c
new file mode 100644
index 00000000..2b29748e
--- /dev/null
+++ b/plat/marvell/a8k/a3900/board/marvell_plat_config.c
@@ -0,0 +1,171 @@
+/*
+* ***************************************************************************
+* Copyright (C) 2016 Marvell International Ltd.
+* ***************************************************************************
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions are met:
+*
+* Redistributions of source code must retain the above copyright notice, this
+* list of conditions and the following disclaimer.
+*
+* Redistributions in binary form must reproduce the above copyright notice,
+* this list of conditions and the following disclaimer in the documentation
+* and/or other materials provided with the distribution.
+*
+* Neither the name of Marvell nor the names of its contributors may be used
+* to endorse or promote products derived from this software without specific
+* prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
+* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.
+*
+***************************************************************************
+*/
+
+#include <plat_config.h>
+/*
+ * If bootrom is currently at BLE there's no need to include the memory
+ * maps structure at this point
+ */
+#ifndef IMAGE_BLE
+#include <plat_def.h>
+
+/*******************************************************************************
+ * AMB Configuration
+ ******************************************************************************/
+struct amb_win *amb_memory_map;
+
+uintptr_t marvell_get_amb_reg_offs(int cp_index)
+{
+	return MVEBU_AMB_ADEC_BASE(cp_index);
+}
+
+int marvell_get_amb_memory_map(struct amb_win **win, uint32_t *size)
+{
+	*win = amb_memory_map;
+	if (*win == NULL)
+		*size = 0;
+	else
+		*size = sizeof(amb_memory_map)/sizeof(struct amb_win);
+
+	return 0;
+}
+
+/*******************************************************************************
+ * RFU Configuration
+ ******************************************************************************/
+
+struct rfu_win rfu_memory_map[] = {
+	/* SB (MCi0) internal regs */
+	{0x0,	0xf9000000,			0x0,	0x1000000,	MCI_0_TID},
+	/* MCI 0 indirect window */
+	{0x0,	MVEBU_MCI_REG_BASE_REMAP(0),	0x0,	0x100000,	MCI_0_TID},
+	/* MCI 1 indirect window */
+	{0x0,	MVEBU_MCI_REG_BASE_REMAP(1),	0x0,	0x100000,	MCI_1_TID},
+};
+
+
+uintptr_t marvell_get_rfu_reg_offs(void)
+{
+	return MVEBU_RFU_BASE;
+}
+
+int marvell_get_rfu_memory_map(struct rfu_win **win, uint32_t *size)
+{
+	*win = rfu_memory_map;
+	if (*win == NULL)
+		*size = 0;
+	else
+		*size = sizeof(rfu_memory_map)/sizeof(struct rfu_win);
+
+	return 0;
+}
+
+/*******************************************************************************
+ * IOB Configuration
+ ******************************************************************************/
+#define MARVELL_IOB_MAX_WIN	16
+
+struct iob_win iob_memory_map[] = {
+	/* PEX2_X1 window */
+	{0x0,	0xf8000000,	0x0,	0x1000000,	PEX2_TID},
+	/* PEX0_X4 window */
+	{0x0,	0xf6000000,	0x0,	0x1000000,	PEX0_TID},
+};
+
+uintptr_t marvell_get_iob_reg_offs(int cp_index)
+{
+	return MVEBU_IOB_BASE(cp_index);
+}
+
+int marvell_get_iob_max_win(void)
+{
+	return MARVELL_IOB_MAX_WIN;
+}
+
+int marvell_get_iob_memory_map(struct iob_win **win,
+			       uint32_t *size, int cp_index)
+{
+	*win = iob_memory_map;
+	*size = sizeof(iob_memory_map)/sizeof(struct iob_win);
+
+	return 0;
+}
+
+/*******************************************************************************
+ * CCU Configuration
+ ******************************************************************************/
+#define MARVELL_CCU_MAX_WIN	8
+
+struct ccu_win ccu_memory_map[] = {	/* IO window */
+	{0x0,	0xf2000000,	0x0,	0xe000000,	IO_0_TID},
+};
+
+uintptr_t marvell_get_ccu_reg_offs(void)
+{
+	return MVEBU_CCU_BASE;
+}
+
+int marvell_get_ccu_max_win(void)
+{
+	return MARVELL_CCU_MAX_WIN;
+}
+
+int marvell_get_ccu_memory_map(struct ccu_win **win, uint32_t *size)
+{
+	*win = ccu_memory_map;
+	*size = sizeof(ccu_memory_map)/sizeof(struct ccu_win);
+
+	return 0;
+}
+
+/* In reference to #ifndef IMAGE_BLE, this part is used for BLE only. */
+#else
+/*******************************************************************************
+ * SKIP IMAGE Configuration
+ ******************************************************************************/
+
+struct skip_image skip_im = {
+	.detection_method = GPIO,
+	.info.gpio.num = 33,
+	.info.gpio.button_state = HIGH,
+	.info.test.cp_ap = CP,
+	.info.test.cp_index = 0,
+};
+
+void *plat_get_skip_image_data(void)
+{
+	/* Return the skip_image configurations */
+	return &skip_im;
+}
+#endif
diff --git a/plat/marvell/a8k/a3900/plat_def.h b/plat/marvell/a8k/a3900/plat_def.h
new file mode 100644
index 00000000..151b4bd3
--- /dev/null
+++ b/plat/marvell/a8k/a3900/plat_def.h
@@ -0,0 +1,42 @@
+/*
+* ***************************************************************************
+* Copyright (C) 2017 Marvell International Ltd.
+* ***************************************************************************
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions are met:
+*
+* Redistributions of source code must retain the above copyright notice, this
+* list of conditions and the following disclaimer.
+*
+* Redistributions in binary form must reproduce the above copyright notice,
+* this list of conditions and the following disclaimer in the documentation
+* and/or other materials provided with the distribution.
+*
+* Neither the name of Marvell nor the names of its contributors may be used
+* to endorse or promote products derived from this software without specific
+* prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
+* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.
+*
+***************************************************************************
+*/
+
+#ifndef __MVEBU_DEF_H__
+#define __MVEBU_DEF_H__
+
+#include <a8k_plat_def.h>
+
+#define CP_COUNT		1	/* A3900 has single CP0 */
+
+#endif /* __MVEBU_DEF_H__ */
diff --git a/plat/marvell/a8k/a3900/platform.mk b/plat/marvell/a8k/a3900/platform.mk
new file mode 100644
index 00000000..5789a24b
--- /dev/null
+++ b/plat/marvell/a8k/a3900/platform.mk
@@ -0,0 +1,36 @@
+#
+# ***************************************************************************
+# Copyright (C) 2016 Marvell International Ltd.
+# ***************************************************************************
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+# Redistributions of source code must retain the above copyright notice, this
+# list of conditions and the following disclaimer.
+#
+# Redistributions in binary form must reproduce the above copyright notice,
+# this list of conditions and the following disclaimer in the documentation
+# and/or other materials provided with the distribution.
+#
+# Neither the name of Marvell nor the names of its contributors may be used
+# to endorse or promote products derived from this software without specific
+# prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
+# OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+include plat/marvell/a8k/common/a8k_common.mk
+
+include plat/marvell/common/marvell_common.mk