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authorVictor Gu <xigu@marvell.com>2017-06-06 10:05:28 +0800
committerKostya Porotchkin <kostap@marvell.com>2017-06-22 14:21:51 +0300
commit85f0df1c30949b31fa0925ced75f608663822a57 (patch)
tree0251c32a7abc6dcaa38110f70e4382ebcec2c654
parentb182cfca0c19f2842646e4407d4f804ee4906a69 (diff)
a7k: add AMC board support
This patch adds support for ARMADA-7020 AMC board, including DRAM topology and board relevant addressing mapping settings. Change-Id: Icee0c73eddc26e337d676be66cc10a95e3e7cca1 Signed-off-by: Victor Gu <xigu@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/40200 Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Hanna Hawa <hannah@marvell.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
-rw-r--r--plat/marvell/a8k/a70x0_amc/board/dram_port.c106
-rw-r--r--plat/marvell/a8k/a70x0_amc/board/marvell_plat_config.c173
-rw-r--r--plat/marvell/a8k/a70x0_amc/plat_def.h58
-rw-r--r--plat/marvell/a8k/a70x0_amc/platform.mk36
4 files changed, 373 insertions, 0 deletions
diff --git a/plat/marvell/a8k/a70x0_amc/board/dram_port.c b/plat/marvell/a8k/a70x0_amc/board/dram_port.c
new file mode 100644
index 00000000..3bd7eecd
--- /dev/null
+++ b/plat/marvell/a8k/a70x0_amc/board/dram_port.c
@@ -0,0 +1,106 @@
+/*
+ * ***************************************************************************
+ * Copyright (C) 2016 Marvell International Ltd.
+ * ***************************************************************************
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * Neither the name of Marvell nor the names of its contributors may be used
+ * to endorse or promote products derived from this software without specific
+ * prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
+ * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ***************************************************************************
+ */
+
+#include <arch_helpers.h>
+#include <plat_marvell.h>
+#include <debug.h>
+#include <dram_if.h>
+
+#include <mv_ddr_atf_wrapper.h>
+#include <apn806/mv_ddr_apn806.h>
+#include <apn806/mv_ddr_apn806_topology.h>
+#include <ddr3_topology_def.h>
+
+struct dram_config dram_cfg;
+
+/*
+ * This function may modify the default DRAM parameters
+ * based on information recieved from SPD or bootloader
+ * configuration located on non volatile storage
+ */
+int update_dram_info(struct dram_config *cfg)
+{
+ NOTICE("Gathering DRAM information\n");
+ return 0;
+}
+
+void *plat_get_dram_data(void)
+{
+ /* Update DRAM for dynamic platforms */
+ update_dram_info(&dram_cfg);
+
+ return &dram_cfg;
+}
+
+/*
+ * This struct provides the DRAM training code with
+ * the appropriate board DRAM configuration
+ */
+static struct mv_ddr_topology_map board_topology_map = {
+/* FIXME: MISL board 2CS 8Gb x8 devices of micron - 2133P */
+ DEBUG_LEVEL_ERROR,
+ 0x1, /* active interfaces */
+ /* cs_mask, mirror, dqs_swap, ck_swap X subphys */
+ { { { {0x3, 0x2, 0, 0},
+ {0x3, 0x2, 0, 0},
+ {0x3, 0x2, 0, 0},
+ {0x3, 0x2, 0, 0},
+ {0x3, 0x2, 0, 0},
+ {0x3, 0x2, 0, 0},
+ {0x3, 0x2, 0, 0},
+ {0x3, 0x2, 0, 0},
+ {0x3, 0x2, 0, 0} },
+ SPEED_BIN_DDR_2400S, /* speed_bin */
+ MV_DDR_DEV_WIDTH_8BIT, /* sdram device width */
+ MV_DDR_DIE_CAP_8GBIT, /* die capacity */
+ DDR_FREQ_SAR, /* frequency */
+ 0, 0, /* cas_l, cas_wl */
+ MV_DDR_TEMP_LOW} }, /* temperature */
+ MV_DDR_32BIT_ECC_PUP8_BUS_MASK, /* subphys mask */
+ MV_DDR_CFG_DEFAULT, /* ddr configuration data source */
+ { {0} }, /* raw spd data */
+ {0} /* timing parameters */
+};
+
+struct mv_ddr_topology_map *mv_ddr_topology_map_get(void)
+{
+ /* Return the board topology as defined in the board code */
+ return &board_topology_map;
+}
+
+struct dram_config *mv_ddr_dram_config_get(void)
+{
+ /* Return dram configuration as defined in the board code */
+ return &dram_cfg;
+}
diff --git a/plat/marvell/a8k/a70x0_amc/board/marvell_plat_config.c b/plat/marvell/a8k/a70x0_amc/board/marvell_plat_config.c
new file mode 100644
index 00000000..3f9c52af
--- /dev/null
+++ b/plat/marvell/a8k/a70x0_amc/board/marvell_plat_config.c
@@ -0,0 +1,173 @@
+/*
+ * ***************************************************************************
+ * Copyright (C) 2016 Marvell International Ltd.
+ * ***************************************************************************
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * Neither the name of Marvell nor the names of its contributors may be used
+ * to endorse or promote products derived from this software without specific
+ * prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
+ * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ***************************************************************************
+ */
+
+#include <plat_config.h>
+/*
+ * If bootrom is currently at BLE there's no need to include the memory
+ * maps structure at this point
+ */
+#include <plat_def.h>
+#ifndef IMAGE_BLE
+
+/*******************************************************************************
+ * AMB Configuration
+ ******************************************************************************/
+struct amb_win *amb_memory_map;
+
+uintptr_t marvell_get_amb_reg_offs(int cp_index)
+{
+ return MVEBU_AMB_ADEC_BASE(cp_index);
+}
+
+int marvell_get_amb_memory_map(struct amb_win **win, uint32_t *size)
+{
+ *win = amb_memory_map;
+ if (*win == NULL)
+ *size = 0;
+ else
+ *size = sizeof(amb_memory_map)/sizeof(struct amb_win);
+
+ return 0;
+}
+
+/*******************************************************************************
+ * RFU Configuration
+ ******************************************************************************/
+
+struct rfu_win rfu_memory_map[] = {
+ /* MCI 0 indirect window */
+ {0x0, MVEBU_MCI_REG_BASE_REMAP(0), 0x0, 0x100000, MCI_0_TID},
+ /* MCI 1 indirect window */
+ {0x0, MVEBU_MCI_REG_BASE_REMAP(1), 0x0, 0x100000, MCI_1_TID},
+};
+
+
+uintptr_t marvell_get_rfu_reg_offs(void)
+{
+ return MVEBU_RFU_BASE;
+}
+
+int marvell_get_rfu_memory_map(struct rfu_win **win, uint32_t *size)
+{
+ *win = rfu_memory_map;
+ if (*win == NULL)
+ *size = 0;
+ else
+ *size = sizeof(rfu_memory_map)/sizeof(struct rfu_win);
+
+ return 0;
+}
+
+/*******************************************************************************
+ * IOB Configuration
+ ******************************************************************************/
+#define MARVELL_IOB_MAX_WIN 16
+
+struct iob_win iob_memory_map[] = {
+ /* PEX0_X4 window */
+ {0x0, 0xf6000000, 0x0, 0x4000000, PEX0_TID},
+};
+
+uintptr_t marvell_get_iob_reg_offs(int cp_index)
+{
+ return MVEBU_IOB_BASE(cp_index);
+}
+
+int marvell_get_iob_max_win(void)
+{
+ return MARVELL_IOB_MAX_WIN;
+}
+
+int marvell_get_iob_memory_map(struct iob_win **win,
+ uint32_t *size, int cp_index)
+{
+ *win = iob_memory_map;
+ *size = sizeof(iob_memory_map)/sizeof(struct iob_win);
+
+ return 0;
+}
+
+/*******************************************************************************
+ * CCU Configuration
+ ******************************************************************************/
+#define MARVELL_CCU_MAX_WIN 8
+
+struct ccu_win ccu_memory_map[] = {
+ {0x0, 0xf2000000, 0x0, 0xe000000, IO_0_TID}, /* IO window */
+};
+
+uintptr_t marvell_get_ccu_reg_offs(void)
+{
+ return MVEBU_CCU_BASE;
+}
+
+int marvell_get_ccu_max_win(void)
+{
+ return MARVELL_CCU_MAX_WIN;
+}
+
+int marvell_get_ccu_memory_map(struct ccu_win **win, uint32_t *size)
+{
+ *win = ccu_memory_map;
+ *size = sizeof(ccu_memory_map)/sizeof(struct ccu_win);
+
+ return 0;
+}
+
+/* In reference to #ifndef IMAGE_BLE, this part is used for BLE only. */
+#else
+
+struct pci_hw_cfg *plat_get_pcie_hw_data(void)
+{
+ return NULL;
+}
+
+/*******************************************************************************
+ * SKIP IMAGE Configuration
+ ******************************************************************************/
+
+struct skip_image skip_im = {
+ .detection_method = GPIO,
+ .info.gpio.num = 33,
+ .info.gpio.button_state = HIGH,
+ .info.test.cp_ap = CP,
+ .info.test.cp_index = 0,
+};
+
+void *plat_get_skip_image_data(void)
+{
+ /* Return the skip_image configurations */
+ return &skip_im;
+}
+#endif
diff --git a/plat/marvell/a8k/a70x0_amc/plat_def.h b/plat/marvell/a8k/a70x0_amc/plat_def.h
new file mode 100644
index 00000000..6d6a53ec
--- /dev/null
+++ b/plat/marvell/a8k/a70x0_amc/plat_def.h
@@ -0,0 +1,58 @@
+/*
+ * ***************************************************************************
+ * Copyright (C) 2016 Marvell International Ltd.
+ * ***************************************************************************
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * Neither the name of Marvell nor the names of its contributors may be used
+ * to endorse or promote products derived from this software without specific
+ * prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
+ * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ***************************************************************************
+ */
+
+#ifndef __MVEBU_DEF_H__
+#define __MVEBU_DEF_H__
+
+#include <a8k_plat_def.h>
+
+#define CP_COUNT 1 /* A70x0 has single CP0 */
+
+/*************************************************************************
+ * Required platform porting definitions common to all
+ * Mangement Compute SubSystems (MSS)
+ ************************************************************************/
+
+/*
+ * Load address of SCP_BL2
+ * SCP_BL2 is loaded to the same place as BL31.
+ * Once SCP_BL2 is transferred to the SCP,
+ * it is discarded and BL31 is loaded over the top.
+ */
+#ifdef SCP_IMAGE
+#define SCP_BL2_BASE BL31_BASE
+#endif
+
+
+#endif /* __MVEBU_DEF_H__ */
diff --git a/plat/marvell/a8k/a70x0_amc/platform.mk b/plat/marvell/a8k/a70x0_amc/platform.mk
new file mode 100644
index 00000000..5789a24b
--- /dev/null
+++ b/plat/marvell/a8k/a70x0_amc/platform.mk
@@ -0,0 +1,36 @@
+#
+# ***************************************************************************
+# Copyright (C) 2016 Marvell International Ltd.
+# ***************************************************************************
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+# Redistributions of source code must retain the above copyright notice, this
+# list of conditions and the following disclaimer.
+#
+# Redistributions in binary form must reproduce the above copyright notice,
+# this list of conditions and the following disclaimer in the documentation
+# and/or other materials provided with the distribution.
+#
+# Neither the name of Marvell nor the names of its contributors may be used
+# to endorse or promote products derived from this software without specific
+# prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
+# OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+
+include plat/marvell/a8k/common/a8k_common.mk
+
+include plat/marvell/common/marvell_common.mk