diff options
author | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2017-05-02 17:05:08 +0100 |
---|---|---|
committer | Kostya Porotchkin <kostap@marvell.com> | 2017-06-29 12:06:07 +0300 |
commit | a343ad474eca53a6c7e80cb34f33b4362d8922f5 (patch) | |
tree | 4126649f13c71e0a6076440645c689ec28e44aae | |
parent | 51b7b447188428f25921d6b7977bb5177748f2cb (diff) |
plat/marvell/a80x0_cust: reconfigure CP0 PCIx4 windows
In order to allow the use of PCIe cards such as graphics cards, whose
demands for BAR space are typically much higher than those of network
or SATA/USB cards, reconfigure the I/O windows so we can declare two
MMIO PCI regions: a 512 MB MMIO32 one at 0xc000_0000 and a 4 GB MMIO64
one at 0x8_0000_0000. In addition, this will leave ample room for an
ECAM config space at 0xe000_0000 (up to the ECAM maximum of 256 MB)
For compatibility with older kernels or firmware, leave the original
16 MB window in place as well.
Change-Id: I78daec1650ebc28d11e565ec1eceecffdb45c545
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-on: http://vgitil04.il.marvell.com:8080/40788
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
-rw-r--r-- | plat/marvell/a8k/a80x0_mcbin/board/marvell_plat_config.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/plat/marvell/a8k/a80x0_mcbin/board/marvell_plat_config.c b/plat/marvell/a8k/a80x0_mcbin/board/marvell_plat_config.c index ba4eeac1..943943a1 100644 --- a/plat/marvell/a8k/a80x0_mcbin/board/marvell_plat_config.c +++ b/plat/marvell/a8k/a80x0_mcbin/board/marvell_plat_config.c @@ -108,7 +108,9 @@ struct iob_win iob_memory_map_cp0[] = { /* PEX2_X1 window */ {0x0, 0xf8000000, 0x0, 0x1000000, PEX2_TID}, /* PEX0_X4 window */ - {0x0, 0xf6000000, 0x0, 0x1000000, PEX0_TID} + {0x0, 0xf6000000, 0x0, 0x1000000, PEX0_TID}, + {0x0, 0xc0000000, 0x0, 0x30000000, PEX0_TID}, + {0x8, 0x00000000, 0x1, 0x00000000, PEX0_TID}, }; struct iob_win iob_memory_map_cp1[] = { @@ -157,6 +159,8 @@ int marvell_get_iob_memory_map(struct iob_win **win, struct ccu_win ccu_memory_map[] = { {0x0, 0xf2000000, 0x0, 0xe000000, IO_0_TID}, /* IO window */ + {0x0, 0xc0000000, 0x0, 0x30000000, IO_0_TID}, /* IO window */ + {0x8, 0x00000000, 0x1, 0x00000000, IO_0_TID}, /* IO window */ }; uintptr_t marvell_get_ccu_reg_offs(void) |