plat: mvebu: add die parameter for psci_arch_init function

As part of AP810 preparation and driver changes, add die
parameter for psci_arch_init function.
For Armada-8k family and Armada-37xx family, no functional change,
they have single north bridge die (die #0), add die 0 for all
psci_arch_init functions.
Armada-8k-plus family can contain 4 north bridge die, so need
to call psci_arch_init with different die number.

No functional changes introduced by this patch.

Change-Id: I5e334ce5bb75103236c322b389a0bc5e216fbe2a
Signed-off-by: Hanna Hawa <hannah@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/43399
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Hua Jing <jinghua@marvell.com>
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>

6 files changed, 14 insertions, 9 deletions

diff --git a/include/plat/marvell/a3700/common/plat_marvell.h b/include/plat/marvell/a3700/common/plat_marvell.h
index 3ddb52f5..ad516b20 100644
--- a/include/plat/marvell/a3700/common/plat_marvell.h
+++ b/include/plat/marvell/a3700/common/plat_marvell.h
@@ -99,7 +99,7 @@ int marvell_io_is_toc_valid(void);
 /*
  * PSCI functionality
  */
-void psci_arch_init(void);
+void psci_arch_init(int);
 void plat_marvell_system_reset(void);
 
 /*
diff --git a/include/plat/marvell/a8k/common/plat_marvell.h b/include/plat/marvell/a8k/common/plat_marvell.h
index c33c58f1..1798563c 100644
--- a/include/plat/marvell/a8k/common/plat_marvell.h
+++ b/include/plat/marvell/a8k/common/plat_marvell.h
@@ -111,7 +111,7 @@ int marvell_io_is_toc_valid(void);
 /*
  * PSCI functionality
  */
-void psci_arch_init(void);
+void psci_arch_init(int);
 void plat_marvell_system_reset(void);
 
 /*
diff --git a/plat/marvell/a3700/common/plat_pm.c b/plat/marvell/a3700/common/plat_pm.c
index fc0c5ff2..41b7e3a6 100644
--- a/plat/marvell/a3700/common/plat_pm.c
+++ b/plat/marvell/a3700/common/plat_pm.c
@@ -205,7 +205,7 @@ struct wake_up_src_func_map {
 	wake_up_src_func func;
 };
 
-void psci_arch_init(void)
+void psci_arch_init(int die_index)
 {
 	return;
 }
@@ -655,7 +655,7 @@ void a3700_pwr_domain_suspend(const psci_power_state_t *target_state)
 void a3700_pwr_domain_on_finish(const psci_power_state_t *target_state)
 {
 	/* arch specific configuration */
-	psci_arch_init();
+	psci_arch_init(0);
 
 	/* Per-CPU interrupt initialization */
 	plat_marvell_gic_pcpu_init();
@@ -680,7 +680,7 @@ void a3700_pwr_domain_suspend_finish(const psci_power_state_t *target_state)
 	struct dram_win_map dram_wins_map;
 
 	/* arch specific configuration */
-	psci_arch_init();
+	psci_arch_init(0);
 
 	/* Interrupt initialization */
 	plat_marvell_gic_init();
diff --git a/plat/marvell/a8k/common/aarch64/plat_arch_config.c b/plat/marvell/a8k/common/aarch64/plat_arch_config.c
index f042f8c1..47e98bf0 100644
--- a/plat/marvell/a8k/common/aarch64/plat_arch_config.c
+++ b/plat/marvell/a8k/common/aarch64/plat_arch_config.c
@@ -57,7 +57,7 @@ void plat_enable_affinity(void)
 	__asm__ volatile("isb");
 }
 
-void psci_arch_init(void)
+void psci_arch_init(int die_index)
 {
 #if !LLC_DISABLE
 	/* check if LLC is in exclusive mode
diff --git a/plat/marvell/a8k/common/plat_pm.c b/plat/marvell/a8k/common/plat_pm.c
index 525e6b49..f038f4c0 100644
--- a/plat/marvell/a8k/common/plat_pm.c
+++ b/plat/marvell/a8k/common/plat_pm.c
@@ -686,7 +686,7 @@ static void a8k_pwr_domain_suspend(const psci_power_state_t *target_state)
 static void a8k_pwr_domain_on_finish(const psci_power_state_t *target_state)
 {
 	/* arch specific configuration */
-	psci_arch_init();
+	psci_arch_init(0);
 
 	/* Interrupt initialization */
 	gicv2_pcpu_distif_init();
@@ -709,7 +709,7 @@ static void a8k_pwr_domain_suspend_finish(const psci_power_state_t *target_state
 {
 #ifdef SCP_IMAGE
 	/* arch specific configuration */
-	psci_arch_init();
+	psci_arch_init(0);
 
 	/* Interrupt initialization */
 	gicv2_cpuif_enable();
diff --git a/plat/marvell/common/marvell_bl31_setup.c b/plat/marvell/common/marvell_bl31_setup.c
index 02f1be6e..cd3ac06f 100644
--- a/plat/marvell/common/marvell_bl31_setup.c
+++ b/plat/marvell/common/marvell_bl31_setup.c
@@ -227,7 +227,12 @@ void marvell_bl31_platform_setup(void)
 	plat_marvell_gic_driver_init();
 	plat_marvell_gic_init();
 
-	psci_arch_init();
+	/* For Armada-8k-plus family, the SoC includes more than
+	** a single AP die, but the default die that boots is AP #0.
+	** For other families there is only one die (#0).
+	** Initialize psci arch from die 0
+	** */
+	psci_arch_init(0);
 }
 
 /*******************************************************************************