summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorHanna Hawa <hannah@marvell.com>2017-08-28 18:27:16 +0300
committerKostya Porotchkin <kostap@marvell.com>2017-08-29 10:07:15 +0300
commitfbe312d4853c719854683ada88410d1d4d09c832 (patch)
tree623d47666e1d4b2de003a615c048010c913dbf0c
parent9222f3209a9fb3bd3302ee805035fc686df35e21 (diff)
mvebu: io_win: move GCR offset to be defined in platform
As part of AP810 preparation and driver changes, move GCR offset to be defined in platform file and not in IO_WIN driver as AP810 & AP806 have different GCR offset. No functional changes introduced by this patch. Change-Id: Iadb4d7294909fa764bf26aa6b7442bb8a33a9c53 Signed-off-by: Hanna Hawa <hannah@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/43469 Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com> Reviewed-by: Igal Liberman <igall@marvell.com>
-rw-r--r--drivers/marvell/io_win.c3
-rw-r--r--plat/marvell/a8k/common/include/a8k_plat_def.h2
2 files changed, 3 insertions, 2 deletions
diff --git a/drivers/marvell/io_win.c b/drivers/marvell/io_win.c
index a38d1079..ab0b1eaa 100644
--- a/drivers/marvell/io_win.c
+++ b/drivers/marvell/io_win.c
@@ -55,7 +55,6 @@
#define IO_WIN_ALR_OFFSET(win) (io_win_base + 0x0 + (0x10 * win))
#define IO_WIN_AHR_OFFSET(win) (io_win_base + 0x8 + (0x10 * win))
#define IO_WIN_CR_OFFSET(win) (io_win_base + 0xC + (0x10 * win))
-#define IO_WIN_GCR_OFFSET (io_win_base + 0x70)
uintptr_t io_win_base;
@@ -170,7 +169,7 @@ int init_io_win(int ap_index)
/* Get the default target id to set the GCR */
win_reg = marvell_get_io_win_gcr_target(ap_index);
- mmio_write_32(IO_WIN_GCR_OFFSET, win_reg);
+ mmio_write_32(io_win_base + MVEBU_IO_WIN_GCR_OFFSET, win_reg);
/* disable all IO windows */
for (win_id = 0; win_id < IO_WIN_MAX_NUM; win_id++) {
diff --git a/plat/marvell/a8k/common/include/a8k_plat_def.h b/plat/marvell/a8k/common/include/a8k_plat_def.h
index 9d7d3110..dcccbcac 100644
--- a/plat/marvell/a8k/common/include/a8k_plat_def.h
+++ b/plat/marvell/a8k/common/include/a8k_plat_def.h
@@ -50,6 +50,8 @@
#define MVEBU_CP_REGS_BASE(cp_index) (0xF2000000 + (cp_index) * 0x2000000)
#define MVEBU_RFU_BASE (MVEBU_REGS_BASE + 0x6F0000)
#define MVEBU_IO_WIN_BASE (MVEBU_RFU_BASE)
+#define MVEBU_IO_WIN_GCR_OFFSET (0x70)
+
#define MVEBU_CCU_BASE (MVEBU_REGS_BASE + 0x4000)
#define MVEBU_LLC_BASE(ap_index) (MVEBU_REGS_BASE + 0x8000)
#define MVEBU_IOB_BASE(cp_index) (MVEBU_CP_REGS_BASE(cp_index) + \