diff options
| author | Grzegorz Jaszczyk <jaz@semihalf.com> | 2018-04-11 16:39:44 +0200 |
|---|---|---|
| committer | Kostya Porotchkin <kostap@marvell.com> | 2018-04-12 11:33:02 +0300 |
| commit | 736cd6d75540d9e7b7ab1d87d5b4539c65da0f49 (patch) | |
| tree | c083a9861b0cdef8affb663d6a499cc5659116b8 | |
| parent | 8e716e4408d2a3877e988f178350eb72fe218072 (diff) | |
mvebu: cp110: fix settings for the phy and pipe selector
When the pipe selector is configured the phy selector should be cleared
(marked as unconnected) and vice-versa.
Change-Id: Ie5a6eef2f05042dea3a4e7928d506cd5268fc465
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Signed-off-by: Igal Liberman <igall@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/53133
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
| -rw-r--r-- | drivers/marvell/comphy/phy-comphy-cp110.c | 42 |
1 files changed, 26 insertions, 16 deletions
diff --git a/drivers/marvell/comphy/phy-comphy-cp110.c b/drivers/marvell/comphy/phy-comphy-cp110.c index 01f7c6a9..b946cc96 100644 --- a/drivers/marvell/comphy/phy-comphy-cp110.c +++ b/drivers/marvell/comphy/phy-comphy-cp110.c @@ -171,6 +171,22 @@ static inline void reg_set(uintptr_t addr, uint32_t data, uint32_t mask) debug("new val 0x%x\n", mmio_read_32(addr)); } +/* Clear PIPE selector - avoid collision with previous configuration */ +static void mvebu_cp110_comphy_clr_pipe_selector(uint64_t comphy_base, uint8_t comphy_index) +{ + uint32_t reg, mask, field; + uint32_t comphy_offset = COMMON_SELECTOR_COMPHYN_FIELD_WIDTH * comphy_index; + + mask = COMMON_SELECTOR_COMPHY_MASK << comphy_offset; + reg = mmio_read_32(comphy_base + COMMON_SELECTOR_PIPE_REG_OFFSET); + field = reg & mask; + + if (field) { + reg &= ~mask; + mmio_write_32(comphy_base + COMMON_SELECTOR_PIPE_REG_OFFSET, reg); + } +} + /* Clear PHY selector - avoid collision with previous configuration */ static void mvebu_cp110_comphy_clr_phy_selector(uint64_t comphy_base, uint8_t comphy_index) { @@ -200,6 +216,11 @@ static void mvebu_cp110_comphy_set_phy_selector(uint64_t comphy_base, uint32_t comphy_offset = COMMON_SELECTOR_COMPHYN_FIELD_WIDTH * comphy_index; int mode; + /* If phy selector is used the pipe selector should be marked as + * unconnected. + */ + mvebu_cp110_comphy_clr_pipe_selector(comphy_base, comphy_index); + /* Comphy mode (compound of the IO mode and id). Here, only the IO mode * is required to distinguish between SATA and network modes. */ @@ -265,22 +286,6 @@ static void mvebu_cp110_comphy_set_phy_selector(uint64_t comphy_base, mmio_write_32(comphy_base + COMMON_SELECTOR_PHY_REG_OFFSET, reg); } -/* Clear PIPE selector - avoid collision with previous configuration */ -void mvebu_cp110_comphy_clr_pipe_selector(uint64_t comphy_base, uint8_t comphy_index) -{ - uint32_t reg, mask, field; - uint32_t comphy_offset = COMMON_SELECTOR_COMPHYN_FIELD_WIDTH * comphy_index; - - mask = COMMON_SELECTOR_COMPHY_MASK << comphy_offset; - reg = mmio_read_32(comphy_base + COMMON_SELECTOR_PIPE_REG_OFFSET); - field = reg & mask; - - if (field) { - reg &= ~mask; - mmio_write_32(comphy_base + COMMON_SELECTOR_PIPE_REG_OFFSET, reg); - } -} - /* PIPE selector configures for PCIe, USB 3.0 Host, and USB 3.0 Device mode */ static void mvebu_cp110_comphy_set_pipe_selector(uint64_t comphy_base, uint8_t comphy_index, uint32_t comphy_mode) @@ -291,6 +296,11 @@ static void mvebu_cp110_comphy_set_pipe_selector(uint64_t comphy_base, uint32_t mask = COMMON_SELECTOR_COMPHY_MASK << shift; uint32_t pipe_sel = 0x0; + /* If pipe selector is used the phy selector should be marked as + * unconnected. + */ + mvebu_cp110_comphy_clr_phy_selector(comphy_base, comphy_index); + reg = mmio_read_32(comphy_base + COMMON_SELECTOR_PIPE_REG_OFFSET); reg &= ~mask; |