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authorChristine Gharzuzi <chrisg@marvell.com>2018-05-06 15:54:25 +0300
committerKostya Porotchkin <kostap@marvell.com>2018-05-22 18:50:51 +0300
commit7f8cd16d4e1f50c3437b47c15ee771be4a8ef35d (patch)
treef623e0b1fbc6a34d86d317ea8548c24435b04755
parent79e5444c461b230d2e333f5d65291ecf07564557 (diff)
a8k: svc: support A806-CP115 AVS configuration.
- A806-CP115 has a new device_id but same SVC algorithm for AP806-CP110 - This patch integrates the AVS configuration in AP806-CP115 to the existing configuration of AP806-CP110. Change-Id: I722a18606e7cbe236662703009ed87e915217a30 Signed-off-by: Christine Gharzuzi <chrisg@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/54511 Reviewed-by: Kostya Porotchkin <kostap@marvell.com> Tested-by: iSoC Platform CI <ykjenk@marvell.com> (cherry picked from commit ff3c8cd12fbedf67f93bf0d53e61093debc8d5aa) Reviewed-on: http://vgitil04.il.marvell.com:8080/55043 Reviewed-by: Nadav Haklai <nadavh@marvell.com>
-rw-r--r--include/drivers/marvell/mochi/cp110_setup.h2
-rw-r--r--plat/marvell/a8k/common/plat_ble_setup.c10
2 files changed, 8 insertions, 4 deletions
diff --git a/include/drivers/marvell/mochi/cp110_setup.h b/include/drivers/marvell/mochi/cp110_setup.h
index d2882c31..1116e713 100644
--- a/include/drivers/marvell/mochi/cp110_setup.h
+++ b/include/drivers/marvell/mochi/cp110_setup.h
@@ -42,7 +42,9 @@
#define MVEBU_DEVICE_REV_OFFSET (16)
#define MVEBU_DEVICE_REV_MASK (0xf << MVEBU_DEVICE_REV_OFFSET)
#define MVEBU_70X0_DEV_ID (0x7040)
+#define MVEBU_70X0_CP115_DEV_ID (0x7045)
#define MVEBU_80X0_DEV_ID (0x8040)
+#define MVEBU_80X0_CP115_DEV_ID (0x8045)
#define MVEBU_CP110_SA_DEV_ID (0x110)
#define MVEBU_CP110_REF_ID_A1 1
#define MVEBU_CP110_REF_ID_A2 2
diff --git a/plat/marvell/a8k/common/plat_ble_setup.c b/plat/marvell/a8k/common/plat_ble_setup.c
index 100cd268..b681e2e9 100644
--- a/plat/marvell/a8k/common/plat_ble_setup.c
+++ b/plat/marvell/a8k/common/plat_ble_setup.c
@@ -196,11 +196,12 @@ static void ble_plat_avs_config(void)
device_id = cp110_device_id_get(MVEBU_CP_REGS_BASE(0));
switch (device_id) {
case MVEBU_80X0_DEV_ID:
+ case MVEBU_80X0_CP115_DEV_ID:
/* Set the new AVS value - fix the default one on A80x0 */
mmio_write_32(AVS_EN_CTRL_REG, AVS_A8K_CLK_VALUE);
break;
-
case MVEBU_70X0_DEV_ID:
+ case MVEBU_70X0_CP115_DEV_ID:
/* Only fix AVS for CPU clocks lower than 1600MHz on A70x0 */
reg_val = mmio_read_32(MVEBU_AP_SAR_REG_BASE(
FREQ_MODE_AP_SAR_REG_NUM));
@@ -210,7 +211,6 @@ static void ble_plat_avs_config(void)
(reg_val < CPU_DDR_RCLK_INVALID))
mmio_write_32(AVS_EN_CTRL_REG, AVS_A7K_LOW_CLK_VALUE);
break;
-
default:
ERROR("Unsupported Device ID 0x%x\n", device_id);
}
@@ -287,7 +287,8 @@ static void ble_plat_svc_config(void)
single_cluster = (single_cluster >> EFUSE_AP_LD0_CLUSTER_DOWN_OFFS) & 1;
device_id = cp110_device_id_get(MVEBU_CP_REGS_BASE(0));
- if (device_id == MVEBU_80X0_DEV_ID) {
+ if (device_id == MVEBU_80X0_DEV_ID ||
+ device_id == MVEBU_80X0_CP115_DEV_ID) {
/* A8040/A8020 */
NOTICE("SVC: DEV ID: %s, FREQ Mode: 0x%x\n",
single_cluster == 0 ? "8040" : "8020", freq_pidi_mode);
@@ -318,7 +319,8 @@ static void ble_plat_svc_config(void)
avs_workpoint = svc[0];
break;
}
- } else if (device_id == MVEBU_70X0_DEV_ID) {
+ } else if (device_id == MVEBU_70X0_DEV_ID ||
+ device_id == MVEBU_70X0_CP115_DEV_ID) {
/* A7040/A7020/A6040 */
NOTICE("SVC: DEV ID: %s, FREQ Mode: 0x%x\n",
single_cluster == 0 ? "7040" : "7020", freq_pidi_mode);