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authorChristine Gharzuzi <chrisg@marvell.com>2018-03-27 17:08:37 +0300
committerHanna Hawa <hannah@marvell.com>2018-03-28 16:57:38 +0300
commit92dabd8cdf20b3d9d96122f3d868e7bf72072afd (patch)
treed043ee0c1d5b4d027d6bad7dbe2ed87fded06b9f
parentc01252d7cc71eff1e750130d03261aa6e6b68c89 (diff)
Makefile: add compilation flag for ARO mode
- ARO mode is not supported by default anymore in order to use ARO mode a compilation flag is added to Makefile Change-Id: Ie5f542ccbf824c1f30fdfb967ebc05fa41c92f93 Signed-off-by: Christine Gharzuzi <chrisg@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/52648 Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Hanna Hawa <hannah@marvell.com>
-rw-r--r--Makefile1
-rw-r--r--docs/marvell/build.txt2
2 files changed, 3 insertions, 0 deletions
diff --git a/Makefile b/Makefile
index 30b818d1..5f30112e 100644
--- a/Makefile
+++ b/Makefile
@@ -643,6 +643,7 @@ else
$(eval $(call add_define,AARCH64))
endif
$(eval $(call add_define,PALLADIUM))
+$(eval $(call add_define,ARO_ENABLE))
$(eval $(call add_define,LLC_DISABLE))
$(eval $(call add_define,PCI_EP_SUPPORT))
$(eval $(call add_define,CP_NUM))
diff --git a/docs/marvell/build.txt b/docs/marvell/build.txt
index c5a8e16e..0b4be5a9 100644
--- a/docs/marvell/build.txt
+++ b/docs/marvell/build.txt
@@ -114,6 +114,8 @@ Build Instructions
APs, each AP assumed to have 3 attached CPs. With the same amount of APs and CP_NUM=3, the AP0
will have 2 CPs connected and AP1 - a just single CP.
+ - ARO_ENABLE: configure CPU frequency using ARO clock driver (instead of PLL clock driver).
+
For example, in order to build the image in debug mode with log level up to 'notice' level run::
> make DEBUG=1 USE_COHERENT_MEM=0 LOG_LEVEL=20 PLAT=<MARVELL_PLATFORM> all fip