diff options
| author | Hanna Hawa <hannah@marvell.com> | 2018-03-29 15:50:20 +0300 |
|---|---|---|
| committer | Hanna Hawa <hannah@marvell.com> | 2018-03-29 16:59:02 +0300 |
| commit | c697e5b6e8ecbfc9aadbe94e9c532013d68339aa (patch) | |
| tree | e0ac00fe7f5b0ca4bec54b881095617091022b25 | |
| parent | 6ff091d624bd4d0136c8c228646ba3460f22aac4 (diff) | |
fix: ble: ap810: update plat_dram init flow
Issue found when load Dual AP with 2 DDR DIMM per AP
the base address of interface 0 on AP1 is not correct.
Update the DRAM init flow and run mmap_config per interface
to fix the start address of AP1
Change-Id: I767bcca8f9433457c2ebb53f34e4a41ca145c17e
Signed-off-by: Hanna Hawa <hannah@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/52803
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
| -rw-r--r-- | plat/marvell/a8k-p/common/plat_dram.c | 28 |
1 files changed, 17 insertions, 11 deletions
diff --git a/plat/marvell/a8k-p/common/plat_dram.c b/plat/marvell/a8k-p/common/plat_dram.c index d664a363..ea72f692 100644 --- a/plat/marvell/a8k-p/common/plat_dram.c +++ b/plat/marvell/a8k-p/common/plat_dram.c @@ -453,12 +453,23 @@ int plat_dram_init(void) iface_cnt++; /* Update status of interface */ iface->state = MV_DDR_IFACE_RDY; - ap_dram_size += iface->iface_byte_size; - /* If the number of interfaces equal to MAX (enable RAR) */ - if (iface_cnt == DDR_MAX_UNIT_PER_AP) { + } + + if (iface_cnt == DDR_MAX_UNIT_PER_AP) { + ap_dram_tgt = RAR_TID; + } else { + if (iface->id == 1) + ap_dram_tgt = DRAM_1_TID; + else + ap_dram_tgt = DRAM_0_TID; + } + + if (ap_dram_tgt == RAR_TID) { + plat_dram_ap_ifaces_get(ap_id, &iface, &ifaces_size); + for (i = 0; i < ifaces_size; i++, iface++) { + plat_dram_iface_set(iface); VERBOSE("AP-%d set DRAM%d into RAR mode\n", ap_id, i); - ap_dram_tgt = RAR_TID; /* If the base address not 0x0, need to divide ** the base address, the dram region will be ** splited into dual DRAMs @@ -467,14 +478,9 @@ int plat_dram_init(void) /* TODO: add EERATA */ if (iface->id == 1) iface->iface_base_addr |= 1UL << 43; - } else { - if (iface->id == 1) - ap_dram_tgt = DRAM_1_TID; - else - ap_dram_tgt = DRAM_0_TID; + /* Update dram memory mapping */ + dram_mmap_config(); } - /* Update dram memory mapping */ - dram_mmap_config(); } INFO("AP-%d DRAM size is 0x%lx (%lldGB)\n", |