diff options
| author | Christine Gharzuzi <chrisg@marvell.com> | 2018-03-27 17:12:23 +0300 |
|---|---|---|
| committer | Hanna Hawa <hannah@marvell.com> | 2018-03-28 16:58:45 +0300 |
| commit | f63480e41172dc4ef7451205eb644eac9cc14a55 (patch) | |
| tree | 40b5942f96462e26b2ce99fdb61891e304a84964 | |
| parent | 92dabd8cdf20b3d9d96122f3d868e7bf72072afd (diff) | |
clocks: a8k-p: align frequency tables to official values
- update frequency tables to be aligned with the official
tables for ap810
Change-Id: I777f2faaaa461427b24d1ada02540173850d6db8
Signed-off-by: Christine Gharzuzi <chrisg@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/52649
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Hanna Hawa <hannah@marvell.com>
| -rw-r--r-- | plat/marvell/a8k-p/common/ap810_init_clocks.c | 28 |
1 files changed, 14 insertions, 14 deletions
diff --git a/plat/marvell/a8k-p/common/ap810_init_clocks.c b/plat/marvell/a8k-p/common/ap810_init_clocks.c index cc7d30a3..7213643c 100644 --- a/plat/marvell/a8k-p/common/ap810_init_clocks.c +++ b/plat/marvell/a8k-p/common/ap810_init_clocks.c @@ -83,14 +83,14 @@ unsigned int pll_freq_tables[SAR_SUPPORTED_TABLES] PLL_FREQ_1600, PLL_FREQ_1600, TARGET_FREQ_1600, DDR_FREQ_800}, {PLL_FREQ_1200, PLL_FREQ_800, PLL_FREQ_1000, PLL_FREQ_1200, PLL_FREQ_2000, PLL_FREQ_2000, TARGET_FREQ_2000, DDR_FREQ_1200}, - {PLL_FREQ_1400, PLL_FREQ_1000, PLL_FREQ_1000, PLL_FREQ_1200, - PLL_FREQ_2000, PLL_FREQ_2000, TARGET_FREQ_2000, DDR_FREQ_1200}, + {PLL_FREQ_1400, PLL_FREQ_1000, PLL_FREQ_1000, PLL_FREQ_1333, + PLL_FREQ_2000, PLL_FREQ_2000, TARGET_FREQ_2000, DDR_FREQ_1333}, {PLL_FREQ_1400, PLL_FREQ_1000, PLL_FREQ_1000, PLL_FREQ_1200, PLL_FREQ_2200, PLL_FREQ_2200, TARGET_FREQ_2200, DDR_FREQ_1200}, {PLL_FREQ_1400, PLL_FREQ_1000, PLL_FREQ_1000, PLL_FREQ_1333, PLL_FREQ_2200, PLL_FREQ_2200, TARGET_FREQ_2200, DDR_FREQ_1333}, - {PLL_FREQ_1400, PLL_FREQ_1000, PLL_FREQ_1000, PLL_FREQ_1200, - PLL_FREQ_2500, PLL_FREQ_2500, TARGET_FREQ_2500, DDR_FREQ_1200}, + {PLL_FREQ_1400, PLL_FREQ_1000, PLL_FREQ_1000, PLL_FREQ_1333, + PLL_FREQ_2500, PLL_FREQ_2500, TARGET_FREQ_2500, DDR_FREQ_1333}, {PLL_FREQ_1400, PLL_FREQ_1000, PLL_FREQ_1000, PLL_FREQ_1466, PLL_FREQ_2500, PLL_FREQ_2500, TARGET_FREQ_2500, DDR_FREQ_1466}, {PLL_FREQ_1400, PLL_FREQ_1000, PLL_FREQ_1000, PLL_FREQ_1600, @@ -100,20 +100,20 @@ unsigned int pll_freq_tables[SAR_SUPPORTED_TABLES] /* RING, IO, PIDI, DSS, PLL_CLUSTER_0_FREQ, PLL_CLUSTER_2_FREQ, CPU_FREQ */ {PLL_FREQ_800, PLL_FREQ_800, PLL_FREQ_1000, PLL_FREQ_800, PLL_FREQ_1200, PLL_FREQ_1200, TARGET_FREQ_1200, DDR_FREQ_800}, - {PLL_FREQ_1000, PLL_FREQ_800, PLL_FREQ_1000, PLL_FREQ_1200, - PLL_FREQ_1800, PLL_FREQ_1800, TARGET_FREQ_1800, DDR_FREQ_1200}, - {PLL_FREQ_1100, PLL_FREQ_800, PLL_FREQ_1000, PLL_FREQ_1200, - PLL_FREQ_1800, PLL_FREQ_1800, TARGET_FREQ_1800, DDR_FREQ_1200}, + {PLL_FREQ_800, PLL_FREQ_800, PLL_FREQ_1000, PLL_FREQ_1200, + PLL_FREQ_1600, PLL_FREQ_1600, TARGET_FREQ_1600, DDR_FREQ_1200}, + {PLL_FREQ_1200, PLL_FREQ_800, PLL_FREQ_1000, PLL_FREQ_1333, + PLL_FREQ_1600, PLL_FREQ_1600, TARGET_FREQ_1600, DDR_FREQ_1333}, {PLL_FREQ_1200, PLL_FREQ_800, PLL_FREQ_1000, PLL_FREQ_1200, PLL_FREQ_1800, PLL_FREQ_1800, TARGET_FREQ_1800, DDR_FREQ_1200}, - {PLL_FREQ_1400, PLL_FREQ_1000, PLL_FREQ_1000, PLL_FREQ_1200, - PLL_FREQ_1800, PLL_FREQ_1800, TARGET_FREQ_1800, DDR_FREQ_1200}, - {PLL_FREQ_1100, PLL_FREQ_800, PLL_FREQ_1000, PLL_FREQ_1200, - PLL_FREQ_2000, PLL_FREQ_2000, TARGET_FREQ_2000, DDR_FREQ_1200}, + {PLL_FREQ_1300, PLL_FREQ_800, PLL_FREQ_1000, PLL_FREQ_1333, + PLL_FREQ_1800, PLL_FREQ_1800, TARGET_FREQ_1800, DDR_FREQ_1333}, {PLL_FREQ_1200, PLL_FREQ_800, PLL_FREQ_1000, PLL_FREQ_1200, PLL_FREQ_2000, PLL_FREQ_2000, TARGET_FREQ_2000, DDR_FREQ_1200}, - {PLL_FREQ_1300, PLL_FREQ_800, PLL_FREQ_1000, PLL_FREQ_1200, - PLL_FREQ_2000, PLL_FREQ_2000, TARGET_FREQ_2000, DDR_FREQ_1200}, + {PLL_FREQ_1300, PLL_FREQ_800, PLL_FREQ_1000, PLL_FREQ_1333, + PLL_FREQ_2000, PLL_FREQ_2000, TARGET_FREQ_2000, DDR_FREQ_1333}, + {PLL_FREQ_1300, PLL_FREQ_800, PLL_FREQ_1000, PLL_FREQ_1333, + PLL_FREQ_2000, PLL_FREQ_2000, TARGET_FREQ_2000, DDR_FREQ_1333}, }, }; |