plat: marvell: Add board support for A3700 platform

Add support for ARMADA 3700 platform boards

Change-Id: I738ffec301a6c27294067d06b3cd31fc508cfc37
Signed-off-by: Hanna Hawa <hannah@marvell.com>
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/54262

5 files changed, 257 insertions, 0 deletions

diff --git a/Makefile b/Makefile
index 91e48219..e74a4a47 100644
--- a/Makefile
+++ b/Makefile
@@ -538,6 +538,60 @@ ifdef FDT_SOURCES
 NEED_FDT := yes
 endif
 
+ifeq ($(PLAT),a3700)
+#*********** A3700 *************
+DOIMAGEPATH	:= $(WTP)
+DOIMAGETOOL	:= $(DOIMAGEPATH)/wtptp/linux/tbb_linux
+
+ifeq ($(MARVELL_SECURE_BOOT),1)
+DOIMAGE_CFG	:= $(DOIMAGEPATH)/atf-tim.txt
+IMAGESPATH	:= $(DOIMAGEPATH)/tim/trusted
+
+TIMNCFG		:= $(DOIMAGEPATH)/atf-timN.txt
+TIMNSIG		:= $(IMAGESPATH)/timnsign.txt
+TIM2IMGARGS	:= -i $(DOIMAGE_CFG) -n $(TIMNCFG)
+TIMN_IMAGE	:= $$(grep "Image Filename:" -m 1 $(TIMNCFG) | cut -c 17-)
+else #MARVELL_SECURE_BOOT
+DOIMAGE_CFG	:= $(DOIMAGEPATH)/atf-ntim.txt
+IMAGESPATH	:= $(DOIMAGEPATH)/tim/untrusted
+TIM2IMGARGS	:= -i $(DOIMAGE_CFG)
+endif #MARVELL_SECURE_BOOT
+
+TIMBUILD		:= $(DOIMAGEPATH)/script/buildtim.sh
+TIM2IMG			:= $(DOIMAGEPATH)/script/tim2img.pl
+
+# WTMI_IMG is used to specify the customized RTOS image runing over CM3 processor. By default, it
+# points to a baremetal binary of fuse programming in A3700_utils.
+WTMI_IMG		:= $(DOIMAGEPATH)/wtmi/fuse/build/fuse.bin
+
+# WTMI_SYSINIT_IMG is used for the system early initialization, such as AVS settings, clock-tree
+# setup and dynamic DDR PHY training. After the initialization is done, this image will be wiped out
+# from the memory and CM3 will continue with RTOS image or other application.
+WTMI_SYSINIT_IMG	:= $(DOIMAGEPATH)/wtmi/sys_init/build/sys_init.bin
+
+# WTMI_MULTI_IMG is composed of CM3 RTOS image (WTMI_IMG) and sys-init image (WTMI_SYSINIT_IMG).
+WTMI_MULTI_IMG		:= $(DOIMAGEPATH)/wtmi/build/wtmi.bin
+
+WTMI_ENC_IMG		:= $(DOIMAGEPATH)/wtmi/build/wtmi-enc.bin
+BUILD_UART		:= uart-images
+
+SRCPATH			:= $(dir $(BL33))
+
+CLOCKSPRESET		?= CPU_800_DDR_800
+
+DDR_TOPOLOGY		?= 0
+
+BOOTDEV			?= SPINOR
+PARTNUM			?= 0
+
+TIM_IMAGE		:= $$(grep "Image Filename:" -m 1 $(DOIMAGE_CFG) | cut -c 17-)
+TIMBLDARGS		:= $(MARVELL_SECURE_BOOT) $(BOOTDEV) $(IMAGESPATH) $(DOIMAGEPATH) $(CLOCKSPRESET) \
+				$(DDR_TOPOLOGY) $(PARTNUM) $(DEBUG) $(DOIMAGE_CFG) $(TIMNCFG) $(TIMNSIG) 1
+TIMBLDUARTARGS		:= $(MARVELL_SECURE_BOOT) UART $(IMAGESPATH) $(DOIMAGEPATH) $(CLOCKSPRESET) \
+				$(DDR_TOPOLOGY) 0 0 $(DOIMAGE_CFG) $(TIMNCFG) $(TIMNSIG) 0
+DOIMAGE_FLAGS		:= -r $(DOIMAGE_CFG) -v -D
+
+else # PLAT != a3700
 #*********** A8K *************
 DOIMAGEPATH		?=	tools/doimage
 DOIMAGETOOL		?=	${DOIMAGEPATH}/doimage
@@ -578,6 +632,7 @@ endif #MARVELL_SECURE_BOOT
 ROM_BIN_EXT ?= $(BUILD_PLAT)/ble.bin
 DOIMAGE_FLAGS	+= -b $(ROM_BIN_EXT) $(NAND_DOIMAGE_FLAGS) $(DOIMAGE_SEC_FLAGS)
 
+endif # PLAT == a3700
 ################################################################################
 # Build options checks
 ################################################################################
@@ -867,10 +922,62 @@ ${BUILD_PLAT}/${FWU_FIP_NAME}: ${FWU_FIP_DEPS} ${FIPTOOL}
 
 fiptool: ${FIPTOOL}
 ifeq (${CALL_DOIMAGE}, y)
+ifeq ($(PLAT),a3700)
+fip: ${BUILD_PLAT}/${FIP_NAME} ${DOIMAGETOOL}
+	$(shell truncate -s %128K ${BUILD_PLAT}/bl1.bin)
+	$(shell cat ${BUILD_PLAT}/bl1.bin ${BUILD_PLAT}/${FIP_NAME} > ${BUILD_PLAT}/${BOOT_IMAGE})
+	$(shell truncate -s %4 ${BUILD_PLAT}/${BOOT_IMAGE})
+	$(shell truncate -s %4 $(WTMI_IMG))
+	@echo
+	@echo "Building uart images"
+	$(TIMBUILD) $(TIMBLDUARTARGS)
+	@sed -i 's|WTMI_IMG|$(WTMI_MULTI_IMG)|1' $(DOIMAGE_CFG)
+	@sed -i 's|BOOT_IMAGE|$(BUILD_PLAT)/$(BOOT_IMAGE)|1' $(DOIMAGE_CFG)
+ifeq ($(MARVELL_SECURE_BOOT),1)
+	@sed -i 's|WTMI_IMG|$(WTMI_MULTI_IMG)|1' $(TIMNCFG)
+	@sed -i 's|BOOT_IMAGE|$(BUILD_PLAT)/$(BOOT_IMAGE)|1' $(TIMNCFG)
+endif
+	$(DOIMAGETOOL) $(DOIMAGE_FLAGS)
+	@if [ -e "$(TIMNCFG)" ]; then $(DOIMAGETOOL) -r $(TIMNCFG); fi
+	@rm -rf $(BUILD_PLAT)/$(BUILD_UART)*
+	@mkdir $(BUILD_PLAT)/$(BUILD_UART)
+	@mv -t $(BUILD_PLAT)/$(BUILD_UART) $(TIM_IMAGE) $(DOIMAGE_CFG) $(TIMN_IMAGE) $(TIMNCFG)
+	@find . -name "*_h.*" |xargs cp -ut $(BUILD_PLAT)/$(BUILD_UART)
+	@mv $(subst .bin,_h.bin,$(WTMI_MULTI_IMG)) $(BUILD_PLAT)/$(BUILD_UART)/wtmi_h.bin
+	@tar czf $(BUILD_PLAT)/$(BUILD_UART).tgz -C $(BUILD_PLAT) ./$(BUILD_UART)
+	@echo
+	@echo "Building flash image"
+	$(TIMBUILD) $(TIMBLDARGS)
+	sed -i 's|WTMI_IMG|$(WTMI_MULTI_IMG)|1' $(DOIMAGE_CFG)
+	sed -i 's|BOOT_IMAGE|$(BUILD_PLAT)/$(BOOT_IMAGE)|1' $(DOIMAGE_CFG)
+ifeq ($(MARVELL_SECURE_BOOT),1)
+	@sed -i 's|WTMI_IMG|$(WTMI_MULTI_IMG)|1' $(TIMNCFG)
+	@sed -i 's|BOOT_IMAGE|$(BUILD_PLAT)/$(BOOT_IMAGE)|1' $(TIMNCFG)
+	@echo -e "\n\t=======================================================\n";
+	@echo -e "\t  Secure boot. Encrypting wtmi and boot-image \n";
+	@echo -e "\t=======================================================\n";
+	@truncate -s %16 $(WTMI_MULTI_IMG)
+	@openssl enc -aes-256-cbc -e -in $(WTMI_MULTI_IMG) -out $(WTMI_ENC_IMG) \
+	-K `cat $(IMAGESPATH)/aes-256.txt` -k 0 -nosalt \
+	-iv `cat $(IMAGESPATH)/iv.txt` -p
+	@truncate -s %16 $(BUILD_PLAT)/$(BOOT_IMAGE);
+	@openssl enc -aes-256-cbc -e -in $(BUILD_PLAT)/$(BOOT_IMAGE) -out $(BUILD_PLAT)/$(BOOT_ENC_IMAGE) \
+	-K `cat $(IMAGESPATH)/aes-256.txt` -k 0 -nosalt \
+	-iv `cat $(IMAGESPATH)/iv.txt` -p
+endif
+	$(DOIMAGETOOL) $(DOIMAGE_FLAGS)
+	@if [ -e "$(TIMNCFG)" ]; then $(DOIMAGETOOL) -r $(TIMNCFG); fi
+	@if [ "$(MARVELL_SECURE_BOOT)" = "1" ]; then sed -i 's|$(WTMI_MULTI_IMG)|$(WTMI_ENC_IMG)|1;s|$(BOOT_IMAGE)|$(BOOT_ENC_IMAGE)|1;' $(TIMNCFG); fi
+	$(TIM2IMG) $(TIM2IMGARGS) -o $(BUILD_PLAT)/$(FLASH_IMAGE)
+	@mv -t $(BUILD_PLAT) $(TIM_IMAGE) $(DOIMAGE_CFG) $(TIMN_IMAGE) $(TIMNCFG) $(WTMI_IMG) $(WTMI_SYSINIT_IMG) $(WTMI_MULTI_IMG)
+	@if [ "$(MARVELL_SECURE_BOOT)" = "1" ]; then mv -t $(BUILD_PLAT) $(WTMI_ENC_IMG) OtpHash.txt; fi
+	@find . -name "*.txt" | grep -E "CSK[[:alnum:]]_KeyHash.txt|Tim_msg.txt|TIMHash.txt" | xargs rm -f
+else
 fip: ${BUILD_PLAT}/${FIP_NAME} ${DOIMAGETOOL} ${BUILD_PLAT}/ble.bin
 	$(shell truncate -s %128K ${BUILD_PLAT}/bl1.bin)
 	$(shell cat ${BUILD_PLAT}/bl1.bin ${BUILD_PLAT}/${FIP_NAME} > ${BUILD_PLAT}/${BOOT_IMAGE})
 	${DOIMAGETOOL} ${DOIMAGE_FLAGS} ${BUILD_PLAT}/${BOOT_IMAGE} ${BUILD_PLAT}/${FLASH_IMAGE}
+endif
 else
 fip: ${BUILD_PLAT}/${FIP_NAME}
 endif
diff --git a/plat/marvell/a3700/a3700/board/pm_src.c b/plat/marvell/a3700/a3700/board/pm_src.c
new file mode 100644
index 00000000..1c4958c6
--- /dev/null
+++ b/plat/marvell/a3700/a3700/board/pm_src.c
@@ -0,0 +1,36 @@
+/*
+ * Copyright (C) 2016 - 2018 Marvell International Ltd.
+ *
+ * SPDX-License-Identifier:	BSD-3-Clause
+ * https://spdx.org/licenses
+ */
+#include <a3700_pm.h>
+#include <plat_marvell.h>
+
+/* This struct provides the PM wake up src configuration */
+static struct pm_wake_up_src_config wake_up_src_cfg = {
+	.wake_up_src_num = 3,
+	.wake_up_src[0] = {
+		.wake_up_src_type = WAKE_UP_SRC_GPIO,
+		.wake_up_data = {
+			.gpio_data.bank_num = 0, /* North Bridge */
+			.gpio_data.gpio_num = 14
+		}
+	},
+	.wake_up_src[1] = {
+		.wake_up_src_type = WAKE_UP_SRC_GPIO,
+		.wake_up_data = {
+			.gpio_data.bank_num = 1, /* South Bridge */
+			.gpio_data.gpio_num = 2
+		}
+	},
+	.wake_up_src[2] = {
+		.wake_up_src_type = WAKE_UP_SRC_UART1,
+	}
+};
+
+struct pm_wake_up_src_config *mv_wake_up_src_config_get(void)
+{
+	return &wake_up_src_cfg;
+}
+
diff --git a/plat/marvell/a3700/a3700/plat_bl31_setup.c b/plat/marvell/a3700/a3700/plat_bl31_setup.c
new file mode 100644
index 00000000..1e813f32
--- /dev/null
+++ b/plat/marvell/a3700/a3700/plat_bl31_setup.c
@@ -0,0 +1,92 @@
+/*
+ * Copyright (C) 2016 - 2018 Marvell International Ltd.
+ *
+ * SPDX-License-Identifier:	BSD-3-Clause
+ * https://spdx.org/licenses
+ */
+#include <a3700_dram_cs.h>
+#include <dram_win.h>
+#include <io_addr_dec.h>
+#include <mmio.h>
+#include <plat_config.h>
+#include <plat_marvell.h>
+#include <plat_private.h>
+#include <sys_info.h>
+
+/* This function passes DRAM cpu decode window information in ATF to sys info */
+static void pass_dram_sys_info(struct dram_win_map *win_map)
+{
+	uint32_t win_id;
+	struct dram_win *win;
+
+	for (win_id = 0; win_id < DRAM_WIN_MAP_NUM_MAX; win_id++) {
+		win = win_map->dram_windows + win_id;
+		if (win_id < win_map->dram_win_num) {
+			set_info(CPU_DEC_WIN0_BASE + win_id, win->base_addr);
+			set_info(CPU_DEC_WIN0_SIZE + win_id, win->win_size);
+		} else {
+			set_info(CPU_DEC_WIN0_SIZE + win_id, 0);
+		}
+
+	}
+}
+
+/* This routine does MPP initialization */
+static void marvell_bl31_mpp_init(void)
+{
+	mmio_clrbits_32(MVEBU_NB_GPIO_SEL_REG, 1 << MVEBU_GPIO_TW1_GPIO_EN_OFF);
+
+	/* Set hidden GPIO setting for SPI.
+	 * In north_bridge_pin_out_en_high register 13804,
+	 * bit 28 is the one which enables CS, CLK pins to be
+	 * output, need to set it to 1.
+	 * The initial value of this bit is 1, but in UART boot mode
+	 * initialization, this bit is disabled and the SPI CS and CLK pins
+	 * are used for downloading image purpose; so after downloading,
+	 * we should set this bit to 1 again to enable SPI CS and CLK pins.
+	 * And anyway, this bit value should be 1 in all modes,
+	 * so here we does not judge boot mode and set this bit to 1 always.
+	 */
+	mmio_setbits_32(MVEBU_NB_GPIO_OUTPUT_EN_HIGH_REG, 1 << MVEBU_GPIO_NB_SPI_PIN_MODE_OFF);
+}
+
+/* This function overruns the same function in marvell_bl31_setup.c */
+void bl31_plat_arch_setup(void)
+{
+	struct dec_win_config *io_dec_map;
+	uint32_t dec_win_num;
+	struct dram_win_map dram_wins_map;
+
+	marvell_bl31_plat_arch_setup();
+
+	/* MPP init */
+	marvell_bl31_mpp_init();
+
+	/* initialize the timer for delay functionality */
+	plat_delay_timer_init();
+
+	/* CPU address decoder windows initialization. */
+	cpu_wins_init();
+
+	/* fetch CPU-DRAM window mapping information by reading
+	 * CPU-DRAM decode windows (only the enabled ones)
+	 */
+	dram_win_map_build(&dram_wins_map);
+
+	/* Pass DRAM cpu decode window information
+	 * so that u-boot could get it later
+	 */
+	pass_dram_sys_info(&dram_wins_map);
+
+	/* Get IO address decoder windows */
+	if (marvell_get_io_dec_win_conf(&io_dec_map, &dec_win_num)) {
+		printf("No IO address decoder windows configurations found!\n");
+		return;
+	}
+
+	/* IO address decoder init */
+	if (init_io_addr_dec(&dram_wins_map, io_dec_map, dec_win_num)) {
+		printf("IO address decoder windows initialization failed!\n");
+		return;
+	}
+}
diff --git a/plat/marvell/a3700/a3700/plat_def.h b/plat/marvell/a3700/a3700/plat_def.h
new file mode 100644
index 00000000..6a1ff0fa
--- /dev/null
+++ b/plat/marvell/a3700/a3700/plat_def.h
@@ -0,0 +1,12 @@
+/*
+ * Copyright (C) 2016 - 2018 Marvell International Ltd.
+ *
+ * SPDX-License-Identifier:	BSD-3-Clause
+ * https://spdx.org/licenses
+ */
+#ifndef __MVEBU_DEF_H__
+#define __MVEBU_DEF_H__
+
+#include <a3700_plat_def.h>
+
+#endif /* __MVEBU_DEF_H__ */
diff --git a/plat/marvell/a3700/a3700/platform.mk b/plat/marvell/a3700/a3700/platform.mk
new file mode 100644
index 00000000..d2316f67
--- /dev/null
+++ b/plat/marvell/a3700/a3700/platform.mk
@@ -0,0 +1,10 @@
+#
+# Copyright (C) 2016 - 2018 Marvell International Ltd.
+#
+# SPDX-License-Identifier:	BSD-3-Clause
+# https://spdx.org/licenses
+#
+
+include plat/marvell/a3700/common/a3700_common.mk
+
+include plat/marvell/common/marvell_common.mk