diff options
| author | Marcin Wojtas <mw@semihalf.com> | 2018-03-21 09:55:47 +0100 |
|---|---|---|
| committer | Konstantin Porotchkin <kostap@marvell.com> | 2018-09-03 14:48:36 +0300 |
| commit | 9132e1f03190604f685975a730b422aab661dc36 (patch) | |
| tree | 280fac72cf0f3c6041db9fe2297aef021f8f98ee | |
| parent | 77c6907de7e0d05b13a30c4c884f7d92d37badbd (diff) | |
gicv2: enable configuring IRQ trigger type
This patch introduces new helper routines that allow
configuring the individual IRQs to be edge-triggered
via GICD_ICFGR registers. This is helpful to modify
the default configuration of the GIC SPI's, which
are all set during initialization to be level-sensitive.
Change-Id: I23deb4a0381691a686a3cda52405aa1dfd5e56f2
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/58303
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
| -rw-r--r-- | drivers/arm/gic/v2/gicv2_main.c | 8 | ||||
| -rw-r--r-- | include/drivers/arm/gicv2.h | 1 |
2 files changed, 9 insertions, 0 deletions
diff --git a/drivers/arm/gic/v2/gicv2_main.c b/drivers/arm/gic/v2/gicv2_main.c index e25e501d..bbd0be3b 100644 --- a/drivers/arm/gic/v2/gicv2_main.c +++ b/drivers/arm/gic/v2/gicv2_main.c @@ -595,3 +595,11 @@ unsigned int gicv2_set_pmr(unsigned int mask) return old_mask; } + +/******************************************************************************* + * This functions configures the single interrupt to be edge triggered + ******************************************************************************/ +void gicv2_interrupt_set_edge_triggered(unsigned int id) +{ + gicd_set_icfgr(driver_data->gicd_base, id, GIC_INTR_CFG_EDGE); +} diff --git a/include/drivers/arm/gicv2.h b/include/drivers/arm/gicv2.h index 39c73027..7f9d73ea 100644 --- a/include/drivers/arm/gicv2.h +++ b/include/drivers/arm/gicv2.h @@ -190,6 +190,7 @@ void gicv2_set_spi_routing(unsigned int id, int proc_num); void gicv2_set_interrupt_pending(unsigned int id); void gicv2_clear_interrupt_pending(unsigned int id); unsigned int gicv2_set_pmr(unsigned int mask); +void gicv2_interrupt_set_edge_triggered(unsigned int id); #endif /* __ASSEMBLY__ */ #endif /* __GICV2_H__ */ |