fix: marvell: Adjust data types to the new definition

Apply changes to data formats to be compatible with
the mainline patch:
"types: use int-ll64 for both aarch32 and aarch64"

Change-Id: I1c4c77d5f1a1a513fac03ca9a7c565b13c1f50aa
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/57119

8 files changed, 26 insertions, 26 deletions

diff --git a/drivers/marvell/amb_adec.c b/drivers/marvell/amb_adec.c
index f81edad4..6051a51d 100644
--- a/drivers/marvell/amb_adec.c
+++ b/drivers/marvell/amb_adec.c
@@ -41,10 +41,10 @@ static void amb_check_win(struct addr_map_win *win, uint32_t win_num)
 
 	/* make sure the base address is in 16-bit range */
 	if (win->base_addr > AMB_BASE_ADDR_MASK) {
-		printf("Warning: Window %d: base address is too big 0x%lx\n",
+		printf("Warning: Window %d: base address is too big 0x%llx\n",
 		       win_num, win->base_addr);
 		win->base_addr = AMB_BASE_ADDR_MASK;
-		printf("Set the base address to 0x%lx\n", win->base_addr);
+		printf("Set the base address to 0x%llx\n", win->base_addr);
 	}
 
 	base_addr  = win->base_addr << AMB_BASE_OFFSET;
@@ -54,15 +54,15 @@ static void amb_check_win(struct addr_map_win *win, uint32_t win_num)
 		win->base_addr = ALIGN_UP(base_addr, AMB_WIN_ALIGNMENT_1M);
 		printf("Warning: Window %d: base address unaligned to 0x%x\n",
 		       win_num, AMB_WIN_ALIGNMENT_1M);
-		printf("Align up the base address to 0x%lx\n", win->base_addr);
+		printf("Align up the base address to 0x%llx\n", win->base_addr);
 	}
 
 	/* size parameter validity check */
 	if (!IS_POWER_OF_2(win->win_size)) {
-		printf("Warning: Window %d: window size is not power of 2 (0x%lx)\n",
+		printf("Warning: Window %d: window size is not power of 2 (0x%llx)\n",
 		       win_num, win->win_size);
 		win->win_size = ROUND_UP_TO_POW_OF_2(win->win_size);
-		printf("Rounding size to 0x%lx\n", win->win_size);
+		printf("Rounding size to 0x%llx\n", win->win_size);
 	}
 }
 
diff --git a/drivers/marvell/ccu.c b/drivers/marvell/ccu.c
index 0fb60a52..e71975a7 100644
--- a/drivers/marvell/ccu.c
+++ b/drivers/marvell/ccu.c
@@ -48,7 +48,7 @@ static void dump_ccu(int ap_index)
 			ahr = mmio_read_32(CCU_WIN_AHR_OFFSET(ap_index, win_id));
 			start = ((uint64_t)alr << ADDRESS_SHIFT);
 			end = (((uint64_t)ahr + 0x10) << ADDRESS_SHIFT);
-			printf("\tccu    %02x     0x%016lx 0x%016lx\n", target_id, start, end);
+			printf("\tccu    %02x     0x%016llx 0x%016llx\n", target_id, start, end);
 		}
 	}
 	win_cr = mmio_read_32(CCU_WIN_GCR_OFFSET(ap_index));
@@ -64,13 +64,13 @@ void ccu_win_check(struct addr_map_win *win)
 	/* check if address is aligned to 1M */
 	if (IS_NOT_ALIGN(win->base_addr, CCU_WIN_ALIGNMENT)) {
 		win->base_addr = ALIGN_UP(win->base_addr, CCU_WIN_ALIGNMENT);
-		NOTICE("%s: Align up the base address to 0x%lx\n", __func__, win->base_addr);
+		NOTICE("%s: Align up the base address to 0x%llx\n", __func__, win->base_addr);
 	}
 
 	/* size parameter validity check */
 	if (IS_NOT_ALIGN(win->win_size, CCU_WIN_ALIGNMENT)) {
 		win->win_size = ALIGN_UP(win->win_size, CCU_WIN_ALIGNMENT);
-		NOTICE("%s: Aligning size to 0x%lx\n", __func__, win->win_size);
+		NOTICE("%s: Aligning size to 0x%llx\n", __func__, win->win_size);
 	}
 }
 
diff --git a/drivers/marvell/comphy/phy-comphy-cp110.c b/drivers/marvell/comphy/phy-comphy-cp110.c
index fc692da7..116a191e 100644
--- a/drivers/marvell/comphy/phy-comphy-cp110.c
+++ b/drivers/marvell/comphy/phy-comphy-cp110.c
@@ -2171,7 +2171,7 @@ int mvebu_cp110_comphy_power_on(uint64_t comphy_base, uint64_t comphy_index, uin
 		err = mvebu_cp110_comphy_ap_power_on(comphy_base, comphy_index);
 		break;
 	default:
-		ERROR("comphy%ld: unsupported comphy mode\n", comphy_index);
+		ERROR("comphy%lld: unsupported comphy mode\n", comphy_index);
 		err = -EINVAL;
 		break;
 	}
diff --git a/drivers/marvell/gwin.c b/drivers/marvell/gwin.c
index c44c049c..07b34481 100644
--- a/drivers/marvell/gwin.c
+++ b/drivers/marvell/gwin.c
@@ -42,13 +42,13 @@ static void gwin_check(struct addr_map_win *win)
 	/* The base is always 64M aligned */
 	if (IS_NOT_ALIGN(win->base_addr, GWIN_ALIGNMENT_64M)) {
 		win->base_addr &= ~(GWIN_ALIGNMENT_64M - 1);
-		NOTICE("%s: Align the base address to 0x%lx\n", __func__, win->base_addr);
+		NOTICE("%s: Align the base address to 0x%llx\n", __func__, win->base_addr);
 	}
 
 	/* size parameter validity check */
 	if (IS_NOT_ALIGN(win->win_size, GWIN_ALIGNMENT_64M)) {
 		win->win_size = ALIGN_UP(win->win_size, GWIN_ALIGNMENT_64M);
-		NOTICE("%s: Aligning window size to 0x%lx\n", __func__, win->win_size);
+		NOTICE("%s: Aligning window size to 0x%llx\n", __func__, win->win_size);
 	}
 }
 
@@ -155,7 +155,7 @@ static void dump_gwin(int ap_index)
 			alr = (alr >> ADDRESS_LSHIFT) << ADDRESS_RSHIFT;
 			ahr = mmio_read_32(GWIN_AHR_OFFSET(ap_index, win_num));
 			ahr = (ahr >> ADDRESS_LSHIFT) << ADDRESS_RSHIFT;
-			printf("\tgwin   %d     0x%016lx 0x%016lx\n", (cr >> 8) & 0xF, alr, ahr);
+			printf("\tgwin   %d     0x%016llx 0x%016llx\n", (cr >> 8) & 0xF, alr, ahr);
 		}
 	}
 	return;
diff --git a/drivers/marvell/io_win.c b/drivers/marvell/io_win.c
index 0c0e62af..164cbbb8 100644
--- a/drivers/marvell/io_win.c
+++ b/drivers/marvell/io_win.c
@@ -38,13 +38,13 @@ static void io_win_check(struct addr_map_win *win)
 	/* check if address is aligned to 1M */
 	if (IS_NOT_ALIGN(win->base_addr, IO_WIN_ALIGNMENT_1M)) {
 		win->base_addr = ALIGN_UP(win->base_addr, IO_WIN_ALIGNMENT_1M);
-		NOTICE("%s: Align up the base address to 0x%lx\n", __func__, win->base_addr);
+		NOTICE("%s: Align up the base address to 0x%llx\n", __func__, win->base_addr);
 	}
 
 	/* size parameter validity check */
 	if (IS_NOT_ALIGN(win->win_size, IO_WIN_ALIGNMENT_1M)) {
 		win->win_size = ALIGN_UP(win->win_size, IO_WIN_ALIGNMENT_1M);
-		NOTICE("%s: Aligning size to 0x%lx\n", __func__, win->win_size);
+		NOTICE("%s: Aligning size to 0x%llx\n", __func__, win->win_size);
 	}
 }
 
@@ -158,7 +158,7 @@ static void dump_io_win(int ap_index)
 			trgt_id = mmio_read_32(IO_WIN_CR_OFFSET(ap_index, win_id));
 			start = ((uint64_t)alr << ADDRESS_SHIFT);
 			end = (((uint64_t)ahr + 0x10) << ADDRESS_SHIFT);
-			printf("\tio-win %d     0x%016lx 0x%016lx\n", trgt_id, start, end);
+			printf("\tio-win %d     0x%016llx 0x%016llx\n", trgt_id, start, end);
 		}
 	}
 	printf("\tio-win gcr is %x\n", mmio_read_32(MVEBU_IO_WIN_BASE(ap_index) + MVEBU_IO_WIN_GCR_OFFSET));
diff --git a/drivers/marvell/iob.c b/drivers/marvell/iob.c
index 24b6eee1..343a7cb4 100644
--- a/drivers/marvell/iob.c
+++ b/drivers/marvell/iob.c
@@ -49,14 +49,14 @@ static void iob_win_check(struct addr_map_win *win, uint32_t win_num)
 	if (IS_NOT_ALIGN(win->base_addr, IOB_WIN_ALIGNMENT)) {
 		win->base_addr = ALIGN_UP(win->base_addr, IOB_WIN_ALIGNMENT);
 		ERROR("Window %d: base address unaligned to 0x%x\n", win_num, IOB_WIN_ALIGNMENT);
-		printf("Align up the base address to 0x%lx\n", win->base_addr);
+		printf("Align up the base address to 0x%llx\n", win->base_addr);
 	}
 
 	/* size parameter validity check */
 	if (IS_NOT_ALIGN(win->win_size, IOB_WIN_ALIGNMENT)) {
 		win->win_size = ALIGN_UP(win->win_size, IOB_WIN_ALIGNMENT);
 		ERROR("Window %d: window size unaligned to 0x%x\n", win_num, IOB_WIN_ALIGNMENT);
-		printf("Aligning size to 0x%lx\n", win->win_size);
+		printf("Aligning size to 0x%llx\n", win->win_size);
 	}
 }
 
@@ -105,7 +105,7 @@ static void dump_iob(void)
 				** reserved for CP configuration space. */
 				end = start + (16 << 20);
 			}
-			printf("iob   %02d %s   0x%016lx 0x%016lx\n"
+			printf("iob   %02d %s   0x%016llx 0x%016llx\n"
 					, win_id, iob_target_name[target_id], start, end);
 		}
 	}
diff --git a/plat/marvell/a8k-p/common/plat_dram.c b/plat/marvell/a8k-p/common/plat_dram.c
index 55d3446d..0102736c 100644
--- a/plat/marvell/a8k-p/common/plat_dram.c
+++ b/plat/marvell/a8k-p/common/plat_dram.c
@@ -255,13 +255,13 @@ void plat_dram_mca_remap(int ap_index, int dram_tgt, uint64_t from, uint64_t to,
 
 	/* Size should be non-zero, up to 4GB and multiple of 1MB */
 	if (!size || (size >> 32) || (size % (1 << 20))) {
-		ERROR("Invalid remap size %lx\n", size);
+		ERROR("Invalid remap size %llx\n", size);
 		return;
 	}
 
 	/* Remap addresses must be multiple of remap size */
 	if ((from % size) || (to % size)) {
-		ERROR("Invalid remap address %lx -> %lx\n", from, to);
+		ERROR("Invalid remap address %llx -> %llx\n", from, to);
 		return;
 	}
 
diff --git a/plat/marvell/common/mrvl_sip_svc.c b/plat/marvell/common/mrvl_sip_svc.c
index e1a06ed3..aab74316 100644
--- a/plat/marvell/common/mrvl_sip_svc.c
+++ b/plat/marvell/common/mrvl_sip_svc.c
@@ -37,14 +37,14 @@
 	((fid) >= MV_SIP_COMPHY_POWER_ON && (fid) <= MV_SIP_COMPHY_DIG_RESET)
 
 
-uint64_t mrvl_sip_smc_handler(uint32_t smc_fid,
-			      uint64_t x1,
-			      uint64_t x2,
-			      uint64_t x3,
-			      uint64_t x4,
+uintptr_t mrvl_sip_smc_handler(uint32_t smc_fid,
+			       u_register_t x1,
+			       u_register_t x2,
+			       u_register_t x3,
+			       u_register_t x4,
 			      void *cookie,
 			      void *handle,
-			      uint64_t flags)
+			       u_register_t flags)
 {
 	u_register_t ret;