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authorKonstantin Porotchkin <kostap@marvell.com>2018-06-21 14:52:54 +0300
committerKostya Porotchkin <kostap@marvell.com>2018-06-24 10:20:04 +0300
commitd66c7b4db5de57428ff4f61382ce39ac5af818e7 (patch)
treef5cf655722bcce0e77fba9bc9d50ee7b7471a8ec
parent90f5f5469aec7d0c189cab68ccd1ef663730d023 (diff)
fix: plat: marvell: Rename the coherent memory region
Fix the wronly named end of coherent memory region: BL_COHERENT_RAM_LIMIT ->> BL_COHERENT_RAM_END Change-Id: Ia1b27153a8b82332d204f971a92a888e3438780a Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/57112 Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Omri Itach <omrii@marvell.com>
-rw-r--r--plat/marvell/common/marvell_bl1_setup.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/plat/marvell/common/marvell_bl1_setup.c b/plat/marvell/common/marvell_bl1_setup.c
index dd1ec9e3..73ebd21c 100644
--- a/plat/marvell/common/marvell_bl1_setup.c
+++ b/plat/marvell/common/marvell_bl1_setup.c
@@ -80,7 +80,7 @@ void marvell_bl1_plat_arch_setup(void)
BL1_RO_DATA_END
#if USE_COHERENT_MEM
, BL_COHERENT_RAM_BASE,
- BL_COHERENT_RAM_LIMIT
+ BL_COHERENT_RAM_END
#endif
);
enable_mmu_el3(0);