plat: marvell: a3700: get rid of deprecated sys info and use ddr info driver

The sys info was used to pass copy dram information to u-boot.
This was deprecated method and was removed, since obtaining ddr size is
now handled via rt services.

Remove all sys info related code and use mvebu_get_dram_size in place where
marvell_get_dram_cs_base_size was used.

Change-Id: I571043332cd51bf84ec06ad5ef31906cb957c439
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/59827
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>

8 files changed, 5 insertions, 287 deletions

diff --git a/include/plat/marvell/common/mvebu.h b/include/plat/marvell/common/mvebu.h
index a20e538e..260c31af 100644
--- a/include/plat/marvell/common/mvebu.h
+++ b/include/plat/marvell/common/mvebu.h
@@ -34,5 +34,6 @@
 
 #define _1MB_				(1024ULL*1024ULL)
 #define _1GB_				(_1MB_*1024ULL)
+#define _2GB_				(2 * _1GB_)
 
 #endif	/* MVEBU_H */
diff --git a/include/plat/marvell/common/sys_info.h b/include/plat/marvell/common/sys_info.h
deleted file mode 100644
index 5351424b..00000000
--- a/include/plat/marvell/common/sys_info.h
+++ /dev/null
@@ -1,47 +0,0 @@
-/*
- * Copyright (C) 2016 - 2018 Marvell International Ltd.
- *
- * SPDX-License-Identifier:     BSD-3-Clause
- * https://spdx.org/licenses
- */
- 
-#ifndef _SYS_INFO_H_
-#define _SYS_INFO_H_
-
-#define SYSTEM_INFO_ADDRESS	0x4000000
-
-enum sys_info_type {
-	ARRAY_SIZE,
-	DRAM_CS0_SIZE,
-	DRAM_CS1_SIZE,
-	DRAM_CS2_SIZE,
-	DRAM_CS3_SIZE,
-	DRAM_BUS_WIDTH,
-	DRAM_ECC,
-	DRAM_CS0,
-	DRAM_CS1,
-	DRAM_CS2,
-	DRAM_CS3,
-	RECOVERY_MODE,
-	BOOT_MODE,
-	CPU_DEC_WIN0_BASE,
-	CPU_DEC_WIN1_BASE,
-	CPU_DEC_WIN2_BASE,
-	CPU_DEC_WIN3_BASE,
-	CPU_DEC_WIN4_BASE,
-	CPU_DEC_WIN0_SIZE,
-	CPU_DEC_WIN1_SIZE,
-	CPU_DEC_WIN2_SIZE,
-	CPU_DEC_WIN3_SIZE,
-	CPU_DEC_WIN4_SIZE,
-	MAX_OPTION,
-};
-
-struct sys_info {
-	enum sys_info_type field_id;
-	uint32_t value;
-};
-
-void set_info(enum sys_info_type field, uint32_t value);
-
-#endif /* _SYS_INFO_H_ */
diff --git a/plat/marvell/a3700/a3700/plat_bl31_setup.c b/plat/marvell/a3700/a3700/plat_bl31_setup.c
index a37af930..83db06f9 100644
--- a/plat/marvell/a3700/a3700/plat_bl31_setup.c
+++ b/plat/marvell/a3700/a3700/plat_bl31_setup.c
@@ -5,32 +5,12 @@
  * https://spdx.org/licenses
  */
 
-#include <a3700_dram_cs.h>
 #include <armada_common.h>
 #include <dram_win.h>
 #include <io_addr_dec.h>
 #include <mmio.h>
 #include <marvell_plat_priv.h>
 #include <plat_marvell.h>
-#include <sys_info.h>
-
-/* This function passes DRAM cpu decode window information in ATF to sys info */
-static void pass_dram_sys_info(struct dram_win_map *win_map)
-{
-	uint32_t win_id;
-	struct dram_win *win;
-
-	for (win_id = 0; win_id < DRAM_WIN_MAP_NUM_MAX; win_id++) {
-		win = win_map->dram_windows + win_id;
-		if (win_id < win_map->dram_win_num) {
-			set_info(CPU_DEC_WIN0_BASE + win_id, win->base_addr);
-			set_info(CPU_DEC_WIN0_SIZE + win_id, win->win_size);
-		} else {
-			set_info(CPU_DEC_WIN0_SIZE + win_id, 0);
-		}
-
-	}
-}
 
 /* This routine does MPP initialization */
 static void marvell_bl31_mpp_init(void)
@@ -75,11 +55,6 @@ void bl31_plat_arch_setup(void)
 	 */
 	dram_win_map_build(&dram_wins_map);
 
-	/* Pass DRAM cpu decode window information
-	 * so that u-boot could get it later
-	 */
-	pass_dram_sys_info(&dram_wins_map);
-
 	/* Get IO address decoder windows */
 	if (marvell_get_io_dec_win_conf(&io_dec_map, &dec_win_num)) {
 		printf("No IO address decoder windows configurations found!\n");
diff --git a/plat/marvell/a3700/common/a3700_common.mk b/plat/marvell/a3700/common/a3700_common.mk
index 62b27dc3..2e26fd3a 100644
--- a/plat/marvell/a3700/common/a3700_common.mk
+++ b/plat/marvell/a3700/common/a3700_common.mk
@@ -111,12 +111,10 @@ MARVELL_DRV		:=	$(MARVELL_DRV_BASE)/comphy/phy-comphy-3700.c
 BL31_SOURCES		+=	lib/cpus/aarch64/cortex_a53.S		\
 				$(PLAT_COMMON_BASE)/aarch64/plat_helpers.S \
 				$(PLAT_COMMON_BASE)/plat_pm.c		\
-				$(PLAT_COMMON_BASE)/a3700_dram_cs.c	\
 				$(PLAT_COMMON_BASE)/dram_win.c		\
 				$(PLAT_COMMON_BASE)/io_addr_dec.c	\
 				$(PLAT_COMMON_BASE)/marvell_plat_config.c     \
 				$(PLAT_FAMILY_BASE)/$(PLAT)/plat_bl31_setup.c \
-				$(MARVELL_COMMON_BASE)/sys_info.c	\
 				$(MARVELL_COMMON_BASE)/marvell_ddr_info.c	\
 				$(MARVELL_COMMON_BASE)/marvell_gicv3.c	\
 				$(MARVELL_GIC_SOURCES)			\
diff --git a/plat/marvell/a3700/common/a3700_dram_cs.c b/plat/marvell/a3700/common/a3700_dram_cs.c
deleted file mode 100644
index d894f1d5..00000000
--- a/plat/marvell/a3700/common/a3700_dram_cs.c
+++ /dev/null
@@ -1,146 +0,0 @@
-/*
- * Copyright (C) 2018 Marvell International Ltd.
- *
- * SPDX-License-Identifier:	BSD-3-Clause
- * https://spdx.org/licenses
- */
-#include <platform_def.h>
-#include <sys_info.h>
-#include <mmio.h>
-#include <errno.h>
-#include <a3700_dram_cs.h>
-
-/* In this file MB is the unit, 1GB is 1024 MB  */
-#define GB_2_MB(gb)	(1024 * gb)
-/* 1TB is 1024 GB */
-#define TB_2_MB(tb)	(1024 * GB_2_MB(tb))
-
-struct dram_cs_addr_len_to_size {
-	uint32_t	addr_len_value;
-	uint32_t	size_mbytes;
-};
-
-/*
- * In the dram cs memory map registers, area_len field holds bits[20:16],
- * its value indicates the length of dram cs memory block as below
- *      0h: 384 MB
- *      1h: 768 MB
- *      2h: 1536 MB
- *      3h: 3 GB
- *      7h: 8 MB
- *      8h: 16 MB
- *      9h: 32 MB
- *      Ah: 64 MB
- *      Bh: 128 MB
- *      Ch: 256 MB
- *      Dh: 512 MB
- *      Eh: 1 GB
- *      Fh: 2 GB
- *      10h: 4 GB
- *      11h: 8 GB
- *      12h: 16 GB
- *      13h: 32 GB
- *      14h: 64 GB
- *      15h: 128 GB
- *      16h: 256 GB
- *      17h: 512 GB
- *      18h: 1 TB
- *      19h: 2 TB
- *      1Ah: 4 TB
- *      Others:Reserved
- */
-static struct dram_cs_addr_len_to_size dram_cs_addr_len_to_size_map[] = {
-	{0x0,	384		},
-	{0x1,	768		},
-	{0x2,	1536		},
-	{0x3,	GB_2_MB(3)	},
-	{0x7,	8		},
-	{0x8,	16		},
-	{0x9,	32		},
-	{0xA,	64		},
-	{0xB,	128		},
-	{0xC,	256		},
-	{0xD,	512		},
-	{0xE,	GB_2_MB(1)	},
-	{0xF,	GB_2_MB(2)	},
-	{0x10,	GB_2_MB(4)	},
-	{0x11,	GB_2_MB(8)	},
-	{0x12,	GB_2_MB(16)	},
-	{0x13,	GB_2_MB(32)	},
-	{0x14,	GB_2_MB(64)	},
-	{0x15,	GB_2_MB(128)	},
-	{0x16,	GB_2_MB(256)	},
-	{0x17,	GB_2_MB(512)	},
-	{0x18,	TB_2_MB(1)	},
-	{0x19,	TB_2_MB(2)	},
-	{0x1A,	TB_2_MB(4)	}
-};
-
-static int marvell_dram_cs_get_size_by_addr_len(uint32_t addr_len_value,
-						uint32_t *size_mbytes)
-{
-	int i;
-
-	for (i = 0; i < sizeof(dram_cs_addr_len_to_size_map)/
-	     sizeof(struct dram_cs_addr_len_to_size); i++) {
-
-		if (dram_cs_addr_len_to_size_map[i].addr_len_value ==
-		    addr_len_value) {
-			*size_mbytes =
-				dram_cs_addr_len_to_size_map[i].size_mbytes;
-			return 0;
-		}
-	}
-
-	return -EFAULT;
-}
-
-/*
- * marvell_get_dram_cs_base_size
- *
- * This function is used to get DRAM CS's memory base address
- * and memory block length from DRAM CS memory map registers,
- * the block length unit is MB.
- *
- * @input:
- *     - cs_num: DRAM CS number
- *
- * @output:
- *     - base_low: DRAM CS's memory base address in low 4 bytes
- *     - base_high: DRAM CS's memory base address in high 4 bytes
- *     - size_mbytes: DRAM CS's memory length in unit of MB
- *
- * @return:  N/A
- */
-int marvell_get_dram_cs_base_size(uint32_t cs_num,
-				  uint32_t *base_low,
-				  uint32_t *base_high,
-				  uint32_t *size_mbytes)
-{
-	uint32_t	cs_mmap_reg, area_len;
-
-	if (cs_num >= MVEBU_MAX_CS_MMAP_NUM)
-		return -EPERM;
-
-	cs_mmap_reg = mmio_read_32(MVEBU_CS_MMAP_LOW(cs_num));
-	if (!(cs_mmap_reg & MVEBU_CS_MMAP_ENABLE))
-		return -ENODEV;
-
-	*base_low = (cs_mmap_reg & MVEBU_CS_MMAP_START_ADDR_LOW_MASK) >>
-		     MVEBU_CS_MMAP_START_ADDR_LOW_OFFS;
-	*base_high = mmio_read_32(MVEBU_CS_MMAP_HIGH(cs_num));
-	area_len = (cs_mmap_reg & MVEBU_CS_MMAP_AREA_LEN_MASK) >>
-		    MVEBU_CS_MMAP_AREA_LEN_OFFS;
-	if (marvell_dram_cs_get_size_by_addr_len(area_len, size_mbytes))
-		return -EFAULT;
-
-	/*
-	* For area lengths of 384 MB, 768 MB, 1536 MB, or 3 GB,
-	* the start address must be on 1/3 of the area length boundary.
-	*/
-	if ((area_len <= 3) && (((*base_low >> 20) * 3) != *size_mbytes))
-		return -EFAULT;
-
-	return 0;
-}
-
diff --git a/plat/marvell/a3700/common/dram_win.c b/plat/marvell/a3700/common/dram_win.c
index 3ffc98cd..894e85e9 100644
--- a/plat/marvell/a3700/common/dram_win.c
+++ b/plat/marvell/a3700/common/dram_win.c
@@ -4,9 +4,10 @@
  * SPDX-License-Identifier:	BSD-3-Clause
  * https://spdx.org/licenses
  */
-#include <a3700_dram_cs.h>
 #include <dram_win.h>
+#include <marvell_plat_priv.h>
 #include <mmio.h>
+#include <mvebu.h>
 #include <plat_marvell.h>
 #include <string.h>
 
@@ -209,15 +210,9 @@ static void cpu_win_set(uint32_t win_id, struct cpu_win_configuration *win_cfg)
 
 void cpu_wins_init(void)
 {
-	uint32_t cfg_idx, win_id, cs_id;
-	uint32_t base_low, base_high, size_mbytes, total_mbytes = 0;
+	uint32_t cfg_idx, win_id;
 
-	for (cs_id = 0; cs_id < MVEBU_MAX_CS_MMAP_NUM; cs_id++)
-		if (!marvell_get_dram_cs_base_size(cs_id, &base_low,
-						   &base_high, &size_mbytes))
-			total_mbytes += size_mbytes;
-
-	if (total_mbytes <= 2048)
+	if (mvebu_get_dram_size(MVEBU_REGS_BASE) <= _2GB_)
 		cfg_idx = CPU_WIN_CONFIG_DRAM_NOT_OVER_2GB;
 	else
 		cfg_idx = CPU_WIN_CONFIG_DRAM_4GB;
diff --git a/plat/marvell/a3700/common/include/a3700_dram_cs.h b/plat/marvell/a3700/common/include/a3700_dram_cs.h
deleted file mode 100644
index 4ce64dec..00000000
--- a/plat/marvell/a3700/common/include/a3700_dram_cs.h
+++ /dev/null
@@ -1,34 +0,0 @@
-/*
- * Copyright (C) 2018 Marvell International Ltd.
- *
- * SPDX-License-Identifier:	BSD-3-Clause
- * https://spdx.org/licenses
- */
-
-#ifndef __MVEBU_A3700_DRAM_CS_H__
-#define __MVEBU_A3700_DRAM_CS_H__
-
-#include <stdint.h>
-/*
- * marvell_get_dram_cs_base_size
- *
- * This function is used to get DRAM CS's memory base address
- * and memory block length from DRAM CS memory map registers,
- * the block length unit is MB.
- *
- * @input:
- *     - cs_num: DRAM CS number
- *
- * @output:
- *     - base_low: DRAM CS's memory base address in low 4 bytes
- *     - base_high: DRAM CS's memory base address in high 4 bytes
- *     - size_mbytes: DRAM CS's memory length in unit of MB
- *
- * @return:  N/A
- */
-int marvell_get_dram_cs_base_size(uint32_t cs_num,
-				  uint32_t *base_low,
-				  uint32_t *base_high,
-				  uint32_t *size_mbytes);
-
-#endif /* __MVEBU_A3700_DRAM_CS_H__ */
diff --git a/plat/marvell/common/sys_info.c b/plat/marvell/common/sys_info.c
deleted file mode 100644
index 1c99f15d..00000000
--- a/plat/marvell/common/sys_info.c
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * Copyright (C) 2016 - 2018 Marvell International Ltd.
- *
- * SPDX-License-Identifier:     BSD-3-Clause
- * https://spdx.org/licenses
- */
- 
-#include <arch_helpers.h>
-#include <plat_marvell.h>
-#include <debug.h>
-#include <sys_info.h>
-
-struct sys_info *sys_info_in_ptr = (struct sys_info *)SYSTEM_INFO_ADDRESS;
-/* skip index 0 because this index in dedicated to array system-info size*/
-int sys_info_size = 1;
-
-void set_info(enum sys_info_type field, unsigned int value)
-{
-	if (sys_info_size == 1)
-		sys_info_in_ptr[ARRAY_SIZE].field_id = ARRAY_SIZE;
-	sys_info_in_ptr[sys_info_size].field_id = field;
-	sys_info_in_ptr[sys_info_size].value = value;
-	sys_info_in_ptr[ARRAY_SIZE].value = ++sys_info_size;
-}