diff options
| author | Grzegorz Jaszczyk <jaz@semihalf.com> | 2018-09-12 15:14:20 +0200 |
|---|---|---|
| committer | Kostya Porotchkin <kostap@marvell.com> | 2018-09-17 14:22:52 +0300 |
| commit | 74d23d159eeca2a6005ccc3fbdd30c688332b4a1 (patch) | |
| tree | 70ea9361f03dcbcba892fd6ee7622463c0099296 | |
| parent | ed2c566818e144c4d2ee4645a2b90cb66f19c271 (diff) | |
plat: marvell: a3700: allow to read ddr size from mem controller
Register new smc fid as runtime service, which will allow to read ddr
size from memory controller. It is required since the memory controller
registers will be marked as secure, therefore bootloaders will not have
direct access to them.
Change-Id: Ia05cd51526a4a9aa0969e900dd0c7f3322ae70c6
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/59826
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
Tested-by: Kostya Porotchkin <kostap@marvell.com>
| -rw-r--r-- | plat/marvell/a3700/common/a3700_common.mk | 1 | ||||
| -rw-r--r-- | plat/marvell/a3700/common/a3700_sip_svc.c | 9 | ||||
| -rw-r--r-- | plat/marvell/a3700/common/include/ddr_info.h | 9 |
3 files changed, 19 insertions, 0 deletions
diff --git a/plat/marvell/a3700/common/a3700_common.mk b/plat/marvell/a3700/common/a3700_common.mk index 07a1f409..62b27dc3 100644 --- a/plat/marvell/a3700/common/a3700_common.mk +++ b/plat/marvell/a3700/common/a3700_common.mk @@ -117,6 +117,7 @@ BL31_SOURCES += lib/cpus/aarch64/cortex_a53.S \ $(PLAT_COMMON_BASE)/marvell_plat_config.c \ $(PLAT_FAMILY_BASE)/$(PLAT)/plat_bl31_setup.c \ $(MARVELL_COMMON_BASE)/sys_info.c \ + $(MARVELL_COMMON_BASE)/marvell_ddr_info.c \ $(MARVELL_COMMON_BASE)/marvell_gicv3.c \ $(MARVELL_GIC_SOURCES) \ drivers/arm/cci/cci.c \ diff --git a/plat/marvell/a3700/common/a3700_sip_svc.c b/plat/marvell/a3700/common/a3700_sip_svc.c index 834e2872..d61ccaaf 100644 --- a/plat/marvell/a3700/common/a3700_sip_svc.c +++ b/plat/marvell/a3700/common/a3700_sip_svc.c @@ -17,6 +17,9 @@ #define MV_SIP_COMPHY_POWER_OFF 0x82000002 #define MV_SIP_COMPHY_PLL_LOCK 0x82000003 +/* Miscellaneous FID's' */ +#define MV_SIP_DRAM_SIZE 0x82000010 + /* This macro is used to identify COMPHY related calls from SMC function ID */ #define is_comphy_fid(fid) \ ((fid) >= MV_SIP_COMPHY_POWER_ON && (fid) <= MV_SIP_COMPHY_PLL_LOCK) @@ -58,6 +61,12 @@ uintptr_t mrvl_sip_smc_handler(uint32_t smc_fid, ret = mvebu_3700_comphy_is_pll_locked(x1, x2); SMC_RET1(handle, ret); #endif + /* Miscellaneous FID's' */ + case MV_SIP_DRAM_SIZE: + /* x1: ap_base_addr */ + ret = mvebu_get_dram_size(MVEBU_REGS_BASE); + SMC_RET1(handle, ret); + default: ERROR("%s: unhandled SMC (0x%x)\n", __func__, smc_fid); SMC_RET1(handle, SMC_UNK); diff --git a/plat/marvell/a3700/common/include/ddr_info.h b/plat/marvell/a3700/common/include/ddr_info.h new file mode 100644 index 00000000..314bc039 --- /dev/null +++ b/plat/marvell/a3700/common/include/ddr_info.h @@ -0,0 +1,9 @@ +/* + * Copyright (C) 2018 Marvell International Ltd. + * + * SPDX-License-Identifier: BSD-3-Clause + * https://spdx.org/licenses + */ + +#define DRAM_MAX_IFACE 1 +#define DRAM_CH0_MMAP_LOW_OFFSET 0x200 |