diff options
| author | Grzegorz Jaszczyk <jaz@semihalf.com> | 2018-09-03 11:51:16 +0200 |
|---|---|---|
| committer | Igal Liberman <igall@marvell.com> | 2018-09-06 17:26:10 +0300 |
| commit | da86990f5cdc84b81cec5e36802bfbff1350d146 (patch) | |
| tree | 0281288946721060207cd9df15315b6f82a872ff | |
| parent | 311bba3d1d4c3fa46607cea4f069cc2ba501b706 (diff) | |
marvell: a3700: register platform specific SiP
Currently all registered SiP services are used for comphy handling but they
will be extended in the future.
Change-Id: I4229e27b8c4e3de5aa01e9dd039feee909265025
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/59676
Reviewed-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
Tested-by: Kostya Porotchkin <kostap@marvell.com>
| -rw-r--r-- | plat/marvell/a3700/common/a3700_common.mk | 1 | ||||
| -rw-r--r-- | plat/marvell/a3700/common/a3700_sip_svc.c | 75 |
2 files changed, 76 insertions, 0 deletions
diff --git a/plat/marvell/a3700/common/a3700_common.mk b/plat/marvell/a3700/common/a3700_common.mk index 388c1cb3..230cba0b 100644 --- a/plat/marvell/a3700/common/a3700_common.mk +++ b/plat/marvell/a3700/common/a3700_common.mk @@ -120,6 +120,7 @@ BL31_SOURCES += lib/cpus/aarch64/cortex_a53.S \ $(MARVELL_GIC_SOURCES) \ drivers/arm/cci/cci.c \ $(BL31_PORTING_SOURCES) \ + $(PLAT_COMMON_BASE)/a3700_sip_svc.c \ $(MARVELL_DRV) # Disable the PSCI platform compatibility layer (allows porting from Old Platform APIs diff --git a/plat/marvell/a3700/common/a3700_sip_svc.c b/plat/marvell/a3700/common/a3700_sip_svc.c new file mode 100644 index 00000000..834e2872 --- /dev/null +++ b/plat/marvell/a3700/common/a3700_sip_svc.c @@ -0,0 +1,75 @@ +/* + * Copyright (C) 2018 Marvell International Ltd. + * + * SPDX-License-Identifier: BSD-3-Clause + * https://spdx.org/licenses + */ + +#include <debug.h> +#include <marvell_plat_priv.h> +#include <plat_marvell.h> +#include <runtime_svc.h> +#include <smcc.h> +#include "comphy/phy-comphy-3700.h" + +/* Comphy related FID's */ +#define MV_SIP_COMPHY_POWER_ON 0x82000001 +#define MV_SIP_COMPHY_POWER_OFF 0x82000002 +#define MV_SIP_COMPHY_PLL_LOCK 0x82000003 + +/* This macro is used to identify COMPHY related calls from SMC function ID */ +#define is_comphy_fid(fid) \ + ((fid) >= MV_SIP_COMPHY_POWER_ON && (fid) <= MV_SIP_COMPHY_PLL_LOCK) + +uintptr_t mrvl_sip_smc_handler(uint32_t smc_fid, + u_register_t x1, + u_register_t x2, + u_register_t x3, + u_register_t x4, + void *cookie, + void *handle, + u_register_t flags) +{ + u_register_t ret; + + VERBOSE("%s: got SMC (0x%x) x1 0x%lx, x2 0x%lx\n", + __func__, smc_fid, x1, x2); + if (is_comphy_fid(smc_fid)) { + if (x1 >= MAX_LANE_NR) { + ERROR("%s: Wrong smc (0x%x) lane nr: %lx\n", + __func__, smc_fid, x2); + SMC_RET1(handle, SMC_UNK); + } + } + + switch (smc_fid) { +#if PALLADIUM == 0 + /* Comphy related FID's */ + case MV_SIP_COMPHY_POWER_ON: + /* x1: comphy_index, x2: comphy_mode */ + ret = mvebu_3700_comphy_power_on(x1, x2); + SMC_RET1(handle, ret); + case MV_SIP_COMPHY_POWER_OFF: + /* x1: comphy_index, x2: comphy_mode */ + ret = mvebu_3700_comphy_power_off(x1, x2); + SMC_RET1(handle, ret); + case MV_SIP_COMPHY_PLL_LOCK: + /* x1: comphy_index, x2: comphy_mode */ + ret = mvebu_3700_comphy_is_pll_locked(x1, x2); + SMC_RET1(handle, ret); +#endif + default: + ERROR("%s: unhandled SMC (0x%x)\n", __func__, smc_fid); + SMC_RET1(handle, SMC_UNK); + } +} + +/* Define a runtime service descriptor for fast SMC calls */ +DECLARE_RT_SVC( + marvell_sip_svc, + OEN_SIP_START, + OEN_SIP_END, + SMC_TYPE_FAST, + NULL, + mrvl_sip_smc_handler +); |