diff options
author | Konstantin Porotchkin <kostap@marvell.com> | 2018-02-26 15:51:11 +0200 |
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committer | Kostya Porotchkin <kostap@marvell.com> | 2018-05-30 13:26:06 +0300 |
commit | 084ae1b7b5faf2c8a528a83d78ee19a0ef53c3e6 (patch) | |
tree | b55d424dfdef7ff9e547f1e836bda210744ba161 /docs | |
parent | 50c9d4ae8ad257dd349b2e2e6c56f88e04813a89 (diff) |
marvell: drivers: Add address decoding units drivers
Add address decoding unit drivers for Marvell SoCs.
Change-Id: I6a486fd0b1c575e1b968f03a3363ee4cdeb87d29
Signed-off-by: Hanna Hawa <hannah@marvell.com>
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/54243
Diffstat (limited to 'docs')
-rw-r--r-- | docs/marvell/misc/mvebu-amb.txt | 43 | ||||
-rw-r--r-- | docs/marvell/misc/mvebu-ccu.txt | 21 | ||||
-rw-r--r-- | docs/marvell/misc/mvebu-io-win.txt | 33 | ||||
-rw-r--r-- | docs/marvell/misc/mvebu-iob.txt | 38 |
4 files changed, 135 insertions, 0 deletions
diff --git a/docs/marvell/misc/mvebu-amb.txt b/docs/marvell/misc/mvebu-amb.txt new file mode 100644 index 00000000..1b22eeea --- /dev/null +++ b/docs/marvell/misc/mvebu-amb.txt @@ -0,0 +1,43 @@ +AMB - AXI MBUS address decoding +------------------------------- + +- The Runit offers a second level of address windows lookup. It is used to map transaction towards +the CD BootROM, SPI0, SPI1 and Device bus (NOR). +- The Runit contains eight configurable windows. Each window defines a contiguous, +address space and the properties associated with that address space. + +Unit Bank ATTR +Device-Bus DEV_BOOT_CS 0x2F + DEV_CS0 0x3E + DEV_CS1 0x3D + DEV_CS2 0x3B + DEV_CS3 0x37 +SPI-0 SPI_A_CS0 0x1E + SPI_A_CS1 0x5E + SPI_A_CS2 0x9E + SPI_A_CS3 0xDE + SPI_A_CS4 0x1F + SPI_A_CS5 0x5F + SPI_A_CS6 0x9F + SPI_A_CS7 0xDF +SPI1 SPI_B_CS0 0x1A + SPI_B_CS1 0x5A + SPI_B_CS2 0x9A + SPI_B_CS3 0xDA +BOOT_ROM BOOT_ROM 0x1D +UART UART 0x01 + +Mandatory functions: + - marvell_get_amb_memory_map + returns the AMB windows configuration and the number of windows + +Mandatory structures: + amb_memory_map - Array that include the configuration of the windows + every window/entry is a struct which has 2 parameters: + - base address of the window + - Attribute of the window + +Examples: + struct addr_map_win amb_memory_map[] = { + {0xf900, AMB_DEV_CS0_ID}, + }; diff --git a/docs/marvell/misc/mvebu-ccu.txt b/docs/marvell/misc/mvebu-ccu.txt new file mode 100644 index 00000000..337a5c6c --- /dev/null +++ b/docs/marvell/misc/mvebu-ccu.txt @@ -0,0 +1,21 @@ +Marvell CCU address decoding bindings +===================================== + +The CCU node includes a description of the address decoding configuration. + +Mandatory functions: + - marvell_get_ccu_memory_map + return the CCU windows configuration and the number of windows + of the specific AP. + +Mandatory structures: + ccu_memory_map - Array that includes the configuration of the windows + every window/entry is a struct which has 3 parameters: + - Base address of the window + - Size of the window + - Target-ID of the window + +Example: + struct addr_map_win ccu_memory_map[] = { + {0x00000000f2000000, 0x00000000e000000, IO_0_TID}, /* IO window */ + }; diff --git a/docs/marvell/misc/mvebu-io-win.txt b/docs/marvell/misc/mvebu-io-win.txt new file mode 100644 index 00000000..59e4b657 --- /dev/null +++ b/docs/marvell/misc/mvebu-io-win.txt @@ -0,0 +1,33 @@ +Marvell IO WIN address decoding bindings +===================================== + +The IO WIN includes a description of the address decoding configuration. + +Transactions that are decoded by CCU windows as IO peripheral, have an additional +layer of decoding. This additional address decoding layer defines one of the +following targets: + 0x0 = BootRom + 0x1 = STM (Serial Trace Macro-cell, a programmer's port into trace stream) + 0x2 = SPI direct access + 0x3 = PCIe registers + 0x4 = MCI Port + 0x5 = PCIe port + +Mandatory functions: + - marvell_get_io_win_memory_map + returns the IO windows configuration and the number of windows + of the specific AP. + +Mandatory structures: + io_win_memory_map - Array that include the configuration of the windows + every window/entry is a struct which has 3 parameters: + - Base address of the window + - Size of the window + - Target-ID of the window + +Example: + struct addr_map_win io_win_memory_map[] = { + {0x00000000fe000000, 0x000000001f00000, PCIE_PORT_TID}, /* PCIe window 31Mb for PCIe port*/ + {0x00000000ffe00000, 0x000000000100000, PCIE_REGS_TID}, /* PCI-REG window 64Kb for PCIe-reg*/ + {0x00000000f6000000, 0x000000000100000, MCIPHY_TID}, /* MCI window 1Mb for PHY-reg*/ + }; diff --git a/docs/marvell/misc/mvebu-iob.txt b/docs/marvell/misc/mvebu-iob.txt new file mode 100644 index 00000000..6dea0a2e --- /dev/null +++ b/docs/marvell/misc/mvebu-iob.txt @@ -0,0 +1,38 @@ +Marvell IOB address decoding bindings +===================================== + +The IOB includes a description of the address decoding configuration. + +IOB supports up to n (in CP110 n=24) windows for external memory transaction. +When a transaction passes through the IOB, its address is compared to each of +the enabled windows. If there is a hit and it passes the security checks, it is +advanced to the target port. + +Mandatory functions: + - marvell_get_iob_memory_map + returns the IOB windows configuration and the number of windows + +Mandatory structures: + iob_memory_map - Array that include the configuration of the windows + every window/entry is a struct which has 3 parameters: + - Base address of the window + - Size of the window + - Target-ID of the window + +Target ID options: + - 0x0 = Internal configuration space + - 0x1 = MCI0 + - 0x2 = PEX1_X1 + - 0x3 = PEX2_X1 + - 0x4 = PEX0_X4 + - 0x5 = NAND flash + - 0x6 = RUNIT (NOR/SPI/BootRoom) + - 0x7 = MCI1 + +Example: + struct addr_map_win iob_memory_map[] = { + {0x00000000f7000000, 0x0000000001000000, PEX1_TID}, /* PEX1_X1 window */ + {0x00000000f8000000, 0x0000000001000000, PEX2_TID}, /* PEX2_X1 window */ + {0x00000000f6000000, 0x0000000001000000, PEX0_TID}, /* PEX0_X4 window */ + {0x00000000f9000000, 0x0000000001000000, NAND_TID} /* NAND window */ + }; |