diff options
| author | Jiafei Pan <Jiafei.Pan@nxp.com> | 2018-03-21 07:20:09 +0000 |
|---|---|---|
| committer | Jiafei Pan <Jiafei.Pan@nxp.com> | 2018-04-07 10:12:21 +0800 |
| commit | 7d173fc594d7d50c02e180c56c59ca1d3e51152e (patch) | |
| tree | 8c04f896f7a0569bd7ba7a4baa0368c6be18f9b9 /docs | |
| parent | 93883a293145f6c85b3fc8c219f400e28b7d1491 (diff) | |
Add support for BL2 in XIP memory
In some use-cases BL2 will be stored in eXecute In Place (XIP) memory,
like BL1. In these use-cases, it is necessary to initialize the RW sections
in RAM, while leaving the RO sections in place. This patch enable this
use-case with a new build option, BL2_IN_XIP_MEM. For now, this option
is only supported when BL2_AT_EL3 is 1.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Diffstat (limited to 'docs')
| -rw-r--r-- | docs/porting-guide.rst | 28 | ||||
| -rw-r--r-- | docs/user-guide.rst | 6 |
2 files changed, 33 insertions, 1 deletions
diff --git a/docs/porting-guide.rst b/docs/porting-guide.rst index ff5bb122..12e135f7 100644 --- a/docs/porting-guide.rst +++ b/docs/porting-guide.rst @@ -217,11 +217,37 @@ platform port to define additional platform porting constants in - **#define : BL2\_BASE** Defines the base address in secure RAM where BL1 loads the BL2 binary image. - Must be aligned on a page-size boundary. + Must be aligned on a page-size boundary. This constant is not applicable + when BL2_IN_XIP_MEM is set to '1'. - **#define : BL2\_LIMIT** Defines the maximum address in secure RAM that the BL2 image can occupy. + This constant is not applicable when BL2_IN_XIP_MEM is set to '1'. + +- **#define : BL2\_RO\_BASE** + + Defines the base address in secure XIP memory where BL2 RO section originally + lives. Must be aligned on a page-size boundary. This constant is only needed + when BL2_IN_XIP_MEM is set to '1'. + +- **#define : BL2\_RO\_LIMIT** + + Defines the maximum address in secure XIP memory that BL2's actual content + (i.e. excluding any data section allocated at runtime) can occupy. This + constant is only needed when BL2_IN_XIP_MEM is set to '1'. + +- **#define : BL2\_RW\_BASE** + + Defines the base address in secure RAM where BL2's read-write data will live + at runtime. Must be aligned on a page-size boundary. This constant is only + needed when BL2_IN_XIP_MEM is set to '1'. + +- **#define : BL2\_RW\_LIMIT** + + Defines the maximum address in secure RAM that BL2's read-write data can + occupy at runtime. This constant is only needed when BL2_IN_XIP_MEM is set + to '1'. - **#define : BL31\_BASE** diff --git a/docs/user-guide.rst b/docs/user-guide.rst index 57948554..fdf1568e 100644 --- a/docs/user-guide.rst +++ b/docs/user-guide.rst @@ -246,6 +246,12 @@ Common build options - ``BL2_AT_EL3``: This is an optional build option that enables the use of BL2 at EL3 execution level. +- ``BL2_IN_XIP_MEM``: In some use-cases BL2 will be stored in eXecute In Place + (XIP) memory, like BL1. In these use-cases, it is necessary to initialize + the RW sections in RAM, while leaving the RO sections in place. This option + enable this use-case. For now, this option is only supported when BL2_AT_EL3 + is set to '1'. + - ``BL31``: This is an optional build option which specifies the path to BL31 image for the ``fip`` target. In this case, the BL31 in TF-A will not be built. |