diff options
| author | Konstantin Porotchkin <kostap@marvell.com> | 2018-02-27 12:50:48 +0200 |
|---|---|---|
| committer | Kostya Porotchkin <kostap@marvell.com> | 2018-02-27 14:35:28 +0200 |
| commit | 4fb777719dfef4d418a413cc054ac4241aa41a87 (patch) | |
| tree | c2fe6340eac354e83016f644bb3b0425e57738e9 /drivers | |
| parent | fa6cb86860b575b698a09b80dac5dd21e3ed4b84 (diff) | |
clocks: Rearrange headers in clock drivers
Remove unneded includes from the header files
Re-arrange headers in the source files in ABC order as required
by the mainline code guidelines
Change-Id: Ie60d730f5aaeb3b4babec1ce023756e39da24f29
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/51132
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Hanna Hawa <hannah@marvell.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/marvell/aro.c | 8 | ||||
| -rw-r--r-- | drivers/marvell/eawg.c | 5 |
2 files changed, 6 insertions, 7 deletions
diff --git a/drivers/marvell/aro.c b/drivers/marvell/aro.c index 3eb16819..83a79edd 100644 --- a/drivers/marvell/aro.c +++ b/drivers/marvell/aro.c @@ -32,13 +32,13 @@ *************************************************************************** */ -#include <plat_def.h> +#include <aro.h> #include <debug.h> +#include <delay_timer.h> #include <mmio.h> -#include <aro.h> #include <mvebu.h> #include <plat_config.h> -#include <delay_timer.h> +#include <plat_def.h> #define CPU_ARO_CTRL_BASE MVEBU_REGS_BASE + (0x6F8D00) #define SAR_REG_ADDR MVEBU_REGS_BASE + 0x6f4400 @@ -342,5 +342,3 @@ int init_aro(void) return 0; } - - diff --git a/drivers/marvell/eawg.c b/drivers/marvell/eawg.c index 6f24e01d..248d0fce 100644 --- a/drivers/marvell/eawg.c +++ b/drivers/marvell/eawg.c @@ -6,10 +6,11 @@ */ #include <eawg.h> -#include <stdio.h> -#include <plat_def.h> #include <delay_timer.h> #include <debug.h> +#include <mmio.h> +#include <stdio.h> +#include <plat_def.h> #define EAWG_BASE_REGS(ap) MVEBU_AR_RFU_BASE(ap) + 0x6000 #define EAWG_WRITE_ADDR_REG(ap) (EAWG_BASE_REGS(ap) + 0x0) |