diff options
author | Neta Zur <neta@marvell.com> | 2018-01-09 11:32:46 +0200 |
---|---|---|
committer | Kostya Porotchkin <kostap@marvell.com> | 2018-01-22 16:51:08 +0200 |
commit | 6e94b1e78a4410415d3bbae581f642eb95dba80c (patch) | |
tree | d7be8b39c66038a6cd96f9167272dc7dc2f1e4e3 /drivers | |
parent | 59dc3f05d1dcbb3cedc7a0550fe7247b952a6505 (diff) |
cp110: pd: remove SATA AXI code from Palladium
Palladium doesn't support the SATA AXI memory
Change-Id: I15e09724c4a6fccaabb4002932fd07e2fb651c52
Signed-off-by: Neta Zur <neta@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/48718
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/marvell/mochi/cp110_setup.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/marvell/mochi/cp110_setup.c b/drivers/marvell/mochi/cp110_setup.c index 30e4b46f..d88c2535 100644 --- a/drivers/marvell/mochi/cp110_setup.c +++ b/drivers/marvell/mochi/cp110_setup.c @@ -339,6 +339,7 @@ static void cp110_axi_attr_init(uintptr_t base) } } +#if !PALLADIUM /* SATA IOCC supported, cache attributes * for SATA MBUS to AXI configuration. */ @@ -350,7 +351,7 @@ static void cp110_axi_attr_init(uintptr_t base) data |= (CACHE_ATTR_READ_ALLOC | CACHE_ATTR_CACHEABLE | CACHE_ATTR_BUFFERABLE) << MVEBU_SATA_M2A_AXI_ARCACHE_OFFSET; mmio_write_32(base + MVEBU_SATA_M2A_AXI_PORT_CTRL_REG, data); - +#endif /* Set all IO's AXI attribute to non-secure access. */ for (index = 0; index < MVEBU_AXI_PROT_REGS_NUM; index++) mmio_write_32(base + MVEBU_AXI_PROT_REG(index), DOMAIN_SYSTEM_SHAREABLE); |