diff options
| author | Hanna Hawa <hannah@marvell.com> | 2018-03-13 13:08:18 +0200 |
|---|---|---|
| committer | Kostya Porotchkin <kostap@marvell.com> | 2018-03-13 15:17:25 +0200 |
| commit | e82783a83dad1de885d1807e91a0e2aecac4c890 (patch) | |
| tree | e8034a6e266dfc6145616b355c38d192cca61d18 /plat/marvell/a8k-p/common/plat_bl31_setup.c | |
| parent | 0605cd7ba6df7d40dd83bc74fb52ddfdcf4f5a93 (diff) | |
bl1: ap810: move soc_misc_configuration init to BL1
Watchdog need to be used in BL1, in the next patch.
Change-Id: If73945e78e2d785581a92938f9e8e2afdea124fd
Signed-off-by: Hanna Hawa <hannah@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/51763
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
Diffstat (limited to 'plat/marvell/a8k-p/common/plat_bl31_setup.c')
| -rw-r--r-- | plat/marvell/a8k-p/common/plat_bl31_setup.c | 20 |
1 files changed, 0 insertions, 20 deletions
diff --git a/plat/marvell/a8k-p/common/plat_bl31_setup.c b/plat/marvell/a8k-p/common/plat_bl31_setup.c index 3c4985b5..9af6bfe7 100644 --- a/plat/marvell/a8k-p/common/plat_bl31_setup.c +++ b/plat/marvell/a8k-p/common/plat_bl31_setup.c @@ -37,10 +37,6 @@ #define CCU_HTC_ASET_WA (0x1 << 5) -/* SYSRST_OUTn Config definitions */ -#define MVEBU_SYSRST_OUT_CONFIG_REG(ap) (MVEBU_AP_MISC_SOC_BASE(ap) + 0x4) -#define WD_MASK_SYS_RST_OUT (1 << 2) - /* Generic Timer System Controller */ #define MVEBU_MSS_GTCR_REG(ap) (MVEBU_REGS_BASE_AP(ap) + 0x581000) #define MVEBU_MSS_GTCR_ENABLE_BIT 0x1 @@ -245,20 +241,6 @@ static void ap810_stream_id_init(int ap_id) debug_exit(); } -static void ap810_soc_misc_configurations(int ap) -{ - uint32_t reg; - - debug_enter(); - /* Un-mask Watchdog reset from influencing the SYSRST_OUTn. - * Otherwise, upon WD timeout, the WD reset singal won't trigger reset - */ - reg = mmio_read_32(MVEBU_SYSRST_OUT_CONFIG_REG(ap)); - reg &= ~(WD_MASK_SYS_RST_OUT); - mmio_write_32(MVEBU_SYSRST_OUT_CONFIG_REG(ap), reg); - debug_exit(); -} - /* Setup events that controls the propagation * of CPU event between dies. */ @@ -414,8 +396,6 @@ static void ap810_bl31_init(void) ap810_setup_events(ap_id); /* Setup stream-id */ ap810_stream_id_init(ap_id); - /* misc configuration of the SoC */ - ap810_soc_misc_configurations(ap_id); } ap810_generic_timer_init(); |