diff options
| author | Igal Liberman <igall@marvell.com> | 2017-07-16 18:55:10 +0300 |
|---|---|---|
| committer | Kostya Porotchkin <kostap@marvell.com> | 2017-07-17 11:29:00 +0300 |
| commit | c3099d02706d8868b2a966800dc8795c7dff9128 (patch) | |
| tree | efa9b09351105cb91a0bb2ff7f6256a44891679e /plat/marvell/a8k/common/plat_bl31_setup.c | |
| parent | dfcdadcbcd9e640d95413db9ca67c4d3036ed51e (diff) | |
plat/marvell: a80x0_mcbin: add pcie reset release through GPIO
A8040 MACCHIATObin releases the reset of the PCIe via GPIO (number 52).
Currently we perform the reset in u-boot which might be too late for
some PCIe endpoints.
This patch adds the required code to get the PCIe card out of reset
and adds a weak stub for other platforms which do not require this.
Change-Id: I43a2e20d091985cf858165d36dc7a8911d0457e0
Signed-off-by: Igal Liberman <igall@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/41656
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Diffstat (limited to 'plat/marvell/a8k/common/plat_bl31_setup.c')
| -rw-r--r-- | plat/marvell/a8k/common/plat_bl31_setup.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/plat/marvell/a8k/common/plat_bl31_setup.c b/plat/marvell/a8k/common/plat_bl31_setup.c index ab616a50..0decb590 100644 --- a/plat/marvell/a8k/common/plat_bl31_setup.c +++ b/plat/marvell/a8k/common/plat_bl31_setup.c @@ -33,6 +33,7 @@ */ #include <plat_marvell.h> +#include <plat_config.h> #include <plat_private.h> #include <apn806_setup.h> #include <cp110_setup.h> @@ -46,6 +47,13 @@ #include <mss_mem.h> #endif +/* Set a weak stub for platforms that don't need to configure GPIO */ +#pragma weak marvell_gpio_config +int marvell_gpio_config(void) +{ + return 0; +} + void marvell_bl31_mpp_init(void) { uint32_t reg; @@ -108,4 +116,7 @@ void bl31_plat_arch_setup(void) if (mailbox[MBOX_IDX_MAGIC] != MVEBU_MAILBOX_MAGIC_NUM || mailbox[MBOX_IDX_SUSPEND_MAGIC] != MVEBU_MAILBOX_SUSPEND_STATE) marvell_bl31_mss_init(); + + /* Configure GPIO */ + marvell_gpio_config(); } |