plat: marvell: a8k: allow to load scp_bl2 firmware that doesn't contain PM FW

Hitherto if the SCP_BL2 path was defined, Marvell platform code
(plat/marvell/a8k/common/a8k_common.mk via
 plat/marvell/a8k/common/mss/mss_common.mk) was defining SCP_IMAGE, which was
used in power management related code(mainly in plat_pm.c) for choosing proper
PM related code. Therefore there were two different situation:
1) The SCP_BL2 was not defined, then the ATF used its own PM related code
2) The SCP_BL2 was defined and ATF assumed that during SCP_BL2 stage the
firmware with PM support was loaded into MSS AP CM3 and PM was managed mainly
via IPC messages between ATF and MSS AP CM3 firmware.

Now in some cases the firmware for MSS AP CM3 does not support PM therefore
it causes some issue: during Linux boot only one CPU was brought out from reset
and all secondary CPUs remained down.

After this change the Marvell platform code can verify if the firmware loaded to
MSS AP CM3 has PM support at runtime and does not make assumption basing on
SCP_BL2 definition anymore.

In other words all preprocessor condition of SCP_IMAGE was replaced by runtime
condition that allows to really distinguish between situation where we are
running PM firmware or not, so three different scenario are possible and handled
correctly now:
1) The SCP_BL2 is not used at all then the ATF uses its own PM related code.
2) The SCP_BL2 contains firmware for MSS AP CM3 and it supports PM, then ATF
manage PM mainly via IPC messages between ATF and MSS AP CM3 firmware.
3) The SCP_BL2 does not contain firmware for MSS AP CM3 or it contain firmware
that does not support PM, then ATF uses its own PM related code.

Change-Id: I26da4db968966cb5e61714ff192fb645a3a57875
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/43573
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
Reviewed-by: Omri Itach <omrii@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>

1 files changed, 16 insertions, 6 deletions

diff --git a/plat/marvell/a8k/common/plat_bl31_setup.c b/plat/marvell/a8k/common/plat_bl31_setup.c
index 8083b398..e2e988fc 100644
--- a/plat/marvell/a8k/common/plat_bl31_setup.c
+++ b/plat/marvell/a8k/common/plat_bl31_setup.c
@@ -42,10 +42,10 @@
 #include <mci.h>
 #include <debug.h>
 
-#ifdef SCP_IMAGE
 #include <mss_ipc_drv.h>
 #include <mss_mem.h>
-#endif
+
+static _Bool pm_fw_running;
 
 /* Set a weak stub for platforms that don't need to configure GPIO */
 #pragma weak marvell_gpio_config
@@ -69,17 +69,27 @@ void marvell_bl31_mpp_init(void)
 
 void marvell_bl31_mss_init(void)
 {
-#ifdef SCP_IMAGE
 	struct mss_pm_ctrl_block *mss_pm_crtl =
 			(struct mss_pm_ctrl_block *)MSS_SRAM_PM_CONTROL_BASE;
 
+	/* Check that the image was loaded successfully */
+	if (mss_pm_crtl->handshake != HOST_ACKNOWLEDGEMENT) {
+		NOTICE("MSS PM is not supported in this build\n");
+		return;
+	}
+
+	/* If we got here it means that the PM firmware is running */
+	pm_fw_running = 1;
+
 	INFO("MSS IPC init\n");
 
 	if (mss_pm_crtl->ipc_state == IPC_INITIALIZED)
 		mv_pm_ipc_init(mss_pm_crtl->ipc_base_address | MVEBU_REGS_BASE);
-#else
-	INFO("MSS is not supported in this build\n");
-#endif
+}
+
+_Bool is_pm_fw_running(void)
+{
+	return pm_fw_running;
 }
 
 /* This function overruns the same function in marvell_bl31_setup.c */