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authorHanna Hawa <hannah@marvell.com>2017-08-25 17:24:31 +0300
committerKostya Porotchkin <kostap@marvell.com>2017-08-27 17:12:39 +0300
commit6745beea9c15872d3f86c89c66bd2f442d4c64cb (patch)
tree11789a1c0ed1771f2348978bc51e2d4ce22bf4c3 /plat
parentf2e69c9b9d8309d4db4a6b4a7826821711234b4d (diff)
mvebu: io-win: add function to get the target ID of GCR
Part of AP810 preparation and driver changes, may some north bridge have different target IDs for the GCR. Change-Id: I06221baf00f2f69d40382e27d49fe166ab43de4e Signed-off-by: Hanna Hawa <hannah@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/43402 Reviewed-by: Kostya Porotchkin <kostap@marvell.com> Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Diffstat (limited to 'plat')
-rw-r--r--plat/marvell/a8k/a3900/board/marvell_plat_config.c5
-rw-r--r--plat/marvell/a8k/a70x0/board/marvell_plat_config.c5
-rw-r--r--plat/marvell/a8k/a70x0_amc/board/marvell_plat_config.c5
-rw-r--r--plat/marvell/a8k/a70x0_cust/board/marvell_plat_config.c5
-rw-r--r--plat/marvell/a8k/a70x0_pcac/board/marvell_plat_config.c5
-rw-r--r--plat/marvell/a8k/a80x0/board/marvell_plat_config.c5
-rw-r--r--plat/marvell/a8k/a80x0_mcbin/board/marvell_plat_config.c5
-rw-r--r--plat/marvell/a8k/a80x0_ocp/board/marvell_plat_config.c5
8 files changed, 40 insertions, 0 deletions
diff --git a/plat/marvell/a8k/a3900/board/marvell_plat_config.c b/plat/marvell/a8k/a3900/board/marvell_plat_config.c
index 6fd4ddf9..c7f50197 100644
--- a/plat/marvell/a8k/a3900/board/marvell_plat_config.c
+++ b/plat/marvell/a8k/a3900/board/marvell_plat_config.c
@@ -79,6 +79,11 @@ uintptr_t marvell_get_io_win_reg_offs(int ap_index)
return MVEBU_IO_WIN_BASE;
}
+uint32_t marvell_get_io_win_gcr_target(int ap_index)
+{
+ return PIDI_TID;
+}
+
int marvell_get_io_win_memory_map(int ap_index, struct io_win **win, uint32_t *size)
{
*win = io_win_memory_map;
diff --git a/plat/marvell/a8k/a70x0/board/marvell_plat_config.c b/plat/marvell/a8k/a70x0/board/marvell_plat_config.c
index 76dc2c0f..6d89a83b 100644
--- a/plat/marvell/a8k/a70x0/board/marvell_plat_config.c
+++ b/plat/marvell/a8k/a70x0/board/marvell_plat_config.c
@@ -78,6 +78,11 @@ uintptr_t marvell_get_io_win_reg_offs(int ap_index)
return MVEBU_IO_WIN_BASE;
}
+uint32_t marvell_get_io_win_gcr_target(int ap_index)
+{
+ return PIDI_TID;
+}
+
int marvell_get_io_win_memory_map(int ap_index, struct io_win **win, uint32_t *size)
{
*win = io_win_memory_map;
diff --git a/plat/marvell/a8k/a70x0_amc/board/marvell_plat_config.c b/plat/marvell/a8k/a70x0_amc/board/marvell_plat_config.c
index 9afa9548..b36dc418 100644
--- a/plat/marvell/a8k/a70x0_amc/board/marvell_plat_config.c
+++ b/plat/marvell/a8k/a70x0_amc/board/marvell_plat_config.c
@@ -78,6 +78,11 @@ uintptr_t marvell_get_io_win_reg_offs(int ap_index)
return MVEBU_IO_WIN_BASE;
}
+uint32_t marvell_get_io_win_gcr_target(int ap_index)
+{
+ return PIDI_TID;
+}
+
int marvell_get_io_win_memory_map(int ap_index, struct io_win **win, uint32_t *size)
{
*win = io_win_memory_map;
diff --git a/plat/marvell/a8k/a70x0_cust/board/marvell_plat_config.c b/plat/marvell/a8k/a70x0_cust/board/marvell_plat_config.c
index 55b5ff0b..0dbfd094 100644
--- a/plat/marvell/a8k/a70x0_cust/board/marvell_plat_config.c
+++ b/plat/marvell/a8k/a70x0_cust/board/marvell_plat_config.c
@@ -79,6 +79,11 @@ uintptr_t marvell_get_io_win_reg_offs(int ap_index)
return MVEBU_IO_WIN_BASE;
}
+uint32_t marvell_get_io_win_gcr_target(int ap_index)
+{
+ return PIDI_TID;
+}
+
int marvell_get_io_win_memory_map(int ap_index, struct io_win **win, uint32_t *size)
{
*win = io_win_memory_map;
diff --git a/plat/marvell/a8k/a70x0_pcac/board/marvell_plat_config.c b/plat/marvell/a8k/a70x0_pcac/board/marvell_plat_config.c
index 35955dea..be990dec 100644
--- a/plat/marvell/a8k/a70x0_pcac/board/marvell_plat_config.c
+++ b/plat/marvell/a8k/a70x0_pcac/board/marvell_plat_config.c
@@ -78,6 +78,11 @@ uintptr_t marvell_get_io_win_reg_offs(int ap_index)
return MVEBU_IO_WIN_BASE;
}
+uint32_t marvell_get_io_win_gcr_target(int ap_index)
+{
+ return PIDI_TID;
+}
+
int marvell_get_io_win_memory_map(int ap_index, struct io_win **win, uint32_t *size)
{
*win = io_win_memory_map;
diff --git a/plat/marvell/a8k/a80x0/board/marvell_plat_config.c b/plat/marvell/a8k/a80x0/board/marvell_plat_config.c
index c772c2c0..db814490 100644
--- a/plat/marvell/a8k/a80x0/board/marvell_plat_config.c
+++ b/plat/marvell/a8k/a80x0/board/marvell_plat_config.c
@@ -85,6 +85,11 @@ uintptr_t marvell_get_io_win_reg_offs(int ap_index)
return MVEBU_IO_WIN_BASE;
}
+uint32_t marvell_get_io_win_gcr_target(int ap_index)
+{
+ return PIDI_TID;
+}
+
int marvell_get_io_win_memory_map(int ap_index, struct io_win **win, uint32_t *size)
{
*win = io_win_memory_map;
diff --git a/plat/marvell/a8k/a80x0_mcbin/board/marvell_plat_config.c b/plat/marvell/a8k/a80x0_mcbin/board/marvell_plat_config.c
index 8b66da49..a1b7b863 100644
--- a/plat/marvell/a8k/a80x0_mcbin/board/marvell_plat_config.c
+++ b/plat/marvell/a8k/a80x0_mcbin/board/marvell_plat_config.c
@@ -118,6 +118,11 @@ uintptr_t marvell_get_io_win_reg_offs(int ap_index)
return MVEBU_IO_WIN_BASE;
}
+uint32_t marvell_get_io_win_gcr_target(int ap_index)
+{
+ return PIDI_TID;
+}
+
int marvell_get_io_win_memory_map(int ap_index, struct io_win **win, uint32_t *size)
{
*win = io_win_memory_map;
diff --git a/plat/marvell/a8k/a80x0_ocp/board/marvell_plat_config.c b/plat/marvell/a8k/a80x0_ocp/board/marvell_plat_config.c
index 5b2aaf85..38a578c3 100644
--- a/plat/marvell/a8k/a80x0_ocp/board/marvell_plat_config.c
+++ b/plat/marvell/a8k/a80x0_ocp/board/marvell_plat_config.c
@@ -79,6 +79,11 @@ uintptr_t marvell_get_io_win_reg_offs(int ap_index)
return MVEBU_IO_WIN_BASE;
}
+uint32_t marvell_get_io_win_gcr_target(int ap_index)
+{
+ return PIDI_TID;
+}
+
int marvell_get_io_win_memory_map(int ap_index, struct io_win **win, uint32_t *size)
{
*win = io_win_memory_map;