diff options
| author | Konstantin Porotchkin <kostap@marvell.com> | 2018-02-13 16:58:54 +0200 |
|---|---|---|
| committer | Hanna Hawa <hannah@marvell.com> | 2018-02-13 20:41:29 +0200 |
| commit | 26a44a50d9365137993bfad65b3217a2b44663bc (patch) | |
| tree | f8e34e3f7f0533b28b36b826468eacd5e6b11140 /plat | |
| parent | 24e219e040df8cbef8a80fe1aaaef077220ce7f9 (diff) | |
a8k-p: Reduce indentation in plat_dram_update_topology
Reduce indentation level in plat_dram_update_topology()
Change-Id: Ie43a753895f62f3cb43ef9e857cd65ed806fd51b
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/50536
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Hanna Hawa <hannah@marvell.com>
Diffstat (limited to 'plat')
| -rw-r--r-- | plat/marvell/a8k-p/common/plat_dram.c | 51 |
1 files changed, 26 insertions, 25 deletions
diff --git a/plat/marvell/a8k-p/common/plat_dram.c b/plat/marvell/a8k-p/common/plat_dram.c index fc770071..8d933bea 100644 --- a/plat/marvell/a8k-p/common/plat_dram.c +++ b/plat/marvell/a8k-p/common/plat_dram.c @@ -146,31 +146,32 @@ static void plat_dram_update_topology(uint32_t ap_id, struct mv_ddr_iface *iface struct mv_ddr_topology_map *tm = &iface->tm; int ret; - if (tm->cfg_src == MV_DDR_CFG_SPD) { - /* Initialize I2C of AP-0 to read SPD - ** need to initialize the I2C once. - ** */ - if (i2c_init_done == 0) { - /* Configure MPPs to enable i2c */ - mpp_config(); - /* Enable I2C on AP0 */ - i2c_init((void *)MVEBU_AP_I2C_BASE(0)); - /* Mark done */ - i2c_init_done = 1; - } - /* Select SPD memory page to access DRAM configuration */ - i2c_write(iface->spd_page_sel_addr, 0x0, 1, tm->spd_data.all_bytes, 1); - /* Read data from SPD */ - ret = i2c_read(iface->spd_data_addr, 0x0, 1, tm->spd_data.all_bytes, - sizeof(tm->spd_data.all_bytes)); - /* Mark the interface as non-existing if the SPD read fails */ - if (ret < 0) { - NOTICE("AP-%d DRAM-%d - EMPTY\n", ap_id, iface->id); - iface->state = MV_DDR_IFACE_DNE; - } else { - INFO("AP-%d DRAM-%d - OK\n", ap_id, iface->id); - iface->state = MV_DDR_IFACE_NRDY; - } + if (tm->cfg_src != MV_DDR_CFG_SPD) + return; + /* Initialize I2C of AP-0 to read SPD + ** need to initialize the I2C once. + ** + */ + if (i2c_init_done == 0) { + /* Configure MPPs to enable i2c */ + mpp_config(); + /* Enable I2C on AP0 */ + i2c_init((void *)MVEBU_AP_I2C_BASE(0)); + /* Mark done */ + i2c_init_done = 1; + } + /* Select SPD memory page to access DRAM configuration */ + i2c_write(iface->spd_page_sel_addr, 0x0, 1, tm->spd_data.all_bytes, 1); + /* Read data from SPD */ + ret = i2c_read(iface->spd_data_addr, 0x0, 1, tm->spd_data.all_bytes, + sizeof(tm->spd_data.all_bytes)); + /* Mark the interface as non-existing if the SPD read fails */ + if (ret < 0) { + NOTICE("AP-%d DRAM-%d - EMPTY\n", ap_id, iface->id); + iface->state = MV_DDR_IFACE_DNE; + } else { + INFO("AP-%d DRAM-%d - OK\n", ap_id, iface->id); + iface->state = MV_DDR_IFACE_NRDY; } } |