diff options
| -rw-r--r-- | plat/mediatek/mt6795/platform.mk | 2 | ||||
| -rw-r--r-- | plat/rockchip/rk3368/platform.mk | 1 | ||||
| -rw-r--r-- | plat/xilinx/zynqmp/platform.mk | 2 |
3 files changed, 5 insertions, 0 deletions
diff --git a/plat/mediatek/mt6795/platform.mk b/plat/mediatek/mt6795/platform.mk index e105dfe5..6164b25f 100644 --- a/plat/mediatek/mt6795/platform.mk +++ b/plat/mediatek/mt6795/platform.mk @@ -87,6 +87,8 @@ $(eval $(call add_define,ARM_GIC_ARCH)) ERRATA_A53_826319 := 1 ERRATA_A53_836870 := 1 +WORKAROUND_CVE_2017_5715 := 0 + # indicate the reset vector address can be programmed PROGRAMMABLE_RESET_ADDRESS := 1 diff --git a/plat/rockchip/rk3368/platform.mk b/plat/rockchip/rk3368/platform.mk index 73a56e34..d43e4295 100644 --- a/plat/rockchip/rk3368/platform.mk +++ b/plat/rockchip/rk3368/platform.mk @@ -76,3 +76,4 @@ BL31_SOURCES += ${RK_GIC_SOURCES} \ ${RK_PLAT_SOC}/drivers/ddr/ddr_rk3368.c \ ENABLE_PLAT_COMPAT := 0 +WORKAROUND_CVE_2017_5715 := 0 diff --git a/plat/xilinx/zynqmp/platform.mk b/plat/xilinx/zynqmp/platform.mk index 33c55a05..bea1da8f 100644 --- a/plat/xilinx/zynqmp/platform.mk +++ b/plat/xilinx/zynqmp/platform.mk @@ -33,6 +33,8 @@ A53_DISABLE_NON_TEMPORAL_HINT := 0 SEPARATE_CODE_AND_RODATA := 1 RESET_TO_BL31 := 1 +WORKAROUND_CVE_2017_5715 := 0 + ifdef ZYNQMP_ATF_MEM_BASE $(eval $(call add_define,ZYNQMP_ATF_MEM_BASE)) |