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-rw-r--r--Makefile8
-rw-r--r--lib/psci/aarch64/psci_helpers.S2
-rw-r--r--plat/marvell/common/marvell_bl31_setup.c6
3 files changed, 16 insertions, 0 deletions
diff --git a/Makefile b/Makefile
index 5f30112e..041890d2 100644
--- a/Makefile
+++ b/Makefile
@@ -64,6 +64,13 @@ CP_NUM := 2
endif
endif
+# Disable BL31 cache for Power-Managment
+ifeq ($(PLAT),$(filter $(PLAT),a70x0))
+BL31_CACHE_DISABLE := 1
+else
+BL31_CACHE_DISABLE := 0
+endif
+
# Marvell images
BOOT_IMAGE := boot-image.bin
BOOT_ENC_IMAGE := boot-image-enc.bin
@@ -647,6 +654,7 @@ $(eval $(call add_define,ARO_ENABLE))
$(eval $(call add_define,LLC_DISABLE))
$(eval $(call add_define,PCI_EP_SUPPORT))
$(eval $(call add_define,CP_NUM))
+$(eval $(call add_define,BL31_CACHE_DISABLE))
################################################################################
# Include BL specific makefiles
diff --git a/lib/psci/aarch64/psci_helpers.S b/lib/psci/aarch64/psci_helpers.S
index afe21ebe..713cac8b 100644
--- a/lib/psci/aarch64/psci_helpers.S
+++ b/lib/psci/aarch64/psci_helpers.S
@@ -106,6 +106,7 @@ func psci_do_pwrup_cache_maintenance
mov x0, sp
bl inv_dcache_range
+#if !BL31_CACHE_DISABLE
/* ---------------------------------------------
* Enable the data cache.
* ---------------------------------------------
@@ -114,6 +115,7 @@ func psci_do_pwrup_cache_maintenance
orr x0, x0, #SCTLR_C_BIT
msr sctlr_el3, x0
isb
+#endif
ldp x29, x30, [sp], #16
ret
diff --git a/plat/marvell/common/marvell_bl31_setup.c b/plat/marvell/common/marvell_bl31_setup.c
index 9008ca64..e1b8b99f 100644
--- a/plat/marvell/common/marvell_bl31_setup.c
+++ b/plat/marvell/common/marvell_bl31_setup.c
@@ -264,7 +264,13 @@ void marvell_bl31_plat_arch_setup(void)
BL_COHERENT_RAM_END
#endif
);
+
+#if BL31_CACHE_DISABLE
+ enable_mmu_el3(DISABLE_DCACHE);
+ INFO("Cache is disabled in BL3\n");
+#else
enable_mmu_el3(0);
+#endif
}
void bl31_plat_arch_setup(void)