diff options
Diffstat (limited to 'include')
34 files changed, 228 insertions, 251 deletions
diff --git a/include/drivers/marvell/a8k_i2c.h b/include/drivers/marvell/a8k_i2c.h index 6605902e..8a9abe8d 100644 --- a/include/drivers/marvell/a8k_i2c.h +++ b/include/drivers/marvell/a8k_i2c.h @@ -1,10 +1,12 @@ /* - * Copyright (C) 2016 - 2018 Marvell International Ltd. + * Copyright (C) 2018 Marvell International Ltd. * * SPDX-License-Identifier: BSD-3-Clause * https://spdx.org/licenses */ - + +/* This driver provides I2C support for Marvell A8K and compatible SoCs */ + #ifndef _A8K_I2C_H_ #define _A8K_I2C_H_ diff --git a/include/drivers/marvell/addr_map.h b/include/drivers/marvell/addr_map.h index c5407dfe..6b957a16 100644 --- a/include/drivers/marvell/addr_map.h +++ b/include/drivers/marvell/addr_map.h @@ -1,10 +1,12 @@ /* - * Copyright (C) 2017, 2018 Marvell International Ltd. + * Copyright (C) 2018 Marvell International Ltd. * * SPDX-License-Identifier: BSD-3-Clause * https://spdx.org/licenses */ +/* Address map types for Marvell address translation unit drivers */ + #ifndef _ADDR_MAP_H_ #define _ADDR_MAP_H_ diff --git a/include/drivers/marvell/amb_adec.h b/include/drivers/marvell/amb_adec.h index 3fe87b19..087864a4 100644 --- a/include/drivers/marvell/amb_adec.h +++ b/include/drivers/marvell/amb_adec.h @@ -1,10 +1,12 @@ /* - * Copyright (C) 2016 - 2018 Marvell International Ltd. + * Copyright (C) 2018 Marvell International Ltd. * * SPDX-License-Identifier: BSD-3-Clause * https://spdx.org/licenses */ +/* AXI to M-Bridge decoding unit driver for Marvell Armada 8K and 8K+ SoCs */ + #ifndef _AMB_ADEC_H_ #define _AMB_ADEC_H_ @@ -29,6 +31,6 @@ enum amb_attribute_ids { #define AMB_MAX_WIN_ID 7 -int init_amb_adec(uintptr_t); +int init_amb_adec(uintptr_t base); #endif /* _AMB_ADEC_H_ */ diff --git a/include/drivers/marvell/cache_llc.h b/include/drivers/marvell/cache_llc.h index ea7298ce..9e417939 100644 --- a/include/drivers/marvell/cache_llc.h +++ b/include/drivers/marvell/cache_llc.h @@ -1,15 +1,19 @@ /* - * Copyright (C) 2015 - 2018 Marvell International Ltd. + * Copyright (C) 2018 Marvell International Ltd. * * SPDX-License-Identifier: BSD-3-Clause * https://spdx.org/licenses */ +/* LLC driver is the Last Level Cache (L3C) driver + * for Marvell SoCs in AP806, AP807, and AP810 + */ + #ifndef _CACHE_LLC_H_ #define _CACHE_LLC_H_ #define LLC_CTRL(ap) (MVEBU_LLC_BASE(ap) + 0x100) -#define LLC_CACHE_SYNC(ap) (MVEBU_LLC_BASE(ap) + 0x700) +#define LLC_SYNC(ap) (MVEBU_LLC_BASE(ap) + 0x700) #define L2X0_INV_WAY(ap) (MVEBU_LLC_BASE(ap) + 0x77C) #define L2X0_CLEAN_WAY(ap) (MVEBU_LLC_BASE(ap) + 0x7BC) #define L2X0_CLEAN_INV_WAY(ap) (MVEBU_LLC_BASE(ap) + 0x7FC) @@ -24,15 +28,13 @@ #define LLC_WAY_MASK 0xFFFFFFFF #ifndef __ASSEMBLY__ -void llc_cache_sync(int); -void llc_flush_all(int); -void llc_clean_all(int); -void llc_inv_all(int); -void llc_disable(int); -void llc_enable(int, int excl_mode); -int llc_is_exclusive(int); -void llc_save(int); -void llc_resume(int); +void llc_cache_sync(int ap_index); +void llc_flush_all(int ap_index); +void llc_clean_all(int ap_index); +void llc_inv_all(int ap_index); +void llc_disable(int ap_index); +void llc_enable(int ap_index, int excl_mode); +int llc_is_exclusive(int ap_index); void llc_runtime_enable(int ap_index); #endif diff --git a/include/drivers/marvell/ccu.h b/include/drivers/marvell/ccu.h index 36438881..ff30a76a 100644 --- a/include/drivers/marvell/ccu.h +++ b/include/drivers/marvell/ccu.h @@ -1,10 +1,12 @@ /* - * Copyright (C) 2016 - 2018 Marvell International Ltd. + * Copyright (C) 2018 Marvell International Ltd. * * SPDX-License-Identifier: BSD-3-Clause * https://spdx.org/licenses */ +/* CCU unit device driver for Marvell AP807, AP807 and AP810 SoCs */ + #ifndef _CCU_H_ #define _CCU_H_ @@ -13,16 +15,20 @@ #endif /* CCU registers definitions */ -#define CCU_WIN_CR_OFFSET(ap, win) (MVEBU_CCU_BASE(ap) + 0x0 + (0x10 * win)) +#define CCU_WIN_CR_OFFSET(ap, win) (MVEBU_CCU_BASE(ap) + 0x0 + \ + (0x10 * win)) #define CCU_TARGET_ID_OFFSET (8) #define CCU_TARGET_ID_MASK (0x7F) -#define CCU_WIN_SCR_OFFSET(ap, win) (MVEBU_CCU_BASE(ap) + 0x4 + (0x10 * win)) +#define CCU_WIN_SCR_OFFSET(ap, win) (MVEBU_CCU_BASE(ap) + 0x4 + \ + (0x10 * win)) #define CCU_WIN_ENA_WRITE_SECURE (0x1) #define CCU_WIN_ENA_READ_SECURE (0x2) -#define CCU_WIN_ALR_OFFSET(ap, win) (MVEBU_CCU_BASE(ap) + 0x8 + (0x10 * win)) -#define CCU_WIN_AHR_OFFSET(ap, win) (MVEBU_CCU_BASE(ap) + 0xC + (0x10 * win)) +#define CCU_WIN_ALR_OFFSET(ap, win) (MVEBU_CCU_BASE(ap) + 0x8 + \ + (0x10 * win)) +#define CCU_WIN_AHR_OFFSET(ap, win) (MVEBU_CCU_BASE(ap) + 0xC + \ + (0x10 * win)) #define CCU_WIN_GCR_OFFSET(ap) (MVEBU_CCU_BASE(ap) + 0xD0) #define CCU_GCR_TARGET_OFFSET (8) diff --git a/include/drivers/marvell/gwin.h b/include/drivers/marvell/gwin.h index f5c113dc..5dc9f244 100644 --- a/include/drivers/marvell/gwin.h +++ b/include/drivers/marvell/gwin.h @@ -1,16 +1,18 @@ /* - * Copyright (C) 2017, 2018 Marvell International Ltd. + * Copyright (C) 2018 Marvell International Ltd. * * SPDX-License-Identifier: BSD-3-Clause * https://spdx.org/licenses */ +/* GWIN unit device driver for Marvell AP810 SoC */ + #ifndef _GWIN_H_ #define _GWIN_H_ #include <addr_map.h> -int init_gwin(int); +int init_gwin(int ap_index); void gwin_temp_win_insert(int ap_index, struct addr_map_win *win, int size); void gwin_temp_win_remove(int ap_index, struct addr_map_win *win, int size); diff --git a/include/drivers/marvell/i2c.h b/include/drivers/marvell/i2c.h index 7118547e..bd143852 100644 --- a/include/drivers/marvell/i2c.h +++ b/include/drivers/marvell/i2c.h @@ -1,10 +1,10 @@ /* - * Copyright (C) 2016 - 2018 Marvell International Ltd. + * Copyright (C) 2018 Marvell International Ltd. * * SPDX-License-Identifier: BSD-3-Clause * https://spdx.org/licenses */ - + #ifndef _I2C_H_ #define _I2C_H_ diff --git a/include/drivers/marvell/io_win.h b/include/drivers/marvell/io_win.h index 4ec2cc0e..4102a11a 100644 --- a/include/drivers/marvell/io_win.h +++ b/include/drivers/marvell/io_win.h @@ -1,16 +1,18 @@ /* - * Copyright (C) 2016 - 2018 Marvell International Ltd. + * Copyright (C) 2018 Marvell International Ltd. * * SPDX-License-Identifier: BSD-3-Clause * https://spdx.org/licenses */ +/* IO Window unit device driver for Marvell AP807, AP807 and AP810 SoCs */ + #ifndef _IO_WIN_H_ #define _IO_WIN_H_ #include <addr_map.h> -int init_io_win(int); +int init_io_win(int ap_index); void iow_temp_win_insert(int ap_index, struct addr_map_win *win, int size); void iow_temp_win_remove(int ap_index, struct addr_map_win *win, int size); void iow_save_win_all(int ap_id); diff --git a/include/drivers/marvell/iob.h b/include/drivers/marvell/iob.h index adb8d4f3..9848c0ab 100644 --- a/include/drivers/marvell/iob.h +++ b/include/drivers/marvell/iob.h @@ -1,10 +1,12 @@ /* - * Copyright (C) 2016 - 2018 Marvell International Ltd. + * Copyright (C) 2018 Marvell International Ltd. * * SPDX-License-Identifier: BSD-3-Clause * https://spdx.org/licenses */ +/* IOW unit device driver for Marvell CP110 and CP115 SoCs */ + #ifndef _IOB_H_ #define _IOB_H_ @@ -22,7 +24,8 @@ enum target_ids_iob { IOB_MAX_TID }; -int init_iob(uintptr_t); -void iob_cfg_space_update(int ap_idx, int cp_idx, uintptr_t base, uintptr_t new_base); +int init_iob(uintptr_t base); +void iob_cfg_space_update(int ap_idx, int cp_idx, + uintptr_t base, uintptr_t new_base); #endif /* _IOB_H_ */ diff --git a/include/drivers/marvell/mci.h b/include/drivers/marvell/mci.h index 76122357..789b3b96 100644 --- a/include/drivers/marvell/mci.h +++ b/include/drivers/marvell/mci.h @@ -1,10 +1,12 @@ /* - * Copyright (C) 2016 - 2018 Marvell International Ltd. + * Copyright (C) 2018 Marvell International Ltd. * * SPDX-License-Identifier: BSD-3-Clause * https://spdx.org/licenses */ - + +/* MCI bus driver for Marvell ARMADA 8K and 8K+ SoCs */ + #ifndef _MCI_H_ #define _MCI_H_ diff --git a/include/drivers/marvell/mochi/ap_setup.h b/include/drivers/marvell/mochi/ap_setup.h index 1e6af6b7..41f2bac3 100644 --- a/include/drivers/marvell/mochi/ap_setup.h +++ b/include/drivers/marvell/mochi/ap_setup.h @@ -1,9 +1,12 @@ /* - * Copyright (C) 2016 - 2018 Marvell International Ltd. + * Copyright (C) 2018 Marvell International Ltd. * * SPDX-License-Identifier: BSD-3-Clause * https://spdx.org/licenses */ + +/* AP8xx Marvell SoC driver */ + #ifndef __AP_SETUP_H__ #define __AP_SETUP_H__ diff --git a/include/drivers/marvell/mochi/cp110_setup.h b/include/drivers/marvell/mochi/cp110_setup.h index 032c829d..1c88980a 100644 --- a/include/drivers/marvell/mochi/cp110_setup.h +++ b/include/drivers/marvell/mochi/cp110_setup.h @@ -1,14 +1,17 @@ /* - * Copyright (C) 2016 - 2018 Marvell International Ltd. + * Copyright (C) 2018 Marvell International Ltd. * * SPDX-License-Identifier: BSD-3-Clause * https://spdx.org/licenses */ -#ifndef __PLAT_CP110_H__ -#define __PLAT_CP110_H__ + +/* CP110 Marvell SoC driver */ + +#ifndef __CP110_SETUP_H__ +#define __CP110_SETUP_H__ #include <mmio.h> -#include <plat_def.h> +#include <mvebu_def.h> #define MVEBU_DEVICE_ID_REG (MVEBU_CP_DFX_OFFSET + 0x40) #define MVEBU_DEVICE_ID_OFFSET (0) @@ -47,4 +50,4 @@ static inline uint32_t cp110_rev_id_get(uintptr_t base) void cp110_init(uintptr_t cp110_base, uint32_t stream_id); void cp110_ble_init(uintptr_t cp110_base); -#endif /* __PLAT_CP110_H__ */ +#endif /* __CP110_SETUP_H__ */ diff --git a/include/drivers/marvell/thermal.h b/include/drivers/marvell/thermal.h index b8eb19d0..191f97ba 100644 --- a/include/drivers/marvell/thermal.h +++ b/include/drivers/marvell/thermal.h @@ -1,10 +1,12 @@ /* - * Copyright (C) 2017 Marvell International Ltd. + * Copyright (C) 2018 Marvell International Ltd. * * SPDX-License-Identifier: BSD-3-Clause * https://spdx.org/licenses */ +/* Driver for thermal unit located in Marvell ARMADA 8K and compatible SoCs */ + #ifndef _THERMAL_H #define _THERMAL_H @@ -17,8 +19,8 @@ struct tsen_config { int tsen_ready; void *regs_base; /* thermal functionality */ - int (*ptr_tsen_probe)(struct tsen_config *); - int (*ptr_tsen_read)(struct tsen_config *, int *); + int (*ptr_tsen_probe)(struct tsen_config *cfg); + int (*ptr_tsen_read)(struct tsen_config *cfg, int *temp); }; /* Thermal driver APIs */ diff --git a/include/lib/cpus/aarch64/cortex_a72.h b/include/lib/cpus/aarch64/cortex_a72.h index 9f184706..f5ca2ee7 100644 --- a/include/lib/cpus/aarch64/cortex_a72.h +++ b/include/lib/cpus/aarch64/cortex_a72.h @@ -38,6 +38,13 @@ #define CORTEX_A72_CPUACTLR_EL1_DIS_INSTR_PREFETCH (ULL(1) << 32) /******************************************************************************* + * L2 Auxiliary Control register specific definitions. + ******************************************************************************/ +#define CORTEX_A72_L2ACTLR_EL1 S3_1_C15_C0_0 + +#define CORTEX_A72_L2ACTLR_ENABLE_UNIQUE_CLEAN (ULL(1) << 14) + +/******************************************************************************* * L2 Control register specific definitions. ******************************************************************************/ #define CORTEX_A72_L2CTLR_EL1 S3_1_C11_C0_2 diff --git a/include/plat/marvell/a3700/common/armada_common.h b/include/plat/marvell/a3700/common/armada_common.h new file mode 100644 index 00000000..9fc46348 --- /dev/null +++ b/include/plat/marvell/a3700/common/armada_common.h @@ -0,0 +1,16 @@ +/* + * Copyright (C) 2018 Marvell International Ltd. + * + * SPDX-License-Identifier: BSD-3-Clause + * https://spdx.org/licenses + */ + +#ifndef __ARMADA_COMMON_H__ +#define __ARMADA_COMMON_H__ + +#include <io_addr_dec.h> +#include <stdint.h> + +int marvell_get_io_dec_win_conf(struct dec_win_config **win, uint32_t *size); + +#endif /* __ARMADA_COMMON_H__ */ diff --git a/include/plat/marvell/a3700/common/marvell_def.h b/include/plat/marvell/a3700/common/marvell_def.h index 326aa62a..5de69cc5 100644 --- a/include/plat/marvell/a3700/common/marvell_def.h +++ b/include/plat/marvell/a3700/common/marvell_def.h @@ -108,7 +108,8 @@ * Required platform porting definitions common to all MARVELL standard platforms **************************************************************************** */ -#define ADDR_SPACE_SIZE (1ull << 32) +#define PLAT_PHY_ADDR_SPACE_SIZE (1ULL << 32) +#define PLAT_VIRT_ADDR_SPACE_SIZE (1ULL << 32) /* * This macro defines the deepest retention state possible. A higher state diff --git a/include/plat/marvell/a3700/common/plat_config.h b/include/plat/marvell/a3700/common/plat_config.h deleted file mode 100644 index 36223855..00000000 --- a/include/plat/marvell/a3700/common/plat_config.h +++ /dev/null @@ -1,14 +0,0 @@ -/* - * Copyright (C) 2016 Marvell International Ltd. - * - * SPDX-License-Identifier: BSD-3-Clause - * https://spdx.org/licenses - */ -#ifndef __PLAT_CONFIG_H__ -#define __PLAT_CONFIG_H__ - -#include <stdint.h> - -int marvell_get_io_dec_win_conf(struct dec_win_config **win, uint32_t *size); - -#endif /* __PLAT_CONFIG_H__ */ diff --git a/include/plat/marvell/a3700/common/plat_marvell.h b/include/plat/marvell/a3700/common/plat_marvell.h index 1d146f75..7825b7c5 100644 --- a/include/plat/marvell/a3700/common/plat_marvell.h +++ b/include/plat/marvell/a3700/common/plat_marvell.h @@ -19,7 +19,7 @@ extern const mmap_region_t plat_marvell_mmap[]; #define MARVELL_CASSERT_MMAP \ - CASSERT((ARRAY_SIZE(plat_marvell_mmap) + MARVELL_BL_REGIONS) \ + CASSERT((ARRAY_SIZE(plat_marvell_mmap) + MARVELL_BL_REGIONS) \ <= MAX_MMAP_REGIONS, \ assert_max_mmap_regions); @@ -72,7 +72,7 @@ int marvell_io_is_toc_valid(void); /* * PSCI functionality */ -void psci_arch_init(int); +void marvell_psci_arch_init(int idx); void plat_marvell_system_reset(void); /* diff --git a/include/plat/marvell/a8k-p/common/armada_common.h b/include/plat/marvell/a8k-p/common/armada_common.h new file mode 100644 index 00000000..5413f84a --- /dev/null +++ b/include/plat/marvell/a8k-p/common/armada_common.h @@ -0,0 +1,37 @@ +/* + * Copyright (C) 2018 Marvell International Ltd. + * + * SPDX-License-Identifier: BSD-3-Clause + * https://spdx.org/licenses + */ + +#ifndef __ARMADA_COMMON_H__ +#define __ARMADA_COMMON_H__ + +#include <amb_adec.h> +#include <io_win.h> +#include <iob.h> +#include <ccu.h> +#include <gwin.h> + +int marvell_get_mci_map(int ap_id, int cp_id); + +uint32_t marvell_get_io_win_gcr_target(int ap_idx); +uint32_t marvell_get_ccu_gcr_target(int ap_idx); + +/* + * The functions below are defined as Weak and may be overridden + * in specific Marvell standard platform + */ +int marvell_get_amb_memory_map(struct addr_map_win **win, + uint32_t *size, uintptr_t base); +int marvell_get_io_win_memory_map(int ap_idx, struct addr_map_win **win, + uint32_t *size); +int marvell_get_iob_memory_map(struct addr_map_win **win, uint32_t *size, + uintptr_t base); +int marvell_get_ccu_memory_map(int ap_idx, struct addr_map_win **win, + uint32_t *size); +int marvell_get_gwin_memory_map(int ap, struct addr_map_win **win, + uint32_t *size); + +#endif /* __ARMADA_COMMON_H__ */ diff --git a/include/plat/marvell/a8k-p/common/board_marvell_def.h b/include/plat/marvell/a8k-p/common/board_marvell_def.h index 871c1d8b..1d27cd68 100644 --- a/include/plat/marvell/a8k-p/common/board_marvell_def.h +++ b/include/plat/marvell/a8k-p/common/board_marvell_def.h @@ -1,14 +1,10 @@ /* - * Copyright (C) 2016 Marvell International Ltd. + * Copyright (C) 2018 Marvell International Ltd. * * SPDX-License-Identifier: BSD-3-Clause * https://spdx.org/licenses */ -/* - * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ + #ifndef __BOARD_MARVELL_DEF_H__ #define __BOARD_MARVELL_DEF_H__ diff --git a/include/plat/marvell/a8k-p/common/marvell_def.h b/include/plat/marvell/a8k-p/common/marvell_def.h index 84196576..35fd55ec 100644 --- a/include/plat/marvell/a8k-p/common/marvell_def.h +++ b/include/plat/marvell/a8k-p/common/marvell_def.h @@ -1,14 +1,10 @@ /* - * Copyright (C) 2017 Marvell International Ltd. + * Copyright (C) 2018 Marvell International Ltd. * * SPDX-License-Identifier: BSD-3-Clause * https://spdx.org/licenses */ -/* - * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ + #ifndef __MARVELL_DEF_H__ #define __MARVELL_DEF_H__ @@ -112,7 +108,8 @@ * Required platform porting definitions common to all MARVELL std. platforms **************************************************************************** */ -#define ADDR_SPACE_SIZE (1ull << 40) +#define PLAT_PHY_ADDR_SPACE_SIZE (1ULL << 40) +#define PLAT_VIRT_ADDR_SPACE_SIZE (1ULL << 40) /* * This macro defines the deepest retention state possible. A higher state diff --git a/include/plat/marvell/a8k-p/common/plat_config.h b/include/plat/marvell/a8k-p/common/plat_config.h deleted file mode 100644 index a6551ad3..00000000 --- a/include/plat/marvell/a8k-p/common/plat_config.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * Copyright (C) 2017 Marvell International Ltd. - * - * SPDX-License-Identifier: BSD-3-Clause - * https://spdx.org/licenses - */ - -#ifndef __BOARD_CONFIG_H__ -#define __BOARD_CONFIG_H__ - -#include <amb_adec.h> -#include <io_win.h> -#include <iob.h> -#include <ccu.h> -#include <gwin.h> - -int marvell_get_mci_map(int, int); - -uint32_t marvell_get_io_win_gcr_target(int); -uint32_t marvell_get_ccu_gcr_target(int); - -/* - * The functions below are defined as Weak and may be overridden - * in specific Marvell standard platform - */ -int marvell_get_amb_memory_map(struct addr_map_win **win, uint32_t *size, uintptr_t base); -int marvell_get_io_win_memory_map(int, struct addr_map_win **win, uint32_t *size); -int marvell_get_iob_memory_map(struct addr_map_win **win, uint32_t *size, uintptr_t base); -int marvell_get_ccu_memory_map(int, struct addr_map_win **win, uint32_t *size); -int marvell_get_gwin_memory_map(int ap, struct addr_map_win **win, uint32_t *size); - -#endif /* __BOARD_CONFIG_H__ */ diff --git a/include/plat/marvell/a8k-p/common/plat_marvell.h b/include/plat/marvell/a8k-p/common/plat_marvell.h index a56a1805..a8561d85 100644 --- a/include/plat/marvell/a8k-p/common/plat_marvell.h +++ b/include/plat/marvell/a8k-p/common/plat_marvell.h @@ -1,5 +1,5 @@ /* - * Copyright (C) 2017 Marvell International Ltd. + * Copyright (C) 2018 Marvell International Ltd. * * SPDX-License-Identifier: BSD-3-Clause * https://spdx.org/licenses @@ -86,7 +86,7 @@ int marvell_io_is_toc_valid(void); /* * PSCI functionality */ -void psci_arch_init(int); +void marvell_psci_arch_init(int idx); void plat_marvell_system_reset(void); /* @@ -105,7 +105,7 @@ void marvell_bl1_setup_mpps(void); #endif const mmap_region_t *plat_marvell_get_mmap(void); -void ble_prepare_exit(void); +void marvell_ble_prepare_exit(void); int jtag_init_ihb_dual_ap(void); int gic600_multi_chip_init(void); diff --git a/include/plat/marvell/a8k-p/common/plat_pm_trace.h b/include/plat/marvell/a8k-p/common/plat_pm_trace.h index 35275ba9..69048d56 100644 --- a/include/plat/marvell/a8k-p/common/plat_pm_trace.h +++ b/include/plat/marvell/a8k-p/common/plat_pm_trace.h @@ -1,5 +1,5 @@ /* - * Copyright (C) 2017 Marvell International Ltd. + * Copyright (C) 2018 Marvell International Ltd. * * SPDX-License-Identifier: BSD-3-Clause * https://spdx.org/licenses diff --git a/include/plat/marvell/a8k/common/plat_config.h b/include/plat/marvell/a8k/common/armada_common.h index 405dafcf..7356a67a 100644 --- a/include/plat/marvell/a8k/common/plat_config.h +++ b/include/plat/marvell/a8k/common/armada_common.h @@ -1,17 +1,17 @@ /* - * Copyright (C) 2016 - 2018 Marvell International Ltd. + * Copyright (C) 2018 Marvell International Ltd. * * SPDX-License-Identifier: BSD-3-Clause * https://spdx.org/licenses */ -#ifndef __BOARD_CONFIG_H__ -#define __BOARD_CONFIG_H__ + +#ifndef __ARMADA_COMMON_H__ +#define __ARMADA_COMMON_H__ #include <amb_adec.h> #include <io_win.h> #include <iob.h> #include <ccu.h> -#include <pci_ep.h> /* * This struct supports skip image request @@ -64,17 +64,22 @@ struct skip_image { * type: the method used to power off the SoC * cfg: * PMIC_GPIO: - * pin_count: current GPIO pin number used for toggling the GPIO to notify PMIC - * info: hold the GPIOs information, CP GPIO should be used and the GPIOs should be within - * same GPIO register - * step_count: current step number to toggle the GPIO for PMIC - * seq: GPIO toggling values in sequence, each bit represents a GPIO - * for exmaple, bit0 represents first GPIO used for toggling the GPIO - * the last step is used to trigger the power off finnally - * delay_ms: transition interval for the GPIO setting to take effect in unit of ms + * pin_count: current GPIO pin number used for toggling the signal for + * notifying external PMIC + * info: holds the GPIOs information, CP GPIO should be used and + * all GPIOs should be within same GPIO config. register + * step_count: current step number to toggle the GPIO for PMIC + * seq: GPIO toggling values in sequence, each bit represents a GPIO. + * For example, bit0 represents first GPIO used for toggling + * the GPIO the last step is used to trigger the power off + * signal + * delay_ms: transition interval for the GPIO setting to take effect + * in unit of ms */ -#define PMIC_GPIO_MAX_NUMBER 8 /* Max GPIO number used to notify PMIC to power off the SoC */ -#define PMIC_GPIO_MAX_TOGGLE_STEP 8 /* Max GPIO toggling steps in sequence to power off the SoC */ +/* Max GPIO number used to notify PMIC to power off the SoC */ +#define PMIC_GPIO_MAX_NUMBER 8 +/* Max GPIO toggling steps in sequence to power off the SoC */ +#define PMIC_GPIO_MAX_TOGGLE_STEP 8 enum gpio_output_state { GPIO_LOW = 0, @@ -103,17 +108,21 @@ struct power_off_method { }; int marvell_gpio_config(void); -uint32_t marvell_get_io_win_gcr_target(int); -uint32_t marvell_get_ccu_gcr_target(int); +uint32_t marvell_get_io_win_gcr_target(int ap_idx); +uint32_t marvell_get_ccu_gcr_target(int ap_idx); /* * The functions below are defined as Weak and may be overridden * in specific Marvell standard platform */ -int marvell_get_amb_memory_map(struct addr_map_win **win, uint32_t *size, uintptr_t base); -int marvell_get_io_win_memory_map(int, struct addr_map_win **win, uint32_t *size); -int marvell_get_iob_memory_map(struct addr_map_win **win, uint32_t *size, uintptr_t base); -int marvell_get_ccu_memory_map(int, struct addr_map_win **win, uint32_t *size); +int marvell_get_amb_memory_map(struct addr_map_win **win, + uint32_t *size, uintptr_t base); +int marvell_get_io_win_memory_map(int ap_idx, struct addr_map_win **win, + uint32_t *size); +int marvell_get_iob_memory_map(struct addr_map_win **win, + uint32_t *size, uintptr_t base); +int marvell_get_ccu_memory_map(int ap_idx, struct addr_map_win **win, + uint32_t *size); -#endif /* __BOARD_CONFIG_H__ */ +#endif /* __ARMADA_COMMON_H__ */ diff --git a/include/plat/marvell/a8k/common/board_marvell_def.h b/include/plat/marvell/a8k/common/board_marvell_def.h index 823d5589..b1054db2 100644 --- a/include/plat/marvell/a8k/common/board_marvell_def.h +++ b/include/plat/marvell/a8k/common/board_marvell_def.h @@ -1,38 +1,10 @@ /* - * Copyright (C) 2016 - 2018 Marvell International Ltd. + * Copyright (C) 2018 Marvell International Ltd. * * SPDX-License-Identifier: BSD-3-Clause * https://spdx.org/licenses */ -/* - * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * Neither the name of ARM nor the names of its contributors may be used - * to endorse or promote products derived from this software without specific - * prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ + #ifndef __BOARD_MARVELL_DEF_H__ #define __BOARD_MARVELL_DEF_H__ diff --git a/include/plat/marvell/a8k/common/marvell_def.h b/include/plat/marvell/a8k/common/marvell_def.h index 5bd2c11a..538209e8 100644 --- a/include/plat/marvell/a8k/common/marvell_def.h +++ b/include/plat/marvell/a8k/common/marvell_def.h @@ -1,38 +1,10 @@ /* - * Copyright (C) 2016 - 2018 Marvell International Ltd. + * Copyright (C) 2018 Marvell International Ltd. * * SPDX-License-Identifier: BSD-3-Clause * https://spdx.org/licenses */ -/* - * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * Neither the name of ARM nor the names of its contributors may be used - * to endorse or promote products derived from this software without specific - * prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ + #ifndef __MARVELL_DEF_H__ #define __MARVELL_DEF_H__ @@ -136,7 +108,8 @@ * Required platform porting definitions common to all MARVELL std. platforms *****************************************************************************/ -#define ADDR_SPACE_SIZE (1ull << 32) +#define PLAT_PHY_ADDR_SPACE_SIZE (1ULL << 32) +#define PLAT_VIRT_ADDR_SPACE_SIZE (1ULL << 32) /* * This macro defines the deepest retention state possible. A higher state @@ -155,7 +128,6 @@ #define PLAT_NUM_PWR_DOMAINS (PLAT_MARVELL_CLUSTER_COUNT + \ PLATFORM_CORE_COUNT) - /* * Some data must be aligned on the biggest cache line size in the platform. * This is known only to the platform as it might have a combination of diff --git a/include/plat/marvell/a8k/common/plat_marvell.h b/include/plat/marvell/a8k/common/plat_marvell.h index 22d844a4..265f33c4 100644 --- a/include/plat/marvell/a8k/common/plat_marvell.h +++ b/include/plat/marvell/a8k/common/plat_marvell.h @@ -1,9 +1,10 @@ /* - * Copyright (C) 2016 - 2018 Marvell International Ltd. + * Copyright (C) 2018 Marvell International Ltd. * * SPDX-License-Identifier: BSD-3-Clause * https://spdx.org/licenses */ + #ifndef __PLAT_MARVELL_H__ #define __PLAT_MARVELL_H__ @@ -49,7 +50,7 @@ int marvell_check_mpidr(u_register_t mpidr); /* BLE utility functions */ int ble_plat_setup(int *skip); -void plat_dram_update_topology(void); +void plat_marvell_dram_update_topology(void); void ble_plat_pcie_ep_setup(void); struct pci_hw_cfg *plat_get_pcie_hw_data(void); @@ -73,13 +74,13 @@ void marvell_bl31_plat_runtime_setup(void); void marvell_bl31_plat_arch_setup(void); /* Power management config to power off the SoC */ -void *plat_get_pm_cfg(void); +void *plat_marvell_get_pm_cfg(void); /* Check if MSS AP CM3 firmware contains PM support */ _Bool is_pm_fw_running(void); /* Bootrom image recovery utility functions */ -void *plat_get_skip_image_data(void); +void *plat_marvell_get_skip_image_data(void); /* FIP TOC validity check */ int marvell_io_is_toc_valid(void); @@ -87,7 +88,7 @@ int marvell_io_is_toc_valid(void); /* * PSCI functionality */ -void psci_arch_init(int); +void marvell_psci_arch_init(int ap_idx); void plat_marvell_system_reset(void); /* @@ -105,8 +106,8 @@ void marvell_bl1_setup_mpps(void); #endif const mmap_region_t *plat_marvell_get_mmap(void); -void ble_prepare_exit(void); -void exit_bootrom(uintptr_t); +void marvell_ble_prepare_exit(void); +void marvell_exit_bootrom(uintptr_t base); int plat_marvell_early_cpu_powerdown(void); #endif /* __PLAT_MARVELL_H__ */ diff --git a/include/plat/marvell/a8k/common/plat_pm_trace.h b/include/plat/marvell/a8k/common/plat_pm_trace.h index f82e2b2c..0878959c 100644 --- a/include/plat/marvell/a8k/common/plat_pm_trace.h +++ b/include/plat/marvell/a8k/common/plat_pm_trace.h @@ -1,9 +1,10 @@ /* - * Copyright (C) 2016 Marvell International Ltd. + * Copyright (C) 2018 Marvell International Ltd. * * SPDX-License-Identifier: BSD-3-Clause * https://spdx.org/licenses */ + #ifndef __PLAT_PM_TRACE_H #define __PLAT_PM_TRACE_H @@ -80,7 +81,7 @@ typedef void (*core_trace_func)(unsigned int); extern core_trace_func funcTbl[PLATFORM_CORE_COUNT]; -#define PM_TRACE(trace) funcTbl[plat_my_core_pos()](trace); +#define PM_TRACE(trace) funcTbl[plat_my_core_pos()](trace) #else diff --git a/include/plat/marvell/common/aarch64/cci_macros.S b/include/plat/marvell/common/aarch64/cci_macros.S index 754da98b..d6080cfd 100644 --- a/include/plat/marvell/common/aarch64/cci_macros.S +++ b/include/plat/marvell/common/aarch64/cci_macros.S @@ -1,9 +1,10 @@ /* - * Copyright (C) 2016 - 2018 Marvell International Ltd. + * Copyright (C) 2018 Marvell International Ltd. * * SPDX-License-Identifier: BSD-3-Clause * https://spdx.org/licenses */ + #ifndef __CCI_MACROS_S__ #define __CCI_MACROS_S__ diff --git a/include/plat/marvell/common/aarch64/marvell_macros.S b/include/plat/marvell/common/aarch64/marvell_macros.S index 0a3e3798..0102af04 100644 --- a/include/plat/marvell/common/aarch64/marvell_macros.S +++ b/include/plat/marvell/common/aarch64/marvell_macros.S @@ -1,40 +1,12 @@ /* - * Copyright (C) 2016 - 2018 Marvell International Ltd. + * Copyright (C) 2018 Marvell International Ltd. * * SPDX-License-Identifier: BSD-3-Clause * https://spdx.org/licenses */ -/* - * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * Neither the name of ARM nor the names of its contributors may be used - * to endorse or promote products derived from this software without specific - * prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ -#ifndef __ARM_MACROS_S__ -#define __ARM_MACROS_S__ + +#ifndef __MARVELL_MACROS_S__ +#define __MARVELL_MACROS_S__ #include <cci.h> #include <gic_common.h> @@ -159,4 +131,4 @@ cci_iface_regs: .endm -#endif /* __ARM_MACROS_S__ */ +#endif /* __MARVELL_MACROS_S__ */ diff --git a/include/plat/marvell/common/plat_private.h b/include/plat/marvell/common/marvell_plat_priv.h index 7b7e2917..c1dad0ef 100644 --- a/include/plat/marvell/common/plat_private.h +++ b/include/plat/marvell/common/marvell_plat_priv.h @@ -1,16 +1,19 @@ /* - * Copyright (C) 2016 - 2018 Marvell International Ltd. + * Copyright (C) 2018 Marvell International Ltd. * * SPDX-License-Identifier: BSD-3-Clause * https://spdx.org/licenses */ - -#ifndef __PLAT_PRIVATE_H__ -#define __PLAT_PRIVATE_H__ -/******************************************************************************* +#ifndef __MARVELL_PLAT_PRIV_H__ +#define __MARVELL_PLAT_PRIV_H__ + +#include <utils.h> + +/***************************************************************************** * Function and variable prototypes - ******************************************************************************/ + ***************************************************************************** + */ void plat_delay_timer_init(void); uint64_t mvebu_get_dram_size(uint64_t ap_base_addr); @@ -28,4 +31,4 @@ void plat_marvell_gic_irq_restore(void); void plat_marvell_gic_irq_pcpu_save(void); void plat_marvell_gic_irq_pcpu_restore(void); -#endif /* __PLAT_PRIVATE_H__ */ +#endif /* __MARVELL_PLAT_PRIV_H__ */ diff --git a/include/plat/marvell/common/marvell_pm.h b/include/plat/marvell/common/marvell_pm.h index b2632f74..2817a462 100644 --- a/include/plat/marvell/common/marvell_pm.h +++ b/include/plat/marvell/common/marvell_pm.h @@ -1,10 +1,10 @@ /* - * Copyright (C) 2016 - 2018 Marvell International Ltd. + * Copyright (C) 2018 Marvell International Ltd. * * SPDX-License-Identifier: BSD-3-Clause * https://spdx.org/licenses */ - + #ifndef _MARVELL_PM_H_ #define _MARVELL_PM_H_ @@ -12,10 +12,15 @@ #define MVEBU_MAILBOX_SUSPEND_STATE 0xb007de7c /* Mailbox entry indexes */ -#define MBOX_IDX_MAGIC 0 /* Magic number for validity check */ -#define MBOX_IDX_SEC_ADDR 1 /* Recovery from suspend entry point */ -#define MBOX_IDX_SUSPEND_MAGIC 2 /* Suspend state magic number */ -#define MBOX_IDX_ROM_EXIT_ADDR 3 /* Recovery jump address for ROM bypass */ -#define MBOX_IDX_START_CNT 4 /* BLE execution start counter value */ +/* Magic number for validity check */ +#define MBOX_IDX_MAGIC 0 +/* Recovery from suspend entry point */ +#define MBOX_IDX_SEC_ADDR 1 +/* Suspend state magic number */ +#define MBOX_IDX_SUSPEND_MAGIC 2 +/* Recovery jump address for ROM bypass */ +#define MBOX_IDX_ROM_EXIT_ADDR 3 +/* BLE execution start counter value */ +#define MBOX_IDX_START_CNT 4 #endif /* _MARVELL_PM_H_ */ diff --git a/include/plat/marvell/common/mvebu.h b/include/plat/marvell/common/mvebu.h index fe55867e..a20e538e 100644 --- a/include/plat/marvell/common/mvebu.h +++ b/include/plat/marvell/common/mvebu.h @@ -1,10 +1,10 @@ /* - * Copyright (C) 2016 - 2018 Marvell International Ltd. + * Copyright (C) 2018 Marvell International Ltd. * * SPDX-License-Identifier: BSD-3-Clause * https://spdx.org/licenses */ - + #ifndef _MVEBU_H_ #define _MVEBU_H_ @@ -20,7 +20,8 @@ (((number) + (align)) & ~((align)-1)) : (number)) /* Macro for testing whether a number is a power of 2. Positive if so */ -#define IS_POWER_OF_2(number) (number != 0 && ((number & (number - 1)) == 0)) +#define IS_POWER_OF_2(number) ((number) != 0 && \ + (((number) & ((number) - 1)) == 0)) /* * Macro for ronding up to next power of 2 @@ -28,7 +29,8 @@ * then you can shift it left and get number which power of 2 * Note: this Macro is for 32 bit number */ -#define ROUND_UP_TO_POW_OF_2(number) (1 << (32 - __builtin_clz(number - 1))) +#define ROUND_UP_TO_POW_OF_2(number) (1 << \ + (32 - __builtin_clz((number) - 1))) #define _1MB_ (1024ULL*1024ULL) #define _1GB_ (_1MB_*1024ULL) |