diff options
Diffstat (limited to 'plat/marvell/a8k/a80x0')
-rw-r--r-- | plat/marvell/a8k/a80x0/board/dram_port.c | 23 | ||||
-rw-r--r-- | plat/marvell/a8k/a80x0/board/marvell_plat_config.c | 33 | ||||
-rw-r--r-- | plat/marvell/a8k/a80x0/mvebu_def.h (renamed from plat/marvell/a8k/a80x0/plat_def.h) | 4 | ||||
-rw-r--r-- | plat/marvell/a8k/a80x0/platform.mk | 2 |
4 files changed, 34 insertions, 28 deletions
diff --git a/plat/marvell/a8k/a80x0/board/dram_port.c b/plat/marvell/a8k/a80x0/board/dram_port.c index a1eff474..54c4883c 100644 --- a/plat/marvell/a8k/a80x0/board/dram_port.c +++ b/plat/marvell/a8k/a80x0/board/dram_port.c @@ -1,15 +1,16 @@ /* - * Copyright (C) 2016 - 2018 Marvell International Ltd. + * Copyright (C) 2018 Marvell International Ltd. * * SPDX-License-Identifier: BSD-3-Clause * https://spdx.org/licenses */ + #include <arch_helpers.h> #include <a8k_i2c.h> #include <debug.h> #include <mmio.h> #include <mv_ddr_if.h> -#include <plat_def.h> +#include <mvebu_def.h> #include <plat_marvell.h> #define MVEBU_AP_MPP_CTRL0_7_REG MVEBU_AP_MPP_REGS(0) @@ -54,12 +55,12 @@ static struct mv_ddr_topology_map board_topology_map = { MV_DDR_CFG_SPD, /* ddr configuration data source */ { {0} }, /* raw spd data */ {0}, /* timing parameters */ - { /* electrical configuration */ - { /* memory electrical configuration */ + { /* electrical configuration */ + { /* memory electrical configuration */ MV_DDR_RTT_NOM_PARK_RZQ_DISABLE, /* rtt_nom */ { - MV_DDR_RTT_NOM_PARK_RZQ_DIV4, /* rtt_park 1cs */ - MV_DDR_RTT_NOM_PARK_RZQ_DIV1 /* rtt_park 2cs */ + MV_DDR_RTT_NOM_PARK_RZQ_DIV4, /* rtt_park 1cs */ + MV_DDR_RTT_NOM_PARK_RZQ_DIV1 /* rtt_park 2cs */ }, { MV_DDR_RTT_WR_DYN_ODT_OFF, /* rtt_wr 1cs */ @@ -67,7 +68,7 @@ static struct mv_ddr_topology_map board_topology_map = { }, MV_DDR_DIC_RZQ_DIV7 /* dic */ }, - { /* phy electrical configuration */ + { /* phy electrical configuration */ MV_DDR_OHM_30, /* data_drv_p */ MV_DDR_OHM_30, /* data_drv_n */ MV_DDR_OHM_30, /* ctrl_drv_p */ @@ -81,10 +82,10 @@ static struct mv_ddr_topology_map board_topology_map = { MV_DDR_OHM_120 /* odt_n 2cs */ }, }, - { /* mac electrical configuration */ - MV_DDR_ODT_CFG_NORMAL, /* odtcfg_pattern */ + { /* mac electrical configuration */ + MV_DDR_ODT_CFG_NORMAL, /* odtcfg_pattern */ MV_DDR_ODT_CFG_ALWAYS_ON, /* odtcfg_write */ - MV_DDR_ODT_CFG_NORMAL, /* odtcfg_read */ + MV_DDR_ODT_CFG_NORMAL, /* odtcfg_read */ }, } }; @@ -117,7 +118,7 @@ static void mpp_config(void) * based on information received from SPD or bootloader * configuration located on non volatile storage */ -void plat_dram_update_topology(void) +void plat_marvell_dram_update_topology(void) { struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); diff --git a/plat/marvell/a8k/a80x0/board/marvell_plat_config.c b/plat/marvell/a8k/a80x0/board/marvell_plat_config.c index 65684434..836c9b40 100644 --- a/plat/marvell/a8k/a80x0/board/marvell_plat_config.c +++ b/plat/marvell/a8k/a80x0/board/marvell_plat_config.c @@ -1,16 +1,17 @@ /* - * Copyright (C) 2016 - 2018 Marvell International Ltd. + * Copyright (C) 2018 Marvell International Ltd. * * SPDX-License-Identifier: BSD-3-Clause * https://spdx.org/licenses */ -#include <plat_config.h> +#include <armada_common.h> + /* * If bootrom is currently at BLE there's no need to include the memory * maps structure at this point */ -#include <plat_def.h> +#include <mvebu_def.h> #ifndef IMAGE_BLE /***************************************************************************** @@ -22,13 +23,14 @@ struct addr_map_win amb_memory_map[] = { {0xf900, 0x1000000, AMB_SPI1_CS0_ID}, }; -int marvell_get_amb_memory_map(struct addr_map_win **win, uint32_t *size, uintptr_t base) +int marvell_get_amb_memory_map(struct addr_map_win **win, uint32_t *size, + uintptr_t base) { *win = amb_memory_map; if (*win == NULL) *size = 0; else - *size = sizeof(amb_memory_map)/sizeof(amb_memory_map[0]); + *size = ARRAY_SIZE(amb_memory_map); return 0; } @@ -60,13 +62,14 @@ uint32_t marvell_get_io_win_gcr_target(int ap_index) return PIDI_TID; } -int marvell_get_io_win_memory_map(int ap_index, struct addr_map_win **win, uint32_t *size) +int marvell_get_io_win_memory_map(int ap_index, struct addr_map_win **win, + uint32_t *size) { *win = io_win_memory_map; if (*win == NULL) *size = 0; else - *size = sizeof(io_win_memory_map)/sizeof(io_win_memory_map[0]); + *size = ARRAY_SIZE(io_win_memory_map); return 0; } @@ -100,16 +103,17 @@ struct addr_map_win iob_memory_map_cp1[] = { {0x00000000fa000000, 0x1000000, PEX0_TID} }; -int marvell_get_iob_memory_map(struct addr_map_win **win, uint32_t *size, uintptr_t base) +int marvell_get_iob_memory_map(struct addr_map_win **win, uint32_t *size, + uintptr_t base) { switch (base) { case MVEBU_CP_REGS_BASE(0): *win = iob_memory_map_cp0; - *size = sizeof(iob_memory_map_cp0)/sizeof(iob_memory_map_cp0[0]); + *size = ARRAY_SIZE(iob_memory_map_cp0); return 0; case MVEBU_CP_REGS_BASE(1): *win = iob_memory_map_cp1; - *size = sizeof(iob_memory_map_cp1)/sizeof(iob_memory_map_cp1[0]); + *size = ARRAY_SIZE(iob_memory_map_cp1); return 0; default: *size = 0; @@ -138,10 +142,11 @@ uint32_t marvell_get_ccu_gcr_target(int ap) return DRAM_0_TID; } -int marvell_get_ccu_memory_map(int ap, struct addr_map_win **win, uint32_t *size) +int marvell_get_ccu_memory_map(int ap, struct addr_map_win **win, + uint32_t *size) { *win = ccu_memory_map; - *size = sizeof(ccu_memory_map)/sizeof(ccu_memory_map[0]); + *size = ARRAY_SIZE(ccu_memory_map); return 0; } @@ -161,7 +166,7 @@ struct power_off_method pm_cfg = { .cfg.gpio.delay_ms = 10, }; -void *plat_get_pm_cfg(void) +void *plat_marvell_get_pm_cfg(void) { /* Return the PM configurations */ return &pm_cfg; @@ -182,7 +187,7 @@ struct skip_image skip_im = { .info.test.cp_index = 0, }; -void *plat_get_skip_image_data(void) +void *plat_marvell_get_skip_image_data(void) { /* Return the skip_image configurations */ return &skip_im; diff --git a/plat/marvell/a8k/a80x0/plat_def.h b/plat/marvell/a8k/a80x0/mvebu_def.h index 8b98cc70..5bff12ce 100644 --- a/plat/marvell/a8k/a80x0/plat_def.h +++ b/plat/marvell/a8k/a80x0/mvebu_def.h @@ -1,10 +1,10 @@ /* - * Copyright (C) 2016 - 2018 Marvell International Ltd. + * Copyright (C) 2018 Marvell International Ltd. * * SPDX-License-Identifier: BSD-3-Clause * https://spdx.org/licenses */ - + #ifndef __MVEBU_DEF_H__ #define __MVEBU_DEF_H__ diff --git a/plat/marvell/a8k/a80x0/platform.mk b/plat/marvell/a8k/a80x0/platform.mk index 4b96ae3f..00d24b27 100644 --- a/plat/marvell/a8k/a80x0/platform.mk +++ b/plat/marvell/a8k/a80x0/platform.mk @@ -1,5 +1,5 @@ # -# Copyright (C) 2016 - 2018 Marvell International Ltd. +# Copyright (C) 2018 Marvell International Ltd. # # SPDX-License-Identifier: BSD-3-Clause # https://spdx.org/licenses |