diff options
Diffstat (limited to 'plat/marvell/common')
22 files changed, 250 insertions, 402 deletions
diff --git a/plat/marvell/common/aarch64/marvell_common.c b/plat/marvell/common/aarch64/marvell_common.c index fe662c5c..abc501a9 100644 --- a/plat/marvell/common/aarch64/marvell_common.c +++ b/plat/marvell/common/aarch64/marvell_common.c @@ -1,14 +1,10 @@ /* - * Copyright (C) 2016 - 2018 Marvell International Ltd. + * Copyright (C) 2018 Marvell International Ltd. * * SPDX-License-Identifier: BSD-3-Clause * https://spdx.org/licenses */ -/* - * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ + #include <arch.h> #include <arch_helpers.h> #include <assert.h> @@ -90,9 +86,10 @@ unsigned long plat_get_ns_image_entrypoint(void) return PLAT_MARVELL_NS_IMAGE_OFFSET; } -/******************************************************************************* +/***************************************************************************** * Gets SPSR for BL32 entry - ******************************************************************************/ + ***************************************************************************** + */ uint32_t marvell_get_spsr_for_bl32_entry(void) { /* @@ -102,9 +99,10 @@ uint32_t marvell_get_spsr_for_bl32_entry(void) return 0; } -/******************************************************************************* +/***************************************************************************** * Gets SPSR for BL33 entry - ******************************************************************************/ + ***************************************************************************** + */ uint32_t marvell_get_spsr_for_bl33_entry(void) { unsigned long el_status; @@ -126,9 +124,10 @@ uint32_t marvell_get_spsr_for_bl33_entry(void) return spsr; } -/******************************************************************************* +/***************************************************************************** * Returns ARM platform specific memory map regions. - ******************************************************************************/ + ***************************************************************************** + */ const mmap_region_t *plat_marvell_get_mmap(void) { return plat_marvell_mmap; diff --git a/plat/marvell/common/aarch64/marvell_helpers.S b/plat/marvell/common/aarch64/marvell_helpers.S index 45bd2a2c..a3dc917c 100644 --- a/plat/marvell/common/aarch64/marvell_helpers.S +++ b/plat/marvell/common/aarch64/marvell_helpers.S @@ -1,39 +1,12 @@ /* - * Copyright (C) 2016 - 2018 Marvell International Ltd. + * Copyright (C) 2018 Marvell International Ltd. * * SPDX-License-Identifier: BSD-3-Clause * https://spdx.org/licenses */ -/* - * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * Neither the name of ARM nor the names of its contributors may be used - * to endorse or promote products derived from this software without specific - * prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ + #include <asm_macros.S> +#include <cortex_a72.h> #include <marvell_def.h> #include <platform_def.h> #ifndef PLAT_a3700 @@ -52,7 +25,8 @@ .globl disable_sram .globl disable_icache .globl invalidate_icache_all - .globl exit_bootrom + .globl marvell_exit_bootrom + .globl ca72_l2_enable_unique_clean /* ----------------------------------------------------- * unsigned int plat_my_core_pos(void) @@ -202,7 +176,7 @@ endfunc disable_sram * Disable and invalidate the icache * ----------------------------------------------------- */ -func exit_bootrom +func marvell_exit_bootrom /* Save the system restore address */ mov x28, x0 @@ -234,4 +208,16 @@ func exit_bootrom mov x0, x28 br x0 -endfunc exit_bootrom +endfunc marvell_exit_bootrom + + /* + * Enable L2 UniqueClean evictions with data + */ +func ca72_l2_enable_unique_clean + + mrs x0, CORTEX_A72_L2ACTLR_EL1 + orr x0, x0, #CORTEX_A72_L2ACTLR_ENABLE_UNIQUE_CLEAN + msr CORTEX_A72_L2ACTLR_EL1, x0 + + ret +endfunc ca72_l2_enable_unique_clean diff --git a/plat/marvell/common/marvell_bl1_setup.c b/plat/marvell/common/marvell_bl1_setup.c index 73ebd21c..7b498dd0 100644 --- a/plat/marvell/common/marvell_bl1_setup.c +++ b/plat/marvell/common/marvell_bl1_setup.c @@ -1,9 +1,10 @@ /* - * Copyright (C) 2016 - 2018 Marvell International Ltd. + * Copyright (C) 2018 Marvell International Ltd. * * SPDX-License-Identifier: BSD-3-Clause * https://spdx.org/licenses */ + #include <bl1.h> #include <bl1/bl1_private.h> #include <bl_common.h> diff --git a/plat/marvell/common/marvell_bl2_setup.c b/plat/marvell/common/marvell_bl2_setup.c index 6a91b572..7c87ce33 100644 --- a/plat/marvell/common/marvell_bl2_setup.c +++ b/plat/marvell/common/marvell_bl2_setup.c @@ -1,14 +1,9 @@ /* - * Copyright (C) 2016 - 2018 Marvell International Ltd. + * Copyright (C) 2018 Marvell International Ltd. * * SPDX-License-Identifier: BSD-3-Clause * https://spdx.org/licenses */ -/* - * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ #include <arch_helpers.h> #include <bl_common.h> @@ -22,11 +17,12 @@ static meminfo_t bl2_tzram_layout __aligned(CACHE_WRITEBACK_GRANULE); -/******************************************************************************* +/***************************************************************************** * This structure represents the superset of information that is passed to * BL31, e.g. while passing control to it from BL2, bl31_params - * and other platform specific params - ******************************************************************************/ + * and other platform specific parameters + ***************************************************************************** + */ typedef struct bl2_to_bl31_params_mem { bl31_params_t bl31_params; image_info_t bl31_image_info; @@ -62,7 +58,7 @@ meminfo_t *bl2_plat_sec_mem_layout(void) return &bl2_tzram_layout; } -/******************************************************************************* +/***************************************************************************** * This function assigns a pointer to the memory that the platform has kept * aside to pass platform specific and trusted firmware related information * to BL31. This memory is allocated by allocating memory to @@ -70,7 +66,8 @@ meminfo_t *bl2_plat_sec_mem_layout(void) * structure whose information is passed to BL31 * NOTE: This function should be called only once and should be done * before generating params to BL31 - ******************************************************************************/ + ***************************************************************************** + */ bl31_params_t *bl2_plat_get_bl31_params(void) { bl31_params_t *bl2_to_bl31_params; @@ -122,10 +119,11 @@ void bl2_plat_flush_bl31_params(void) sizeof(bl2_to_bl31_params_mem_t)); } -/******************************************************************************* +/***************************************************************************** * This function returns a pointer to the shared memory that the platform * has kept to point to entry point information of BL31 to BL2 - ******************************************************************************/ + ***************************************************************************** + */ struct entry_point_info *bl2_plat_get_bl31_ep_info(void) { #if DEBUG @@ -135,11 +133,12 @@ struct entry_point_info *bl2_plat_get_bl31_ep_info(void) return &bl31_params_mem.bl31_ep_info; } -/******************************************************************************* +/***************************************************************************** * BL1 has passed the extents of the trusted SRAM that should be visible to BL2 * in x0. This memory layout is sitting at the base of the free trusted SRAM. * Copy it to a safe location before its reclaimed by later BL2 functionality. - ******************************************************************************/ + ***************************************************************************** + */ void marvell_bl2_early_platform_setup(meminfo_t *mem_layout) { /* Initialize the console to provide early debug support */ @@ -164,10 +163,11 @@ void bl2_platform_setup(void) /* Nothing to do */ } -/******************************************************************************* +/***************************************************************************** * Perform the very early platform specific architectural setup here. At the * moment this is only initializes the mmu in a quick and dirty way. - ******************************************************************************/ + ***************************************************************************** + */ void marvell_bl2_plat_arch_setup(void) { marvell_setup_page_tables(bl2_tzram_layout.total_base, @@ -189,32 +189,35 @@ void bl2_plat_arch_setup(void) marvell_bl2_plat_arch_setup(); } -/******************************************************************************* +/***************************************************************************** * Populate the extents of memory available for loading SCP_BL2 (if used), * i.e. anywhere in trusted RAM as long as it doesn't overwrite BL2. - ******************************************************************************/ + ***************************************************************************** + */ void bl2_plat_get_scp_bl2_meminfo(meminfo_t *scp_bl2_meminfo) { *scp_bl2_meminfo = bl2_tzram_layout; } -/******************************************************************************* +/***************************************************************************** * Before calling this function BL31 is loaded in memory and its entrypoint * is set by load_image. This is a placeholder for the platform to change * the entrypoint of BL31 and set SPSR and security state. * On MARVELL std. platforms we only set the security state of the entrypoint - ******************************************************************************/ + ***************************************************************************** + */ void bl2_plat_set_bl31_ep_info(image_info_t *bl31_image_info, - entry_point_info_t *bl31_ep_info) + entry_point_info_t *bl31_ep_info) { SET_SECURITY_STATE(bl31_ep_info->h.attr, SECURE); bl31_ep_info->spsr = SPSR_64(MODE_EL3, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); } -/******************************************************************************* +/***************************************************************************** * Populate the extents of memory available for loading BL32 - ******************************************************************************/ + ***************************************************************************** + */ #ifdef BL32_BASE void bl2_plat_get_bl32_meminfo(meminfo_t *bl32_meminfo) { @@ -230,36 +233,39 @@ void bl2_plat_get_bl32_meminfo(meminfo_t *bl32_meminfo) } #endif -/******************************************************************************* +/***************************************************************************** * Before calling this function BL32 is loaded in memory and its entrypoint * is set by load_image. This is a placeholder for the platform to change * the entrypoint of BL32 and set SPSR and security state. * On MARVELL std. platforms we only set the security state of the entrypoint - ******************************************************************************/ + ***************************************************************************** + */ void bl2_plat_set_bl32_ep_info(image_info_t *bl32_image_info, - entry_point_info_t *bl32_ep_info) + entry_point_info_t *bl32_ep_info) { SET_SECURITY_STATE(bl32_ep_info->h.attr, SECURE); bl32_ep_info->spsr = marvell_get_spsr_for_bl32_entry(); } -/******************************************************************************* +/***************************************************************************** * Before calling this function BL33 is loaded in memory and its entrypoint * is set by load_image. This is a placeholder for the platform to change * the entrypoint of BL33 and set SPSR and security state. * On MARVELL std. platforms we only set the security state of the entrypoint - ******************************************************************************/ + ***************************************************************************** + */ void bl2_plat_set_bl33_ep_info(image_info_t *image, - entry_point_info_t *bl33_ep_info) + entry_point_info_t *bl33_ep_info) { SET_SECURITY_STATE(bl33_ep_info->h.attr, NON_SECURE); bl33_ep_info->spsr = marvell_get_spsr_for_bl33_entry(); } -/******************************************************************************* +/***************************************************************************** * Populate the extents of memory available for loading BL33 - ******************************************************************************/ + ***************************************************************************** + */ void bl2_plat_get_bl33_meminfo(meminfo_t *bl33_meminfo) { bl33_meminfo->total_base = MARVELL_DRAM_BASE; diff --git a/plat/marvell/common/marvell_bl31_setup.c b/plat/marvell/common/marvell_bl31_setup.c index d281356a..a74816b7 100644 --- a/plat/marvell/common/marvell_bl31_setup.c +++ b/plat/marvell/common/marvell_bl31_setup.c @@ -1,21 +1,17 @@ /* - * Copyright (C) 2016 - 2018 Marvell International Ltd. + * Copyright (C) 2018 Marvell International Ltd. * * SPDX-License-Identifier: BSD-3-Clause * https://spdx.org/licenses */ -/* - * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ + #include <arch.h> #include <assert.h> #include <console.h> #include <debug.h> #include <marvell_def.h> +#include <marvell_plat_priv.h> #include <plat_marvell.h> -#include <plat_private.h> #include <platform.h> #ifdef USE_CCI @@ -45,12 +41,13 @@ static entry_point_info_t bl33_image_ep_info; #pragma weak bl31_plat_get_next_image_ep_info #pragma weak plat_get_syscnt_freq2 -/******************************************************************************* +/***************************************************************************** * Return a pointer to the 'entry_point_info' structure of the next image for * the security state specified. BL33 corresponds to the non-secure image type * while BL32 corresponds to the secure image type. A NULL pointer is returned * if the image does not exist. - ******************************************************************************/ + ***************************************************************************** + */ entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type) { entry_point_info_t *next_image_info; @@ -62,14 +59,15 @@ entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type) return next_image_info; } -/******************************************************************************* +/***************************************************************************** * Perform any BL31 early platform setup common to ARM standard platforms. * Here is an opportunity to copy parameters passed by the calling EL (S-EL1 * in BL2 & S-EL3 in BL1) before they are lost (potentially). This needs to be * done before the MMU is initialized so that the memory layout can be used * while creating page tables. BL2 has flushed this information to memory, so * we are guaranteed to pick up good data. - ******************************************************************************/ + ***************************************************************************** + */ void marvell_bl31_early_platform_setup(bl31_params_t *from_bl2, void *plat_params_from_bl2) { @@ -153,9 +151,10 @@ void bl31_early_platform_setup(bl31_params_t *from_bl2, #endif } -/******************************************************************************* +/***************************************************************************** * Perform any BL31 platform setup common to ARM standard platforms - ******************************************************************************/ + ***************************************************************************** + */ void marvell_bl31_platform_setup(void) { /* Initialize the GIC driver, cpu and distributor interfaces */ @@ -163,17 +162,18 @@ void marvell_bl31_platform_setup(void) plat_marvell_gic_init(); /* For Armada-8k-plus family, the SoC includes more than - ** a single AP die, but the default die that boots is AP #0. - ** For other families there is only one die (#0). - ** Initialize psci arch from die 0 - ** */ - psci_arch_init(0); + * a single AP die, but the default die that boots is AP #0. + * For other families there is only one die (#0). + * Initialize psci arch from die 0 + */ + marvell_psci_arch_init(0); } -/******************************************************************************* +/***************************************************************************** * Perform any BL31 platform runtime setup prior to BL31 exit common to ARM * standard platforms - ******************************************************************************/ + ***************************************************************************** + */ void marvell_bl31_plat_runtime_setup(void) { /* Initialize the runtime console */ @@ -192,12 +192,13 @@ void bl31_plat_runtime_setup(void) marvell_bl31_plat_runtime_setup(); } -/******************************************************************************* +/***************************************************************************** * Perform the very early platform specific architectural setup shared between * ARM standard platforms. This only does basic initialization. Later * architectural setup (bl31_arch_setup()) does not do anything platform * specific. - ******************************************************************************/ + ***************************************************************************** + */ void marvell_bl31_plat_arch_setup(void) { marvell_setup_page_tables(BL31_BASE, @@ -210,7 +211,7 @@ void marvell_bl31_plat_arch_setup(void) , BL_COHERENT_RAM_BASE, BL_COHERENT_RAM_END #endif - ); + ); #if BL31_CACHE_DISABLE enable_mmu_el3(DISABLE_DCACHE); diff --git a/plat/marvell/common/marvell_cci.c b/plat/marvell/common/marvell_cci.c index 95c6f265..2df48024 100755 --- a/plat/marvell/common/marvell_cci.c +++ b/plat/marvell/common/marvell_cci.c @@ -1,10 +1,10 @@ /* - * Copyright (C) 2016 - 2018 Marvell International Ltd. + * Copyright (C) 2018 Marvell International Ltd. * * SPDX-License-Identifier: BSD-3-Clause * https://spdx.org/licenses */ - + #include <cci.h> #include <plat_marvell.h> @@ -13,34 +13,38 @@ static const int cci_map[] = { PLAT_MARVELL_CCI_CLUSTER1_SL_IFACE_IX }; -/****************************************************************************** +/**************************************************************************** * The following functions are defined as weak to allow a platform to override * the way ARM CCI driver is initialised and used. - *****************************************************************************/ + **************************************************************************** + */ #pragma weak plat_marvell_interconnect_init #pragma weak plat_marvell_interconnect_enter_coherency #pragma weak plat_marvell_interconnect_exit_coherency -/****************************************************************************** +/**************************************************************************** * Helper function to initialize ARM CCI driver. - *****************************************************************************/ + **************************************************************************** + */ void plat_marvell_interconnect_init(void) { cci_init(PLAT_MARVELL_CCI_BASE, cci_map, ARRAY_SIZE(cci_map)); } -/****************************************************************************** +/**************************************************************************** * Helper function to place current master into coherency - *****************************************************************************/ + **************************************************************************** + */ void plat_marvell_interconnect_enter_coherency(void) { cci_enable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr_el1())); } -/****************************************************************************** +/**************************************************************************** * Helper function to remove current master from coherency - *****************************************************************************/ + **************************************************************************** + */ void plat_marvell_interconnect_exit_coherency(void) { cci_disable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr_el1())); diff --git a/plat/marvell/common/marvell_common.mk b/plat/marvell/common/marvell_common.mk index 2e03302e..3ee2f3db 100644 --- a/plat/marvell/common/marvell_common.mk +++ b/plat/marvell/common/marvell_common.mk @@ -1,4 +1,4 @@ -# Copyright (C) 2016 - 2018 Marvell International Ltd. +# Copyright (C) 2018 Marvell International Ltd. # # SPDX-License-Identifier: BSD-3-Clause # https://spdx.org/licenses @@ -20,8 +20,8 @@ $(eval $(call add_define,ARO_ENABLE)) LLC_ENABLE := 1 $(eval $(call add_define,LLC_ENABLE)) -PLAT_INCLUDES += -I. -Iinclude/common/tbbr \ - -I$(MARVELL_PLAT_INCLUDE_BASE)/common \ +PLAT_INCLUDES += -I. -Iinclude/common/tbbr \ + -I$(MARVELL_PLAT_INCLUDE_BASE)/common \ -I$(MARVELL_PLAT_INCLUDE_BASE)/common/aarch64 diff --git a/plat/marvell/common/marvell_ddr_info.c b/plat/marvell/common/marvell_ddr_info.c index ecbee3fb..68bff998 100644 --- a/plat/marvell/common/marvell_ddr_info.c +++ b/plat/marvell/common/marvell_ddr_info.c @@ -18,7 +18,8 @@ #define DRAM_AREA_LENGTH_OFFS 16 #define DRAM_AREA_LENGTH_MASK (0x1f << DRAM_AREA_LENGTH_OFFS) #define DRAM_START_ADDRESS_L_OFFS 23 -#define DRAM_START_ADDRESS_L_MASK (0x1ff << DRAM_START_ADDRESS_L_OFFS) +#define DRAM_START_ADDRESS_L_MASK \ + (0x1ff << DRAM_START_ADDRESS_L_OFFS) #define DRAM_START_ADDR_HTOL_OFFS 32 #define DRAM_MAX_CS_NUM 2 @@ -84,15 +85,21 @@ uint64_t mvebu_get_dram_size(uint64_t ap_base_addr) if (!DRAM_CS_ENABLED(iface, cs, ap_base_addr)) break; - /* Decode area length for current CS from register value */ - region_code = GET_DRAM_REGION_SIZE_CODE(iface, cs, ap_base_addr); + /* Decode area length for current CS + * from register value + */ + region_code = + GET_DRAM_REGION_SIZE_CODE(iface, cs, + ap_base_addr); if (DRAM_REGION_SIZE_EVEN(region_code)) { - mem_size += GET_DRAM_REGION_SIZE_EVEN(region_code); + mem_size += + GET_DRAM_REGION_SIZE_EVEN(region_code); } else if (DRAM_REGION_SIZE_ODD(region_code)) { - mem_size += GET_DRAM_REGION_SIZE_ODD(region_code); + mem_size += + GET_DRAM_REGION_SIZE_ODD(region_code); } else { - WARN("%s: Invalid memory region code (0x%x) for CS#%d\n", + WARN("%s: Invalid mem region (0x%x) CS#%d\n", __func__, region_code, cs); return 0; } diff --git a/plat/marvell/common/marvell_gicv2.c b/plat/marvell/common/marvell_gicv2.c index 3a667785..ba8e4096 100644 --- a/plat/marvell/common/marvell_gicv2.c +++ b/plat/marvell/common/marvell_gicv2.c @@ -1,14 +1,10 @@ /* - * Copyright (C) 2016 - 2018 Marvell International Ltd. + * Copyright (C) 2018 Marvell International Ltd. * * SPDX-License-Identifier: BSD-3-Clause * https://spdx.org/licenses */ -/* - * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ + #include <gicv2.h> #include <plat_marvell.h> #include <platform.h> @@ -46,7 +42,7 @@ static gicv2_driver_data_t marvell_gic_data = { .target_masks_num = ARRAY_SIZE(target_mask_array), }; -/*/ +/* * ARM common helper to initialize the GICv2 only driver. */ void plat_marvell_gic_driver_init(void) diff --git a/plat/marvell/common/marvell_gicv3.c b/plat/marvell/common/marvell_gicv3.c index c4d2b3de..c15d115c 100644 --- a/plat/marvell/common/marvell_gicv3.c +++ b/plat/marvell/common/marvell_gicv3.c @@ -1,14 +1,10 @@ /* - * Copyright (C) 2016 - 2018 Marvell International Ltd. + * Copyright (C) 2018 Marvell International Ltd. * * SPDX-License-Identifier: BSD-3-Clause * https://spdx.org/licenses */ -/* - * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ + #include <debug.h> #include <gicv3.h> #include <interrupt_props.h> @@ -121,7 +117,7 @@ void plat_marvell_gic_cpuif_disable(void) } /****************************************************************************** - * Marvell common helper to initialize the per-cpu redistributor interface in GICv3 + * Marvell common helper to init. the per-cpu redistributor interface in GICv3 *****************************************************************************/ void plat_marvell_gic_pcpu_init(void) { @@ -138,7 +134,7 @@ void plat_marvell_gic_irq_save(void) * If an ITS is available, save its context before * the Redistributor using: * gicv3_its_save_disable(gits_base, &its_ctx[i]) - * Additionnaly, an implementation-defined sequence may + * Additionally, an implementation-defined sequence may * be required to save the whole ITS state. */ diff --git a/plat/marvell/common/marvell_io_storage.c b/plat/marvell/common/marvell_io_storage.c index ca1d7675..cb9ece24 100644 --- a/plat/marvell/common/marvell_io_storage.c +++ b/plat/marvell/common/marvell_io_storage.c @@ -1,14 +1,10 @@ /* - * Copyright (C) 2016 - 2018 Marvell International Ltd. + * Copyright (C) 2018 Marvell International Ltd. * * SPDX-License-Identifier: BSD-3-Clause * https://spdx.org/licenses */ -/* - * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ + #include <assert.h> #include <bl_common.h> /* For ARRAY_SIZE */ #include <debug.h> diff --git a/plat/marvell/common/marvell_pm.c b/plat/marvell/common/marvell_pm.c index 822d2bc6..2a757900 100644 --- a/plat/marvell/common/marvell_pm.c +++ b/plat/marvell/common/marvell_pm.c @@ -1,14 +1,10 @@ /* - * Copyright (C) 2016 - 2018 Marvell International Ltd. + * Copyright (C) 2018 Marvell International Ltd. * * SPDX-License-Identifier: BSD-3-Clause * https://spdx.org/licenses */ -/* - * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ + #include <arch_helpers.h> #include <assert.h> #include <psci.h> @@ -17,11 +13,12 @@ /* Standard ARM platforms are expected to export plat_arm_psci_pm_ops */ extern const plat_psci_ops_t plat_arm_psci_pm_ops; -/******************************************************************************* +/***************************************************************************** * Private function to program the mailbox for a cpu before it is released * from reset. This function assumes that the mail box base is within * the MARVELL_SHARED_RAM region - ******************************************************************************/ + ***************************************************************************** + */ void marvell_program_mailbox(uintptr_t address) { uintptr_t *mailbox = (void *)PLAT_MARVELL_MAILBOX_BASE; @@ -45,10 +42,11 @@ void marvell_program_mailbox(uintptr_t address) #endif } -/******************************************************************************* +/***************************************************************************** * The ARM Standard platform definition of platform porting API * `plat_setup_psci_ops`. - ******************************************************************************/ + ***************************************************************************** + */ int plat_setup_psci_ops(uintptr_t sec_entrypoint, const plat_psci_ops_t **psci_ops) { diff --git a/plat/marvell/common/marvell_topology.c b/plat/marvell/common/marvell_topology.c index 9418307a..a40ff6f5 100644 --- a/plat/marvell/common/marvell_topology.c +++ b/plat/marvell/common/marvell_topology.c @@ -1,23 +1,20 @@ /* - * Copyright (C) 2016 - 2018 Marvell International Ltd. + * Copyright (C) 2018 Marvell International Ltd. * * SPDX-License-Identifier: BSD-3-Clause * https://spdx.org/licenses */ -/* - * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ + #include <plat_marvell.h> /* The power domain tree descriptor */ unsigned char marvell_power_domain_tree_desc[PLAT_MARVELL_CLUSTER_COUNT + 1]; -/******************************************************************************* +/***************************************************************************** * This function dynamically constructs the topology according to * PLAT_MARVELL_CLUSTER_COUNT and returns it. - ******************************************************************************/ + ***************************************************************************** + */ const unsigned char *plat_get_power_domain_tree_desc(void) { int i; @@ -38,18 +35,20 @@ const unsigned char *plat_get_power_domain_tree_desc(void) return marvell_power_domain_tree_desc; } -/******************************************************************************* +/***************************************************************************** * This function validates an MPIDR by checking whether it falls within the * acceptable bounds. An error code (-1) is returned if an incorrect mpidr * is passed. - ******************************************************************************/ + ***************************************************************************** + */ int marvell_check_mpidr(u_register_t mpidr) { unsigned int nb_id, cluster_id, cpu_id; mpidr &= MPIDR_AFFINITY_MASK; - if (mpidr & ~(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK | MPIDR_AFFLVL_MASK << MPIDR_AFF2_SHIFT)) + if (mpidr & ~(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK | + MPIDR_AFFLVL_MASK << MPIDR_AFF2_SHIFT)) return -1; /* Get north bridge ID */ @@ -69,12 +68,13 @@ int marvell_check_mpidr(u_register_t mpidr) return 0; } -/******************************************************************************* - * This function implements a part of the critical interface between the psci +/***************************************************************************** + * This function implements a part of the critical interface between the PSCI * generic layer and the platform that allows the former to query the platform * to convert an MPIDR to a unique linear index. An error code (-1) is returned * in case the MPIDR is invalid. - ******************************************************************************/ + ***************************************************************************** + */ int plat_core_pos_by_mpidr(u_register_t mpidr) { if (marvell_check_mpidr(mpidr) == -1) diff --git a/plat/marvell/common/mrvl_sip_svc.c b/plat/marvell/common/mrvl_sip_svc.c index 4d79cd0d..ec293afa 100644 --- a/plat/marvell/common/mrvl_sip_svc.c +++ b/plat/marvell/common/mrvl_sip_svc.c @@ -8,10 +8,10 @@ #include <ap_setup.h> #include <cache_llc.h> #include <debug.h> +#include <marvell_plat_priv.h> #include <runtime_svc.h> #include <smcc.h> #include "comphy/phy-comphy-cp110.h" -#include <plat_private.h> /* #define DEBUG_COMPHY */ #ifdef DEBUG_COMPHY @@ -45,8 +45,8 @@ uintptr_t mrvl_sip_smc_handler(uint32_t smc_fid, u_register_t x2, u_register_t x3, u_register_t x4, - void *cookie, - void *handle, + void *cookie, + void *handle, u_register_t flags) { u_register_t ret; @@ -63,12 +63,14 @@ uintptr_t mrvl_sip_smc_handler(uint32_t smc_fid, x1 = (x1 & ~0xffffff) + MVEBU_COMPHY_OFFSET; if ((x1 & 0xffffff) != MVEBU_COMPHY_OFFSET) { - ERROR("%s: Wrong smc (0x%x) address: %lx\n", __func__, smc_fid, x1); + ERROR("%s: Wrong smc (0x%x) address: %lx\n", + __func__, smc_fid, x1); SMC_RET1(handle, SMC_UNK); } if (x2 >= MAX_LANE_NR) { - ERROR("%s: Wrong smc (0x%x) lane nr: %lx\n", __func__, smc_fid, x2); + ERROR("%s: Wrong smc (0x%x) lane nr: %lx\n", + __func__, smc_fid, x2); SMC_RET1(handle, SMC_UNK); } } diff --git a/plat/marvell/common/mss/mss_common.mk b/plat/marvell/common/mss/mss_common.mk index 83fe32c0..898b6dcc 100644 --- a/plat/marvell/common/mss/mss_common.mk +++ b/plat/marvell/common/mss/mss_common.mk @@ -1,35 +1,11 @@ # -# *************************************************************************** -# Copyright (C) 2016 Marvell International Ltd. -# *************************************************************************** +# Copyright (C) 2018 Marvell International Ltd. # -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions are met: -# -# Redistributions of source code must retain the above copyright notice, this -# list of conditions and the following disclaimer. -# -# Redistributions in binary form must reproduce the above copyright notice, -# this list of conditions and the following disclaimer in the documentation -# and/or other materials provided with the distribution. -# -# Neither the name of Marvell nor the names of its contributors may be used -# to endorse or promote products derived from this software without specific -# prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE -# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, -# OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -# POSSIBILITY OF SUCH DAMAGE. +# SPDX-License-Identifier: BSD-3-Clause +# https://spdx.org/licenses # + PLAT_MARVELL := plat/marvell MSS_SOURCE := $(PLAT_MARVELL)/common/mss diff --git a/plat/marvell/common/mss/mss_ipc_drv.c b/plat/marvell/common/mss/mss_ipc_drv.c index 5fde9243..731c315b 100644 --- a/plat/marvell/common/mss/mss_ipc_drv.c +++ b/plat/marvell/common/mss/mss_ipc_drv.c @@ -1,35 +1,8 @@ /* - * *************************************************************************** - * Copyright (C) 2016 Marvell International Ltd. - * *************************************************************************** + * Copyright (C) 2018 Marvell International Ltd. * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * Neither the name of Marvell nor the names of its contributors may be used - * to endorse or promote products derived from this software without specific - * prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, - * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - *************************************************************************** + * SPDX-License-Identifier: BSD-3-Clause + * https://spdx.org/licenses */ #include <plat_marvell.h> @@ -46,10 +19,10 @@ unsigned long mv_pm_ipc_msg_base; unsigned int mv_pm_ipc_queue_size; -unsigned int msg_sync = 0; +unsigned int msg_sync; int msg_index = IPC_CH_MSG_IDX; -/******************************************************************************* +/****************************************************************************** * mss_pm_ipc_init * * DESCRIPTION: Initialize PM IPC infrastructure @@ -61,17 +34,19 @@ int mv_pm_ipc_init(unsigned long ipc_control_addr) (struct mss_pm_ipc_ctrl *)ipc_control_addr; /* Initialize PM IPC control block */ - mv_pm_ipc_msg_base = ipc_control->msg_base_address | IPC_MSG_BASE_MASK; + mv_pm_ipc_msg_base = ipc_control->msg_base_address | + IPC_MSG_BASE_MASK; mv_pm_ipc_queue_size = ipc_control->queue_size; return 0; } -/******************************************************************************* -* mv_pm_ipc_queue_addr_get -* -* DESCRIPTION: Returns the IPC queue address -*******************************************************************************/ +/****************************************************************************** + * mv_pm_ipc_queue_addr_get + * + * DESCRIPTION: Returns the IPC queue address + ****************************************************************************** + */ unsigned int mv_pm_ipc_queue_addr_get(void) { unsigned int addr; @@ -81,31 +56,35 @@ unsigned int mv_pm_ipc_queue_addr_get(void) if (msg_index >= IPC_CH_NUM_OF_MSG) msg_index = 0; - addr = (unsigned int)(mv_pm_ipc_msg_base + (msg_index * mv_pm_ipc_queue_size)); + addr = (unsigned int)(mv_pm_ipc_msg_base + + (msg_index * mv_pm_ipc_queue_size)); flush_dcache_range((uint64_t)&msg_index, sizeof(msg_index)); return addr; } -/******************************************************************************* -* mv_pm_ipc_msg_rx -* -* DESCRIPTION: Retrieve message from IPC channel -*******************************************************************************/ +/****************************************************************************** + * mv_pm_ipc_msg_rx + * + * DESCRIPTION: Retrieve message from IPC channel + ****************************************************************************** + */ int mv_pm_ipc_msg_rx(unsigned int channel_id, struct mss_pm_ipc_msg *msg) { unsigned int addr = mv_pm_ipc_queue_addr_get(); + msg->msg_reply = mmio_read_32(addr + IPC_MSG_REPLY_LOC); return 0; } -/******************************************************************************* -* mv_pm_ipc_msg_tx -* -* DESCRIPTION: Send message via IPC channel -*******************************************************************************/ +/****************************************************************************** + * mv_pm_ipc_msg_tx + * + * DESCRIPTION: Send message via IPC channel + ****************************************************************************** + */ int mv_pm_ipc_msg_tx(unsigned int channel_id, unsigned int msg_id, unsigned int cluster_power_state) { @@ -120,11 +99,12 @@ int mv_pm_ipc_msg_tx(unsigned int channel_id, unsigned int msg_id, mmio_write_32(addr + IPC_MSG_SYNC_ID_LOC, msg_sync); mmio_write_32(addr + IPC_MSG_ID_LOC, msg_id); mmio_write_32(addr + IPC_MSG_CPU_ID_LOC, channel_id); - mmio_write_32(addr + IPC_MSG_POWER_STATE_LOC, cluster_power_state); + mmio_write_32(addr + IPC_MSG_POWER_STATE_LOC, + cluster_power_state); mmio_write_32(addr + IPC_MSG_STATE_LOC, IPC_MSG_OCCUPY); } else { - printf("mv_pm_ipc_msg_tx failed!!!\n"); + ERROR("%s: FAILED\n", __func__); } return 0; diff --git a/plat/marvell/common/mss/mss_ipc_drv.h b/plat/marvell/common/mss/mss_ipc_drv.h index ff8508ac..28eb907e 100644 --- a/plat/marvell/common/mss/mss_ipc_drv.h +++ b/plat/marvell/common/mss/mss_ipc_drv.h @@ -1,5 +1,5 @@ /* - * Copyright (C) 2016 - 2018 Marvell International Ltd. + * Copyright (C) 2018 Marvell International Ltd. * * SPDX-License-Identifier: BSD-3-Clause * https://spdx.org/licenses @@ -101,19 +101,19 @@ struct mss_pm_ipc_ch { int mv_pm_ipc_init(unsigned long ipc_control_addr); /***************************************************************************** -* mv_pm_ipc_msg_rx -* -* DESCRIPTION: Retrieve message from IPC channel -****************************************************************************** -*/ + * mv_pm_ipc_msg_rx + * + * DESCRIPTION: Retrieve message from IPC channel + ***************************************************************************** + */ int mv_pm_ipc_msg_rx(unsigned int channel_id, struct mss_pm_ipc_msg *msg); /***************************************************************************** -* mv_pm_ipc_msg_tx -* -* DESCRIPTION: Send message via IPC channel -****************************************************************************** -*/ + * mv_pm_ipc_msg_tx + * + * DESCRIPTION: Send message via IPC channel + ***************************************************************************** + */ int mv_pm_ipc_msg_tx(unsigned int channel_id, unsigned int msg_id, unsigned int cluster_power_state); diff --git a/plat/marvell/common/mss/mss_mem.h b/plat/marvell/common/mss/mss_mem.h index bed5584c..efff59e6 100644 --- a/plat/marvell/common/mss/mss_mem.h +++ b/plat/marvell/common/mss/mss_mem.h @@ -1,35 +1,8 @@ /* - * *************************************************************************** - * Copyright (C) 2016 Marvell International Ltd. - * *************************************************************************** + * Copyright (C) 2018 Marvell International Ltd. * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * Neither the name of Marvell nor the names of its contributors may be used - * to endorse or promote products derived from this software without specific - * prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, - * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - *************************************************************************** + * SPDX-License-Identifier: BSD-3-Clause + * https://spdx.org/licenses */ #ifndef __MSS_PM_MEM_H @@ -41,8 +14,8 @@ enum mss_pm_ctrl_handshake { MSS_UN_INITIALIZED = 0, MSS_COMPATIBILITY_ERROR = 1, - MSS_ACKNOWLEDGEMENT = 2, - HOST_ACKNOWLEDGEMENT = 3 + MSS_ACKNOWLEDGMENT = 2, + HOST_ACKNOWLEDGMENT = 3 }; enum mss_pm_ctrl_rtos_env { diff --git a/plat/marvell/common/mss/mss_scp_bl2_format.h b/plat/marvell/common/mss/mss_scp_bl2_format.h index 4db3a336..c04df727 100644 --- a/plat/marvell/common/mss/mss_scp_bl2_format.h +++ b/plat/marvell/common/mss/mss_scp_bl2_format.h @@ -1,35 +1,8 @@ /* - * *************************************************************************** - * Copyright (C) 2017 Marvell International Ltd. - * *************************************************************************** + * Copyright (C) 2018 Marvell International Ltd. * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * Neither the name of Marvell nor the names of its contributors may be used - * to endorse or promote products derived from this software without specific - * prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, - * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - *************************************************************************** + * SPDX-License-Identifier: BSD-3-Clause + * https://spdx.org/licenses */ #ifndef __MSS_SCP_BL2_FORMAT_H @@ -44,7 +17,8 @@ /* Types definitions */ typedef struct file_header { - uint32_t magic; /* Magic specific for concatenated file (used for validation) */ + /* Magic specific for concatenated file (used for validation) */ + uint32_t magic; uint32_t nr_of_imgs; /* Number of images concatenated */ } file_header_t; @@ -62,7 +36,9 @@ enum cm3_t { typedef struct img_header { uint32_t type; /* CM3 type, can be one of cm3_t */ uint32_t length; /* Image length */ - uint32_t version; /* For sanity checks and future extended functionality */ + uint32_t version; /* For sanity checks and future + * extended functionality + */ } img_header_t; #endif /* __MSS_SCP_BL2_FORMAT_H */ diff --git a/plat/marvell/common/mss/mss_scp_bootloader.c b/plat/marvell/common/mss/mss_scp_bootloader.c index b395a393..ff8f26c8 100644 --- a/plat/marvell/common/mss/mss_scp_bootloader.c +++ b/plat/marvell/common/mss/mss_scp_bootloader.c @@ -1,35 +1,8 @@ /* - * *************************************************************************** - * Copyright (C) 2016 Marvell International Ltd. - * *************************************************************************** + * Copyright (C) 2018 Marvell International Ltd. * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * Neither the name of Marvell nor the names of its contributors may be used - * to endorse or promote products derived from this software without specific - * prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, - * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - *************************************************************************** + * SPDX-License-Identifier: BSD-3-Clause + * https://spdx.org/licenses */ #include <assert.h> @@ -76,14 +49,14 @@ static int mss_check_image_ready(volatile struct mss_pm_ctrl_block *mss_pm_crtl) int timeout = MSS_HANDSHAKE_TIMEOUT; /* Wait for SCP to signal it's ready */ - while ((mss_pm_crtl->handshake != MSS_ACKNOWLEDGEMENT) && + while ((mss_pm_crtl->handshake != MSS_ACKNOWLEDGMENT) && (timeout-- > 0)) mdelay(1); - if (mss_pm_crtl->handshake != MSS_ACKNOWLEDGEMENT) + if (mss_pm_crtl->handshake != MSS_ACKNOWLEDGMENT) return -1; - mss_pm_crtl->handshake = HOST_ACKNOWLEDGEMENT; + mss_pm_crtl->handshake = HOST_ACKNOWLEDGMENT; return 0; } @@ -98,7 +71,7 @@ static int mss_image_load(uint32_t src_addr, uint32_t size, uintptr_t mss_regs) return 1; } - NOTICE("Loading MSS image from address 0x%x Size 0x%x to MSS at 0x%lx\n", + NOTICE("Loading MSS image from addr. 0x%x Size 0x%x to MSS at 0x%lx\n", src_addr, size, mss_regs); /* load image to MSS RAM using DMA */ loop_num = (size / DMA_SIZE) + (((size & (DMA_SIZE - 1)) == 0) ? 0 : 1); @@ -153,7 +126,8 @@ static int mss_image_load(uint32_t src_addr, uint32_t size, uintptr_t mss_regs) * firmware for AP is dedicated for PM and therefore some additional PM * initialization is required */ -static int mss_ap_load_image(uintptr_t single_img, uint32_t image_size, uint32_t ap_idx) +static int mss_ap_load_image(uintptr_t single_img, + uint32_t image_size, uint32_t ap_idx) { volatile struct mss_pm_ctrl_block *mss_pm_crtl; int ret; @@ -188,7 +162,8 @@ static int mss_ap_load_image(uintptr_t single_img, uint32_t image_size, uint32_t /* TODO: add checksum to image */ VERBOSE("Send info about the SCP_BL2 image to be transferred to SCP\n"); - ret = mss_image_load(single_img, image_size, bl2_plat_get_ap_mss_regs(ap_idx)); + ret = mss_image_load(single_img, image_size, + bl2_plat_get_ap_mss_regs(ap_idx)); if (ret != 0) { ERROR("SCP Image load failed\n"); return -1; @@ -203,7 +178,8 @@ static int mss_ap_load_image(uintptr_t single_img, uint32_t image_size, uint32_t } /* Load CM3 image (single_img) to CM3 pointed by cm3_type */ -static int load_img_to_cm3(enum cm3_t cm3_type, uintptr_t single_img, uint32_t image_size) +static int load_img_to_cm3(enum cm3_t cm3_type, + uintptr_t single_img, uint32_t image_size) { int ret, ap_idx, cp_index; uint32_t ap_count = bl2_plat_get_ap_count(); @@ -230,14 +206,20 @@ static int load_img_to_cm3(enum cm3_t cm3_type, uintptr_t single_img, uint32_t i */ cp_index = cm3_type - 1; for (ap_idx = 0; ap_idx < ap_count; ap_idx++) { - /* Check if we should load this image according to number of CPs */ + /* Check if we should load this image + * according to number of CPs + */ if (bl2_plat_get_cp_count(ap_idx) <= cp_index) { - NOTICE("Skipping MSS CP%d related image\n", cp_index); + NOTICE("Skipping MSS CP%d related image\n", + cp_index); break; } - NOTICE("Load image to CP%d MSS AP%d\n", cp_index, ap_idx); - ret = mss_image_load(single_img, image_size, bl2_plat_get_cp_mss_regs(ap_idx, cp_index)); + NOTICE("Load image to CP%d MSS AP%d\n", + cp_index, ap_idx); + ret = mss_image_load(single_img, image_size, + bl2_plat_get_cp_mss_regs( + ap_idx, cp_index)); if (ret != 0) { ERROR("SCP Image load failed\n"); return -1; diff --git a/plat/marvell/common/mss/mss_scp_bootloader.h b/plat/marvell/common/mss/mss_scp_bootloader.h index 762bb020..67c387a0 100644 --- a/plat/marvell/common/mss/mss_scp_bootloader.h +++ b/plat/marvell/common/mss/mss_scp_bootloader.h @@ -1,35 +1,8 @@ /* - * *************************************************************************** - * Copyright (C) 2016 Marvell International Ltd. - * *************************************************************************** + * Copyright (C) 2018 Marvell International Ltd. * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * Neither the name of Marvell nor the names of its contributors may be used - * to endorse or promote products derived from this software without specific - * prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, - * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - *************************************************************************** + * SPDX-License-Identifier: BSD-3-Clause + * https://spdx.org/licenses */ #ifndef __MSS_SCP_BOOTLOADER_H__ diff --git a/plat/marvell/common/plat_delay_timer.c b/plat/marvell/common/plat_delay_timer.c index eab68ca1..dfc77c7f 100644 --- a/plat/marvell/common/plat_delay_timer.c +++ b/plat/marvell/common/plat_delay_timer.c @@ -1,17 +1,13 @@ /* - * Copyright (C) 2016 - 2018 Marvell International Ltd. + * Copyright (C) 2018 Marvell International Ltd. * * SPDX-License-Identifier: BSD-3-Clause * https://spdx.org/licenses */ -/* - * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ + #include <arch_helpers.h> #include <delay_timer.h> -#include <plat_def.h> +#include <mvebu_def.h> #define SYS_COUNTER_FREQ_IN_MHZ (COUNTER_FREQUENCY/1000000) |