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-rw-r--r--plat/marvell/a8k/a80x0_mcbin/board/marvell_plat_config.c32
-rw-r--r--plat/marvell/a8k/common/plat_bl31_setup.c11
2 files changed, 43 insertions, 0 deletions
diff --git a/plat/marvell/a8k/a80x0_mcbin/board/marvell_plat_config.c b/plat/marvell/a8k/a80x0_mcbin/board/marvell_plat_config.c
index 943943a1..a0244cd1 100644
--- a/plat/marvell/a8k/a80x0_mcbin/board/marvell_plat_config.c
+++ b/plat/marvell/a8k/a80x0_mcbin/board/marvell_plat_config.c
@@ -32,6 +32,8 @@
***************************************************************************
*/
+#include <delay_timer.h>
+#include <mmio.h>
#include <plat_config.h>
/*
* If bootrom is currently at BLE there's no need to include the memory
@@ -41,6 +43,36 @@
#include <plat_def.h>
/*******************************************************************************
+ * GPIO Configuration
+ ******************************************************************************/
+#define MPP_CONTROL_REGISTER 0xf2440018
+#define MPP_CONTROL_MPP_SEL_52_MASK 0xf0000
+#define GPIO_DATA_OUT1_REGISTER 0xf2440140
+#define GPIO_DATA_OUT_EN_CTRL1_REGISTER 0xf2440144
+#define GPIO52_MASK 0x100000
+
+/* Reset PCIe via GPIO number 52 */
+int marvell_gpio_config(void)
+{
+ uint32_t reg;
+
+ reg = mmio_read_32(MPP_CONTROL_REGISTER);
+ reg |= MPP_CONTROL_MPP_SEL_52_MASK;
+ mmio_write_32(MPP_CONTROL_REGISTER, reg);
+
+ reg = mmio_read_32(GPIO_DATA_OUT1_REGISTER);
+ reg |= GPIO52_MASK;
+ mmio_write_32(GPIO_DATA_OUT1_REGISTER, reg);
+
+ reg = mmio_read_32(GPIO_DATA_OUT_EN_CTRL1_REGISTER);
+ reg &= ~GPIO52_MASK;
+ mmio_write_32(GPIO_DATA_OUT_EN_CTRL1_REGISTER, reg);
+ udelay(100);
+
+ return 0;
+}
+
+/*******************************************************************************
* AMB Configuration
******************************************************************************/
struct amb_win *amb_memory_map;
diff --git a/plat/marvell/a8k/common/plat_bl31_setup.c b/plat/marvell/a8k/common/plat_bl31_setup.c
index ab616a50..0decb590 100644
--- a/plat/marvell/a8k/common/plat_bl31_setup.c
+++ b/plat/marvell/a8k/common/plat_bl31_setup.c
@@ -33,6 +33,7 @@
*/
#include <plat_marvell.h>
+#include <plat_config.h>
#include <plat_private.h>
#include <apn806_setup.h>
#include <cp110_setup.h>
@@ -46,6 +47,13 @@
#include <mss_mem.h>
#endif
+/* Set a weak stub for platforms that don't need to configure GPIO */
+#pragma weak marvell_gpio_config
+int marvell_gpio_config(void)
+{
+ return 0;
+}
+
void marvell_bl31_mpp_init(void)
{
uint32_t reg;
@@ -108,4 +116,7 @@ void bl31_plat_arch_setup(void)
if (mailbox[MBOX_IDX_MAGIC] != MVEBU_MAILBOX_MAGIC_NUM ||
mailbox[MBOX_IDX_SUSPEND_MAGIC] != MVEBU_MAILBOX_SUSPEND_STATE)
marvell_bl31_mss_init();
+
+ /* Configure GPIO */
+ marvell_gpio_config();
}