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2018-04-25marvell: psci: disable cache in el3Igal Liberman
Currently, there's an open issue is some setups when cpuidle is enabled - after sometime, one of the cores might fail to come up after suspend. This issue is under debug but generally it caused by cache operations performed on the el3 stack. For now, as a workaround, disable el3 cache, in order to enable cpuidle feature. Change-Id: Icf7dafeab701b34b23b6bcde78f0b8dc8d727e28 Signed-off-by: Igal Liberman <igall@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/52671 Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
2018-03-28Makefile: add compilation flag for ARO modeChristine Gharzuzi
- ARO mode is not supported by default anymore in order to use ARO mode a compilation flag is added to Makefile Change-Id: Ie5f542ccbf824c1f30fdfb967ebc05fa41c92f93 Signed-off-by: Christine Gharzuzi <chrisg@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/52648 Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Hanna Hawa <hannah@marvell.com>
2018-03-28fix: Makefile: a3700: align wtmi image with 4 bytesjinghua
To boot from eMMC, there is a limitation that each firmware component size has to be aligned with 4 bytes. Since u-boot image has already been aligned, this patch does it for WTMI image. Change-Id: Ie8f4517d5f04baedc7bca2bd230c5ce2f73b3e3a Signed-off-by: jinghua <jinghua@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/52417 Reviewed-by: Kostya Porotchkin <kostap@marvell.com> Tested-by: iSoC Platform CI <ykjenk@marvell.com> (cherry picked from commit 1eed2fc33ab121f2792c8829f5dd96796a4a0a7e) Reviewed-on: http://vgitil04.il.marvell.com:8080/52685
2018-01-16a8k-p: Introduce new address translation scheme for Armada8K-p familyKonstantin Porotchkin
Introduce the address decoding scheme v5 that supports up to 4 interconnected APs with up to 4 CPs attached to every AP. Physical memory map: 0x0000_0000_0000 - 0x0080_FFFF_FFFF - DRAM - 512GB + 4GB 0x0081_0000_0000 - 0x009D_FFFF_FFFF - AP0 IO - 116GB 0x009E_0000_0000 - 0x00BA_FFFF_FFFF - AP1 IO - 116GB 0x00BB_0000_0000 - 0x00D7_FFFF_FFFF - AP2 IO - 116GB 0x00D8_0000_0000 - 0x00F4_FFFF_FFFF - AP3 IO - 116GB The DRAM address space is mapped differentrly for 1 or 2 interconnected APs and 3 or 4 APs. For up to 2 APs, 128GB is allocated for each memory controller channel: 0x0000_0000_0000 - 0x0040_3FFF_FFFF - AP0 DRAM 0x0040_4000_0000 - 0x0080_7FFF_FFFF - AP1 DRAM For 3 to 4 APs, 64GB is allocated for each AP memory controller channel: 0x0000_0000_0000 - 0x0020_3FFF_FFFF - AP0 DRAM 0x0020_4000_0000 - 0x0040_7FFF_FFFF - AP1 DRAM 0x0040_8000_0000 - 0x0060_BFFF_FFFF - AP2 DRAM 0x0060_C000_0000 - 0x0080_FFFF_FFFF - AP3 DRAM Extra 1GB per AP DRAM space is reserved for the control registers remapping. Each AP IO address space includes 28GB region per every CP and single 4GB region for direct-mapped SPI and/or STM. For example, the following map is used for AP0 IO: 0x0081_0000_0000 - 0x0087_FFFF_FFFF - CP0 0x0088_0000_0000 - 0x008E_FFFF_FFFF - CP1 0x008F_0000_0000 - 0x0095_FFFF_FFFF - CP2 0x0096_0000_0000 - 0x009C_FFFF_FFFF - CP3 0x009D_0000_0000 - 0x009D_FFFF_FFFF - SPI-direct and STM Every CP address space is divided into 4 regions: 4GB for the control registers access 8GB for PCI0 8GB for PCI1 8GB for PCI2 Change-Id: I6918e9fb8165c683ec6471f461b7b8bd714bef64 Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/48369 Reviewed-by: Igal Liberman <igall@marvell.com> Reviewed-by: Hanna Hawa <hannah@marvell.com> Tested-by: iSoC Platform CI <ykjenk@marvell.com>
2017-11-09a3700: update makefile to support cm3 freeRTOS imageKen Ma
System early initialization function was added to WTMI along with DDR PHY dynamic training. The sys-init is mandotory for system booting in all kind of CM3 application, including existing fuse application and FreeRTOS image. Thus, WMTI image is splitted into two parts: sys-init image and runtime CM3 firmware. The customer can still specify the RTOS image by WMTI_IMG option while WTMI_SYSINIT_IMG and WTMI_MULTI_IMG was newly introduced to makefile to generate the 'completed' WTMI image and boot image. Change-Id: I947bc2456ccff266c3c73e403dafe8cff98b336d Signed-off-by: Ken Ma <make@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/45446 Reviewed-by: Wilson Ding <dingwei@marvell.com> Tested-by: Wilson Ding <dingwei@marvell.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
2017-10-10makefile: mvebu: rename TBB_linux to tbb_linuxzachary
Change-Id: I84d0d90e82a1af222fe96dd8c757571e28f1e8a9 Signed-off-by: zachary <zhangzg@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/44251 Reviewed-by: Hua Jing <jinghua@marvell.com> Tested-by: Hua Jing <jinghua@marvell.com> (cherry picked from commit a6ad96057a57372fb1c937e8deb908f65240eea2) Reviewed-on: http://vgitil04.il.marvell.com:8080/45075 Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Hanna Hawa <hannah@marvell.com>
2017-08-24fix: Remove garbadge from the main makefileKonstantin Porotchkin
Clean the Makefile from rebase garbage remainings Change-Id: I132dfbbc7f722ad2d188a102d876d65b04d9c8b4 Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/43371
2017-08-22atf: aro: switch back to PLL from AROChristine Gharzuzi
This patch disables ARO as a request from HW for a thorough testing of the device Change-Id: Ic6b69025056e1152e4f8d3a1038d88a915e641e9 Signed-off-by: Christine Gharzuzi <chrisg@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/42755 Reviewed-by: Hanna Hawa <hannah@marvell.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com> Tested-by: iSoC Platform CI <ykjenk@marvell.com>
2017-08-22makefile: aro: add define flag for ARO.Christine Gharzuzi
Add define flag for ARO and set it by default to 1. No functional change Change-Id: Id5ae19f8fa9d1096b80615fffa9ccec1eb8f4f9c Signed-off-by: Christine Gharzuzi <chrisg@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/42866 Reviewed-by: Kostya Porotchkin <kostap@marvell.com> Reviewed-by: Hanna Hawa <hannah@marvell.com> Tested-by: iSoC Platform CI <ykjenk@marvell.com>
2017-08-22makefile: a3700: update makefile according to A3700_utils reorganizationTerry Zhou
A3700_utils folder has been reorganized as following: rename "wtptp_tool" to "wtptp" move all "trusted/untrusted" header into "tim" folder move all build scripts into "script" folder move all clock and ddr configuration into "ddr" folder Change-Id: I0bea5d884726b1e18878c321722afc3d7bb1e9b6 Signed-off-by: Terry Zhou <bjzhou@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/42449 Reviewed-by: Kostya Porotchkin <kostap@marvell.com> Reviewed-by: Hua Jing <jinghua@marvell.com> Tested-by: Hua Jing <jinghua@marvell.com>
2017-08-22a80x0: add support for Armada 8k OCP boardOfir Fedida
this patch introduces support for new Armada 8k OCP board. - added new platform a80x0_ocp - enabled PCIe EP driver with delay_cfg=1 to allow later EP driver in Linux. - ddr configuration: 1CS 8Gb x5 Samsung devices K4A8G165WB BCRC speed bin 2400S device width x16 verified interfaces: 2 * 10G ethernet ports SPI MMC UART Change-Id: Id723b4a7b4b2f9c590a56417b9ceebe22d5727db Signed-off-by: Ofir Fedida <ofedida@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/41853 Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
2017-08-22fix: makefile: a3700: pad boot-image.bin for 4-bytes alignmentallen yan
- In eMMC download mode, the ROM checks if the size and address are aligned to 4 byte. If not aligned, it will report SDMMC_ADDR_MISALIGN_ERROR. - This patch align the boot-image.bin size to 4 bytes. Change-Id: I97f390c78797ca403f0353bdd9c99625ab412eb3 Signed-off-by: allen yan <yanwei@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/40661 Reviewed-by: Wilson Ding <dingwei@marvell.com> Tested-by: Wilson Ding <dingwei@marvell.com>
2017-08-22makefile: a3700: move opthash.txt file to build folder for trusted buildTerry Zhou
The 'opthash.txt' contains the KAK key digest, which is used by the customer to program the fuse for the trusted boot. Change-Id: I5d7e095a6b48a0c5cb8587c2a8e0063e7988ab7e Signed-off-by: zachary <zhangzg@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/39356 Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Wilson Ding <dingwei@marvell.com>
2017-08-22fix: makefile: a3700: correct DOIMAGEPATH assignmentzachary
DOIMAGEPATH used to get its path by 'dir' command when Makefile assigns the WTP path to it. The 'dir' command returns the left string from the last "/" of the file or directory path. Therefore, the actual DOIMAGEPATH is missing one level directory without one extra "/" in WTP export env. This patch fixed this issue by assign the WTP path to DOIMAGEPATH directly. Change-Id: I2b18b13f2d3283e714ec6bfa47db6d477295f9c1 Signed-off-by: zachary <zhangzg@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/39355 Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Wilson Ding <dingwei@marvell.com>
2017-08-22makefile: a3700: remove unnecessary files after buildzachary
Remove "CSKN-KeyHash.txt" and Hash.txt after building trusted image Remove "TIMHash.txt" and "Tim_msg.txt" after building untrusted image Change-Id: I6ce675f39d49c3cd6538205acefd5e64685d6fbf Signed-off-by: zachary <zhangzg@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/39358 Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Terry Zhou <bjzhou@marvell.com> Reviewed-by: Wilson Ding <dingwei@marvell.com>
2017-08-22makefile: a3700: update TBB binary file nameEvan Wang
The patch updated the TBB binary file name from tbb_linux.exe and ntbb_linux.exe to TBB_linux. The new bianry file of TBB_linux supports both security boot and nonsecurity. The new binary is generated by the latest TBB source code. Change-Id: Ifb251a10062dbcdff09aca5b7f92a1ea08f0e262 Signed-off-by: Evan Wang <xswang@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/39050 Reviewed-by: Wilson Ding <dingwei@marvell.com> Tested-by: Wilson Ding <dingwei@marvell.com>
2017-08-2270x0: pcac: rename a7040_pcac to a70x0_pcacIgal Liberman
In addition, this patch fixes DRAM initialization issue introduced in: "6942e0c fix: a8k: Fix the platform dependency issue" The root cause of the DRAM failure is the pcac naming. All other A7040 devices names A70x0_XX but pcac was named A7040_pcac. Change-Id: Ic204a3d5272a3563a15f955bb8ce70e2e7390ba1 Signed-off-by: Igal Liberman <igall@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/39021 Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
2017-08-22fix: a3700: restore timn image in uart trusted buildTerry Zhou
- The TIMN image is missing in Armada3700 build folder, which is one of the image components needed by the recovery procedure. Makefile is supposed to get the image filename from atf_timN.txt and it defines a variable to parse the filename in the atf_timN.txt. But the atf_timN.txt is dynamically generated. It doesn't exist when this variable is initialized (if ATF performs a clean build). - This patch is to change this global variable as the second-expansion of shell command in Makefile. So that the shell will execute the enclosed command only when the Makefile is referring this variable Change-Id: Iba39377cc2752c42bcb0ecbd854f8a9e57e1353d Signed-off-by: Terry Zhou <bjzhou@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/38699 Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Hua Jing <jinghua@marvell.com>
2017-08-22makefile: a3700: add image encryption support for trusted bootTerry Zhou
only support AES_CBC_256 algorithm build uart image without encryption Change-Id: I66caf134b6e159433561e34c0f775d6e177dde31 Signed-off-by: Terry Zhou <bjzhou@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/38698 Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Hua Jing <jinghua@marvell.com>
2017-08-22makefile: mvebu: update makefile for a3700 buildzachary
Change-Id: I82cdc654e272624523149d45eb1c2fd1b98f302e Signed-off-by: zachary <zhangzg@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/38611 Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Hua Jing <jinghua@marvell.com>
2017-08-21platform: Add support for Marvell A7K/A8K platform to the MakefileKonstantin Porotchkin
Add support for marvell A7K/A8K platforms to the main Makefile Add version.mk file for the build release information Change-Id: I18e5583677f2f4eb077a6af14751345100e7ed68 Signed-off-by: Haim Boot <hayim@marvell.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/38134
2017-07-06Release v1.4: Update minor version number to 4David Cunado
Change-Id: I8676a22649dce92d0ddd98013fc6dafcfbe94c90 Signed-off-by: David Cunado <david.cunado@arm.com>
2017-06-28Introduce TF_LDFLAGSDouglas Raillard
Use TF_LDFLAGS from the Makefiles, and still append LDFLAGS as well to the compiler's invocation. This allows passing extra options from the make command line using LDFLAGS. Document new LDFLAGS Makefile option. Change-Id: I88c5ac26ca12ac2b2d60a6f150ae027639991f27 Signed-off-by: Douglas Raillard <douglas.raillard@arm.com>
2017-06-28Merge pull request #1002 from douglas-raillard-arm/dr/fix_errata_a53danh-arm
Apply workarounds for A53 Cat A Errata 835769 and 843419
2017-06-22Apply workarounds for A53 Cat A Errata 835769 and 843419Douglas Raillard
These errata are only applicable to AArch64 state. See the errata notice for more details: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.epm048406/index.html Introduce the build options ERRATA_A53_835769 and ERRATA_A53_843419. Enable both of them for Juno. Apply the 835769 workaround as following: * Compile with -mfix-cortex-a53-835769 * Link with --fix-cortex-a53-835769 Apply the 843419 workaround as following: * Link with --fix-cortex-a53-843419 The erratum 843419 workaround can lead the linker to create new sections suffixed with "*.stub*" and 4KB aligned. The erratum 835769 can lead the linker to create new "*.stub" sections with no particular alignment. Also add support for LDFLAGS_aarch32 and LDFLAGS_aarch64 in Makefile for architecture-specific linker options. Change-Id: Iab3337e338b7a0a16b0d102404d9db98c154f8f8 Signed-off-by: Douglas Raillard <douglas.raillard@arm.com>
2017-06-22aarch64: Enable Statistical Profiling Extensions for lower ELsdp-arm
SPE is only supported in non-secure state. Accesses to SPE specific registers from SEL1 will trap to EL3. During a world switch, before `TTBR` is modified the SPE profiling buffers are drained. This is to avoid a potential invalid memory access in SEL1. SPE is architecturally specified only for AArch64. Change-Id: I04a96427d9f9d586c331913d815fdc726855f6b0 Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
2017-06-01Remove `DISABLE_PEDANTIC` build optionAntonio Nino Diaz
It doesn't make sense to use the `-pedantic` flag when building the Trusted Firmware as we use GNU extensions and so our code is not fully ISO C compliant. This flag only makes sense if the code intends to be ISO C compliant. Change-Id: I6273564112759ff57f03b273f5349733a5f38aef Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2017-05-30Merge pull request #949 from antonio-nino-diaz-arm/an/printf-memorydavidcunado-arm
Reduce code size when building with Trusted Board Boot enabled
2017-05-24build: Introduce ARM Compiler 6 supportdp-arm
Only the compiler is switched to ARM Compiler 6. The assembler and linker are provided by the GCC toolchain. ARM Compiler 6 is used to build TF when the base name of the path assigned to `CC` matches the string 'armclang'. `CROSS_COMPILE` is still needed and should point to the appropriate GCC toolchain. Tested with ARM CC 6.7. Change-Id: Ib359bf9c1e8aeed3f662668e44830864f3fe7b4a Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
2017-05-24build: Introduce clang supportdp-arm
Only the compiler is switched to clang. The assembler and linker are provided by the GCC toolchain. clang is used to build TF when the base name of the path assigned to `CC` contains the string 'clang'. `CROSS_COMPILE` is still needed and should point to the appropriate GCC toolchain. Tested with clang 3.9.x and 4.0.x. Change-Id: I53236d64e3c83ad27fc843bae5fcdae30f2e325e Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
2017-05-24build: Introduce HOSTCC flagdp-arm
Tools are built using the compiler specified in `HOSTCC` instead of reusing the `CC` variable. By default, gcc is used. Change-Id: I83636a375c61f4804b4e80784db9d061fe20af87 Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
2017-05-24Switch default C environment from c99 to gnu99dp-arm
Since TF uses GCC extensions, switch the C environment from c99 to gnu99. This change allows armclang to build TF. Change-Id: Iaacb2726ba1458af59faf607ae9405d6eedb9962 Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
2017-05-24Merge pull request #938 from masahir0y/tools_sharedanh-arm
Collect headers shared between TF and host-tools into include/tools_share
2017-05-24Introduce `tf_snprintf`Antonio Nino Diaz
This is a reduced version of `snprintf` that only supports formats '%d', '%i' and '%u'. It can be used when the full `snprintf` is not needed in order to save memory. If it finds an unknown format specifier, it prints an error message and panics. Change-Id: I2cb06fcdf74cda2c43caf73ae0762a91499fc04e Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2017-05-24cert: move platform_oid.h to include/tools_share for all platformsMasahiro Yamada
Platforms aligned with TBBR are supposed to use their own OIDs, but defining the same macros with different OIDs does not provide any value (at least technically). For easier use of TBBR, this commit allows platforms to reuse the OIDs obtained by ARM Ltd. This will be useful for non-ARM vendors that do not need their own extension fields in their certificate files. The OIDs of ARM Ltd. have been moved to include/tools_share/tbbr_oid.h Platforms can include <tbbr_oid.h> instead of <platform_oid.h> by defining USE_TBBR_DEFS as 1. USE_TBBR_DEFS is 0 by default to keep the backward compatibility. For clarification, I inserted a blank line between headers from the include/ directory (#include <...>) and ones from a local directory (#include "..." ). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-05-23fip: move headers shared between TF and fiptool to include/tools_shareMasahiro Yamada
Some header files need to be shared between TF and host programs. For fiptool, two headers are copied to the tools/fiptool directory, but it looks clumsy. This commit introduces a new directory, include/tools_share, which collects headers that should be shared between TF and host programs. This will clarify the interface exposed to host tools. We should add new headers to this directory only when we really need to do so. For clarification, I inserted a blank line between headers from the include/ directory (#include <...>) and ones from a local directory (#include "..." ). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-05-15AArch32: Add BL2U supportYatharth Kochar
Add support for firmware upgrade on AArch32. This patch has been tested on the FVP models. NOTE: Firmware upgrade on Juno AArch32 is not currently supported. Change-Id: I1ca8078214eaf86b46463edd14740120af930aec Signed-off-by: dp-arm <dimitris.papastamos@arm.com> Co-Authored-By: Yatharth Kochar <yatharth.kochar@arm.com>
2017-05-15AArch32: Add `TRUSTED_BOARD_BOOT` supportdp-arm
This patch adds `TRUSTED_BOARD_BOOT` support for AArch32 mode. To build this patch the "mbedtls/include/mbedtls/bignum.h" needs to be modified to remove `#define MBEDTLS_HAVE_UDBL` when `MBEDTLS_HAVE_INT32` is defined. This is a workaround for "https://github.com/ARMmbed/mbedtls/issues/708" NOTE: TBBR support on Juno AArch32 is not currently supported. Change-Id: I86d80e30b9139adc4d9663f112801ece42deafcf Signed-off-by: dp-arm <dimitris.papastamos@arm.com> Co-Authored-By: Yatharth Kochar <yatharth.kochar@arm.com>
2017-05-12Hook up LLVM compiler-rt in the build systemdp-arm
This patch enables compiler-rt for the AArch32 target. The code is not used for AArch64 as the architecture supports the 64-bit division and modulo operations natively. Change-Id: I1703a92872b0bb56ac0b98c67193830683963b13 Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
2017-05-08Merge pull request #926 from EvanLloyd/win_make_4davidcunado-arm
Minor makefile fixes
2017-05-03Use SPDX license identifiersdp-arm
To make software license auditing simpler, use SPDX[0] license identifiers instead of duplicating the license text in every file. NOTE: Files that have been imported by FreeBSD have not been modified. [0]: https://spdx.org/ Change-Id: I80a00e1f641b8cc075ca5a95b10607ed9ed8761a Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
2017-05-02Build: Correct Unix specific echo commandsEvan Lloyd
Some recent changes have added direct use of the echo command without parameters. This fails on a Windows shell, because echo without parameters reports the mode ("ECHO is on"). This is corrected using the ECHO_BLANK_LINE macro already provided for that purpose. Change-Id: I5fd7192861b4496f6f46b4f096e80a752cd135d6 Signed-off-by: Evan Lloyd <evan.lloyd@arm.com>
2017-04-21Merge pull request #898 from soby-mathew/sm/dcache-earlydavidcunado-arm
PSCI: Build option to enable D-Caches early in warmboot
2017-04-20Remove build option `ASM_ASSERTION`Antonio Nino Diaz
The build option `ENABLE_ASSERTIONS` should be used instead. That way both C and ASM assertions can be enabled or disabled together. All occurrences of `ASM_ASSERTION` in common code and ARM platforms have been replaced by `ENABLE_ASSERTIONS`. ASM_ASSERTION has been removed from the user guide. Change-Id: I51f1991f11b9b7ff83e787c9a3270c274748ec6f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2017-04-19Add `ENABLE_ASSERTIONS` build optionAntonio Nino Diaz
Add the new build option `ENABLE_ASSERTIONS` that controls whether or not assert functions are compiled out. It defaults to 1 for debug builds and to 0 for release builds. Additionally, a following patch will be done to allow this build option to hide auxiliary code used for the checks done in an `assert()`. This code is is currently under the DEBUG build flag. Assert messages are now only printed if LOG_LEVEL >= LOG_LEVEL_INFO, which is the default for debug builds. This patch also updates the User Guide. Change-Id: I1401530b56bab25561bb0f274529f1d12c5263bc Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2017-04-19PSCI: Build option to enable D-Caches early in warmbootSoby Mathew
This patch introduces a build option to enable D-cache early on the CPU after warm boot. This is applicable for platforms which do not require interconnect programming to enable cache coherency (eg: single cluster platforms). If this option is enabled, then warm boot path enables D-caches immediately after enabling MMU. Fixes ARM-Software/tf-issues#456 Change-Id: I44c8787d116d7217837ced3bcf0b1d3441c8d80e Signed-off-by: Soby Mathew <soby.mathew@arm.com>
2017-04-14Merge pull request #890 from masahir0y/scpdavidcunado-arm
Build: add generic way to include SCP_BL2 into FIP image
2017-04-06Merge pull request #886 from dp-arm/dp/stack-protectordavidcunado-arm
Add support for GCC stack protection
2017-04-05Merge pull request #877 from soby-mathew/sm/build_opt_checksdavidcunado-arm
Include all makefiles before build option checks
2017-04-05Build: add generic way to include SCP_BL2 into FIP imageMasahiro Yamada
If SCP_BL2 is passed in from the command line, it is recognized by make_helpers/tbbr/tbbr_tools.mk, and the cert_create tool generates the corresponding key and content certificates. On the other hand, the top-level Makefile does not care SCP_BL2, so the --scp-fw option is not passed to the fiptool. As far as I see plat/arm/css/common/css_common.mk, it looks like a platform's job to add $(eval $(call FIP_ADD_IMG,SCP_BL2,--scp-fw)). We can make the top-level Makefile kind enough to take care of it. This is useful when we want to have optional SCP_BL2 firmware. Adjust css_common.mk so that Juno still requires SCP_BL2 by default. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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