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2018-04-16mvebu: cp110: fix digital reset RT SVCGrzegorz Jaszczyk
The command argument (x4) was missing and not passed during digital reset function call. Change-Id: I50fa176182ddabe904ab1d2f9cae5d73f6fbb7c0 Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/53132 Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com> Reviewed-by: Hanna Hawa <hannah@marvell.com>
2018-04-12mvebu: cp110: fix settings for the phy and pipe selectorGrzegorz Jaszczyk
When the pipe selector is configured the phy selector should be cleared (marked as unconnected) and vice-versa. Change-Id: Ie5a6eef2f05042dea3a4e7928d506cd5268fc465 Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> Signed-off-by: Igal Liberman <igall@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/53133 Tested-by: iSoC Platform CI <ykjenk@marvell.com>
2018-04-08mvebu: cp110: add support for digital resetGrzegorz Jaszczyk
Change-Id: Iaed7504ccd349456e3e16ac96e7f3a423bfb4f94 Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/52902 Reviewed-by: Kostya Porotchkin <kostap@marvell.com> Tested-by: Kostya Porotchkin <kostap@marvell.com>
2018-04-08mvebu: cp110: add support for AP comphy configurationGrzegorz Jaszczyk
Change-Id: I906e6cc740ba0cde3bced07b117da7dd3aad767e Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/52903 Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
2018-04-08mvebu: cp110: add support for XFI trainingGrzegorz Jaszczyk
It will be exposed as run time service, so the OS or Bootloader can trigger it. Change-Id: I08143856e3b8f3e51d472acd2182942b6ef358b8 Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/52901 Reviewed-by: Kostya Porotchkin <kostap@marvell.com> Tested-by: Kostya Porotchkin <kostap@marvell.com>
2018-04-08mvebu: cp110: add support for USB comphy configurationGrzegorz Jaszczyk
Change-Id: I1a3ff0bb832a165bb37e1e6eea1b5c1d438505b5 Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/52799 Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Igal Liberman <igall@marvell.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
2018-04-08mvebu: cp110: add support for RXAUI comphy configurationGrzegorz Jaszczyk
Change-Id: Ie23b3ac7d7235f2dffa040d42049675a2a313a24 Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/52714 Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Igal Liberman <igall@marvell.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
2018-03-29mvebu: cp110: add support for PCIe comphy configurationGrzegorz Jaszczyk
Change-Id: I3b8545f9eaefc6f312e40f3369c048a691e655ce Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/52627 Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Igal Liberman <igall@marvell.com>
2018-03-29mvebu: cp110: improve commentsGrzegorz Jaszczyk
No functional change Change-Id: If8d88bef1451c3dd961092108ebde7d00eee5167 Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/52626 Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Igal Liberman <igall@marvell.com>
2018-03-27stream-id: cp110: fix initialization of STREAM-IDDavid Sniatkiwicz
This patch fixes stream id initialization for CP110. - Initialize the Intr-Stream-ID in addition to the Func-Stream-ID. Change-Id: Iab777d0660159cd4d138702b773e7310f11a5fdc Signed-off-by: David Sniatkiwicz <davidsn@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/49299 Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Hanna Hawa <hannah@marvell.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
2018-03-22ap807: mochi: add mochi driver for Armada-AP807Hanna Hawa
Change-Id: I2866a307d45728d5a616a03813f62d3a9b3e2665 Signed-off-by: Hanna Hawa <hannah@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/52433 Reviewed-by: Kostya Porotchkin <kostap@marvell.com> Tested-by: iSoC Platform CI <ykjenk@marvell.com>
2018-03-22mvebu: cp110: add support for SFI/XFI comphy configurationGrzegorz Jaszczyk
Change-Id: I0a7cdfb4220c294186e302a5d50404b161285a78 Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/51988 Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Igal Liberman <igall@marvell.com>
2018-03-22mvebu: cp110: add support for SGMII comphy configurationGrzegorz Jaszczyk
Change-Id: Ie740010fbb610ec8be1d4661bea875113cd0dcca Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/51987 Reviewed-by: Igal Liberman <igall@marvell.com> Tested-by: iSoC Platform CI <ykjenk@marvell.com>
2018-03-22mvebu: cp110: add support for sata comphy configurationGrzegorz Jaszczyk
Change-Id: Ic217ee304284997b52fd81889efc5b47599990d1 Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/51986 Reviewed-by: Igal Liberman <igall@marvell.com> Tested-by: iSoC Platform CI <ykjenk@marvell.com>
2018-03-22mvebu: cp110: add support for comphy power offGrzegorz Jaszczyk
The phy-comphy-cp110.h are based on previous LSP comphy driver and are prepared also for further comphy requirements. Change-Id: Iaee6d24accdaaedda07c875c1ac59f86ddfc4208 Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/51985 Reviewed-by: Igal Liberman <igall@marvell.com> Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
2018-03-22mvebu: cp110: add skeleton driver for comphyGrzegorz Jaszczyk
Introduce the comphy driver which will be exposed as an runtime service. Thanks to that the OS (Linux) and Bootloader (UEFI and U-Boot) driver can be simplified in way that each of those driver will triggers only the appropriate SMC calls when required, letting ATF to perform required configuration. Thanks to that the whole configuration part will be kept in one place - ATF, but at the same time exposed to OS/Bootloaders as runtime services. The ATF code will dispatch each smc call (by parsing the smc function identifier) and trigger appropriate comphy initialization. Upcoming commit will add functionality for particular comphy configuration. Thanks to this approach the comphy driver can be maintained in one place (no need to align each OS/Bootloader after ETP update), but the serdes configuration can still be changed at runtime by OS/Bootloader demand. Change-Id: I1baafda8e2fdc08a67e24933f5d7072d6814a9a3 Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/51984 Reviewed-by: Igal Liberman <igall@marvell.com> Tested-by: Kostya Porotchkin <kostap@marvell.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
2018-03-22ap806: remove unused define, and move relevant to common fileHanna Hawa
Change-Id: I56a05033a2cf2bbfd5fffcb413ec0445b44ac071 Signed-off-by: Hanna Hawa <hannah@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/52431 Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
2018-03-20fix: cp110: amb: enable amb window by defaultjinghua
AMB bridge window in CP110 needs to be enabled, otherwise all the address decode configuration in it would not work. This used to be done by BootRom in SPI boot mode, and was missing for other boot mode. This patch enables AMB window by default in cp110 init. Change-Id: I31415b7432d37149b6e83a7de993bbe1f3ee59ec Signed-off-by: jinghua <jinghua@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/51738 Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Hanna Hawa <hannah@marvell.com>
2018-03-19apn806: delete all the WA for the A0 chipTerry Zhou
We don't support A0 chip anymore Change-Id: I720df05591bf48a6506e441120f6a68bd9815db5 Signed-off-by: Terry Zhou <bjzhou@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/52186 Reviewed-by: Kostya Porotchkin <kostap@marvell.com> Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Hanna Hawa <hannah@marvell.com>
2018-03-19plat: a8k: update all AP related function to be more genericTerry Zhou
This patch is the preparation for the coming A3900 which using APN807 instead of APN806, we put it under A8K family since most of the designs are the same. Replace all the function/headfile names with apn806_XX to ap_XX Add ble init function before doing dram initialization since we use a new DDR PHY in APN807 Change-Id: Ia3f79f5236280df6ed22f7dee623c7f6a8a6aa46 Signed-off-by: Terry Zhou <bjzhou@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/52169 Reviewed-by: Hanna Hawa <hannah@marvell.com> Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
2018-03-18ap806: remove unused bootsrc sample at reset functionHanna Hawa
Change-Id: I74e7a36c27bd83cfb90af5c578939468fb17d818 Signed-off-by: Hanna Hawa <hannah@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/52078 Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
2018-03-18cp110: comphy: fix a8040 ocp compilationIgal Liberman
This patch adds missing defines to comphy driver. Thos defines are required for OCP and were removed by mistake. Change-Id: Ia942937a3d0b2efd936a7a9e613b3b7e8959577c Signed-off-by: Igal Liberman <igall@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/51412 Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
2018-03-18ap806: bl31: move some ap806 functions to be staticHanna Hawa
Change-Id: Id6c106ce45977b619d452735112aa2f5c630c51f Signed-off-by: Hanna Hawa <hannah@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/51493 Reviewed-by: Kostya Porotchkin <kostap@marvell.com> Tested-by: iSoC Platform CI <ykjenk@marvell.com>
2018-03-18ap806: bl31: change ap806_generic_timer_init to be staticHanna Hawa
Change-Id: Iaea76334e9f7defa241aaeec1db409429d0848fe Signed-off-by: Hanna Hawa <hannah@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/51492 Reviewed-by: Kostya Porotchkin <kostap@marvell.com> Tested-by: iSoC Platform CI <ykjenk@marvell.com>
2018-03-18Revert "delay_timer: Add timer value get functions"Hanna Hawa
This reverts commit 2dfa5a825542b91ea52f1e091d2296ddeef3508c. Change-Id: I45ce5472b677d2795ef454bbc8bd6d6d822faa54 Signed-off-by: Hanna Hawa <hannah@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/51488 Reviewed-by: Kostya Porotchkin <kostap@marvell.com> Tested-by: iSoC Platform CI <ykjenk@marvell.com>
2018-03-18drivers: marvell: io-win: Add API for save and restore windowsKonstantin Porotchkin
Add API for saving and restoring IOW windows on a specific AP. The main reason for this API addition is the BLE code cleanup and switching from direct access of the IOW registers to usage of the dedicated driver APIs. Change-Id: Ie10b2a69bbb738aaef003546d94a7291ff87c397 Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/51393 Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Hanna Hawa <hannah@marvell.com>
2018-03-18drivers: marvell: ccu: Add API for save and restore windowsKonstantin Porotchkin
Add API for saving and restoring CCU windows on a specific AP. The main reason for this API addition is the BLE code cleanup and switching from direct access of the CCU registers to usage of the dedicated driver APIs. Change-Id: I73dfeeccd614a3d8d3c5243848f6f12d92eba52e Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/51392 Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Hanna Hawa <hannah@marvell.com>
2018-03-06ap810: debug: update debug prints of address decodeHanna Hawa
Change-Id: I9bf7cdd4d7566f032147843df552ea6cad2471ce Signed-off-by: Hanna Hawa <hannah@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/51355 Reviewed-by: Kostya Porotchkin <kostap@marvell.com> Tested-by: iSoC Platform CI <ykjenk@marvell.com>
2018-03-05ap810: define constant fot AP810 revision IDHanna Hawa
Change-Id: I6c6e9d54f4896218f3b3ae6a37c206c9ed7a9164 Signed-off-by: Hanna Hawa <hannah@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/51321 Reviewed-by: Kostya Porotchkin <kostap@marvell.com> Tested-by: iSoC Platform CI <ykjenk@marvell.com>
2018-03-05bl31: ap810: enable store-and-forward uplink & buffer in A2Hanna Hawa
Update wrong configuration of Aurora 2, enable store-and-forward uplink Change-Id: I12f259210405a70f76be4e707f937c415de5621e Signed-off-by: Hanna Hawa <hannah@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/51238 Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
2018-03-01cp110: comphy: remove unused definesIgal Liberman
Change-Id: I6841d37e598f6032d60b1c7c8d58bb401e1d2556 Signed-off-by: Igal Liberman <igall@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/51242 Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
2018-02-27clocks: Rearrange headers in clock driversKonstantin Porotchkin
Remove unneded includes from the header files Re-arrange headers in the source files in ABC order as required by the mainline code guidelines Change-Id: Ie60d730f5aaeb3b4babec1ce023756e39da24f29 Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/51132 Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Hanna Hawa <hannah@marvell.com>
2018-02-22ap810: update naming conventionIgal Liberman
get_ap_count --> ap810_get_ap_count get_connected_cp_per_ap --> ap810_get_cp_per_ap_cnt get_static_cp_per_ap --> ap810_get_cp_per_ap_static_cnt Change-Id: Ia3f569ac7cc9dc414fdc7291cfbdc2ca11c1de51 Signed-off-by: Igal Liberman <igall@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/50860 Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Hanna Hawa <hannah@marvell.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
2018-02-22ap810: remove ble init from ap810_setupIgal Liberman
This patch removes ap810_ble_init from ap810_setup as part of the ap810_setup clean up. Currently, ap810_ble_init calls only ap810_enumeration_algo(). No need for this wrapping, ap810_enumeration_algo() should be called directly from plat_ble and (and plat_bl31 for palladium target). Change-Id: I4e035af31ceb06d1e71fb6625a1407f648c3c7b2 Signed-off-by: Igal Liberman <igall@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/50859 Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Hanna Hawa <hannah@marvell.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
2018-02-21a8kp: move bl31 init from ap810_setup to platform codeIgal Liberman
Change-Id: I86113cb6a2130aeb522862c9aaa97ab2f6c9177f Signed-off-by: Igal Liberman <igall@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/50740 Reviewed-by: Hanna Hawa <hannah@marvell.com> Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
2018-02-21ap810: move mci and address decoding initialization to BL1Igal Liberman
This change is requried as part of the preparation to add support for BL2 firmware load. Change-Id: Ic7447821f8d237992afb386263d688a906a542cd Signed-off-by: Igal Liberman <igall@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/50608 Reviewed-by: Hanna Hawa <hannah@marvell.com> Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
2018-02-13bl31: ap810: pd: call ap810_ble_init in bl31 for palladiumHanna Hawa
Palladium does not run BLE (need to call the init in BL31) to make sure that we init the enumeration algorithm Change-Id: I0f8b905885cefebc5b0bbf4c891eabf816777339 Signed-off-by: Hanna Hawa <hannah@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/50465 Reviewed-by: Kostya Porotchkin <kostap@marvell.com> Tested-by: iSoC Platform CI <ykjenk@marvell.com>
2018-02-13fix: mvebu: i2c: miinor cleanup of the driver codeKonstantin Porotchkin
- Reduce non-critical message level from ERROR to INFO - Return error in the read or write function fails after maximum retries. Change-Id: Iac61246252f1f4981d0f4d5f78dcbe31e910e228 Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/50514 Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Hanna Hawa <hannah@marvell.com>
2018-02-13a8k-p: ccu: remove MC remap function from CCU driverKonstantin Porotchkin
Remove the ccu_dram_mca_remap() function from CCU driver. Rename it to plat_dram_mca_remap() and move to the platform DRAM initialization flow. Instead of calling this API before DRAM scrubbing, in the ble_dram_config(), call it from plat_dram_init() after DRAM driver initialization. Change-Id: I00f1d11a2025dbbe9a28a0d90243bd93107e0018 Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/50448 Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Hanna Hawa <hannah@marvell.com>
2018-02-06mvebu: aro: introduce adaptive ring oscillatorChristine Gharzuzi
ARO is a clock generator, which is used in AP810 as a source clock for the CPU clusters. In AP810 the ARO is the major clock and in the default state the ARO is also in calibration mode. to configure the CPU frequency a flow of 2 steps is needed. Change-Id: Ie1d5550c7cd08ed8df6d1d404582ced54ba604d7 Signed-off-by: Christine Gharzuzi <chrisg@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/47084 Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Hanna Hawa <hannah@marvell.com>
2018-02-06mvebu: amb: Support CP base address in AMB porting APIKonstantin Porotchkin
Add support for CP base address in marvell_get_amb_memory_map() API for allowing AMB map definitions for several CPs Change-Id: I8d9a0a11e109aaa8dcba33f32d9e43af92b13aee Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/50013 Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Hanna Hawa <hannah@marvell.com>
2018-01-31ap810: ble: initialize IHB link between 2 APsChristine Gharzuzi
Implement JTAG driver to initialize MCI link between APs The driver uses MPPs to connect to the second AP over JTAG. This WA is relevant for revision A0 only Change-Id: If5f44f21b7d03556f18cd6f765f2a56b8c29b0b3 Signed-off-by: Christine Gharzuzi <chrisg@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/49161 Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
2018-01-31fix: mvebu: update debug prints of window driversKonstantin Porotchkin
Update debug prints in io/iob/gwin/ccu/amb drivers Change-Id: I06a509204565f683a97f5bcaf2fc76136efe60d3 Reviewed-on: http://vgitil04.il.marvell.com:8080/49860 Reviewed-by: Hanna Hawa <hannah@marvell.com> Tested-by: Kostya Porotchkin <kostap@marvell.com>
2018-01-31mvebu: Pretty printsKonstantin Porotchkin
Improve debug prints in iob/iow/gwin/ccu drivers Change-Id: Id62a107c538a8d2453961794b9147260c2f47088 Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/49695 Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Igal Liberman <igall@marvell.com>
2018-01-29ap810: eawg: add EAWG driver for clock configuration.Christine Gharzuzi
In AP810 software can configure the system clocks by using EAWG mechanism, which configures each PLL clock using pre-defined transactions. PLL clocks to be configured using EAWG unit are: - RCLK - IO - PIDI - DSS each transaction is a struct of 3 components: - address: to which address to write the data. - data: the data to be written. - delay: delay time between each write transaction. each AP EAWG has a FIFO with capacity of 48 transactions. the primary cpu loads the transactions into the FIFO and then triggers the EAWG and enters wait for event. the EAWG can be triggered and disabled whenever clocks re-configuration is needed. Change-Id: I469a2e620fcb5b724620e336acdfb8e4d5b0343f Signed-off-by: Christine Gharzuzi <chrisg@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/47083 Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
2018-01-29mvebu: iob: Enable IOB window after setting address rangeKonstantin Porotchkin
Move the IOB window enable operation past the ALR and AHR (high and low address registers) setup. Change-Id: I389366f7a6ae37a60d0b3a52baed0d86372622ac Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/49730 Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Hanna Hawa <hannah@marvell.com>
2018-01-25iob: mvebu: add dsb after cp110 address configurationIgal Liberman
This patch doesn't fix any particular issue. However, we must ensure that the cp110 base was configured before we continue (to ensure that no access to cp110 are done before the address is configured). Change-Id: I5264f82beaf9d0e9e7af6c655faabf7cd6e954cf Signed-off-by: Igal Liberman <igall@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/49470 Reviewed-by: Kostya Porotchkin <kostap@marvell.com> Reviewed-by: Hanna Hawa <hannah@marvell.com> Tested-by: iSoC Platform CI <ykjenk@marvell.com>
2018-01-25fix: mvebu: gwin: Do not report error on addresses mismatchKonstantin Porotchkin
Stop reporting error upon temporary GWIN window removal if the source window base address does not match the HW configuration. The base address could be aligned before writing it to the HW and in such case the test will fail. Checking the window target should be enough since there is no reason to install 2 GWIN windows with the same target value. Change-Id: I3ae8baf3e26ef617818828310abe709587f47acc Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/49425 Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Hanna Hawa <hannah@marvell.com>
2018-01-24iob: mvebu: improve information printsIgal Liberman
Currently, when we re-configure CP110 base address we get confusing prints: Change the base address of CP-0 to 8100000000 Change the base address of CP-1 to 8800000000 Change the base address of CP-0 to 9e00000000 Change the base address of CP-1 to a500000000 This patch updates the prints to the following: Change the base address of AP0-CP0 to 8100000000 Change the base address of AP0-CP1 to 8800000000 Change the base address of AP1-CP0 to 9e00000000 Change the base address of AP1-CP1 to a500000000 No functional change. Change-Id: Icbdd73c30f35e811205a9ad0bf3e9806f92498bd Signed-off-by: Igal Liberman <igall@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/49469 Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com> Reviewed-by: Hanna Hawa <hannah@marvell.com>
2018-01-24errata: ap806: implement workaround for errata-id 3033912Ken Ma
ERRATA ID: RES-3033912 - Internal Address Space Init state causes a hang upon accesses to [0xf070_0000, 0xf07f_ffff] Workaround: Boot Firmware (ATF) should configure CCU_RGF_WIN(4) to split [0x6e_0000, 0xff_ffff] to values [0x6e_0000, 0x6f_ffff] and [0x80_0000, 0xff_ffff] that cause accesses to the segment of [0xf070_0000, 0xf07f_ffff] to act as RAZWI. Change-Id: I8f38ad940d985be11ce0304d0b9dfd212ca4cb82 Signed-off-by: Ken Ma <make@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/48747 Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Wilson Ding <dingwei@marvell.com> Reviewed-by: Hanna Hawa <hannah@marvell.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
generated by cgit (git 2.34.1) at 2024-05-27 04:38:09 +0000