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authorAndrew Davis <afd@ti.com>2023-11-17 08:09:10 -0600
committerNishanth Menon <nm@ti.com>2023-12-04 12:17:08 -0600
commit27e5b7330fe31d0aae196f26cf251254f2b923bb (patch)
tree6cae609d6a61c437e4be2618525f213c96f24220
parent82277ed7db29296a2907eab91934c26c405db604 (diff)
arm64: dts: ti: k3-j721e: Add chipid node to wkup_conf bus
Like in other K3 SoCs the chipid register is inside the wakeup configuration space. Move the chipid node under a new bus to better represent this topology and match other similar SoCs. Signed-off-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20231117140910.8747-5-afd@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
-rw-r--r--arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi13
1 files changed, 10 insertions, 3 deletions
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
index f7ab7719fc07..8f259efe3af9 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
@@ -48,9 +48,16 @@
};
};
- chipid@43000014 {
- compatible = "ti,am654-chipid";
- reg = <0x0 0x43000014 0x0 0x4>;
+ wkup_conf: bus@43000000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x00 0x43000000 0x20000>;
+
+ chipid: chipid@14 {
+ compatible = "ti,am654-chipid";
+ reg = <0x14 0x4>;
+ };
};
wkup_pmx0: pinctrl@4301c000 {