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| author | Michal Simek <michal.simek@xilinx.com> | 2020-11-26 14:25:01 +0100 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2020-12-09 15:18:27 +0100 |
| commit | 3880c39a80abf6bbbebafa58e69f830bdac1ab3a (patch) | |
| tree | a56e6992c79e25d53d53ab4a607f5865e0c3f13b | |
| parent | 23ab93a1480002fd289071e08f7b4960fdfa76d8 (diff) | |
ARM: zynq: Rename bus to be align with simple-bus yaml
Rename amba to AXI. Based on Xilinx Zynq TRM (Chapter 5) chip is "AXI
point-to-point channels for communicating addresses, data, and response
transactions between master and slave clients. This ARM AMBA 3.0..."
Issues are reported as:
.. amba: $nodename:0: 'amba' does not match
'^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
>From schema:
../github.com/devicetree-org/dt-schema/dtschema/schemas/simple-bus.yaml
Similar change has been done for Xilinx ZynqMP SoC.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/8a4bc80debfbb79c296e76fc1e4c173e62657286.1606397101.git.michal.simek@xilinx.com
| -rw-r--r-- | arch/arm/boot/dts/zynq-7000.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi index db3899b07992..df9ad831cf05 100644 --- a/arch/arm/boot/dts/zynq-7000.dtsi +++ b/arch/arm/boot/dts/zynq-7000.dtsi @@ -92,7 +92,7 @@ }; }; - amba: amba { + amba: axi { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; |