diff options
| author | Olof Johansson <olof@lixom.net> | 2020-01-19 22:47:27 -0800 | 
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2020-01-19 22:47:29 -0800 | 
| commit | b744f09879a178cb0bca762a9a070c7151750294 (patch) | |
| tree | 10cfb01cf41d1dd5cdaf052857b88cc63f8bc828 | |
| parent | faaa9f6e8ab9a2da03cb215e7311e824e96b8bf7 (diff) | |
| parent | 8039c828a6cba966c9bdfacebff21ff823a94617 (diff) | |
Merge tag 'v5.6-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt
Removal of the simple-panel compatible and some minor
additional cleanups.
* tag 'v5.6-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  ARM: dts: rockchip: Kill off "simple-panel" compatibles
  ARM: dts: rockchip: rename dwmmc node names to mmc
  ARM: dts: rockchip: add reg property to brcmf sub node for rk3188-bqedison2qc
Link: https://lore.kernel.org/r/3473489.DgqFdXXe5V@phil
Signed-off-by: Olof Johansson <olof@lixom.net>
| -rw-r--r-- | arch/arm/boot/dts/rk3036.dtsi | 6 | ||||
| -rw-r--r-- | arch/arm/boot/dts/rk3188-bqedison2qc.dts | 3 | ||||
| -rw-r--r-- | arch/arm/boot/dts/rk322x.dtsi | 6 | ||||
| -rw-r--r-- | arch/arm/boot/dts/rk3288-evb.dtsi | 2 | ||||
| -rw-r--r-- | arch/arm/boot/dts/rk3288-veyron-edp.dtsi | 2 | ||||
| -rw-r--r-- | arch/arm/boot/dts/rk3288-veyron-minnie.dts | 2 | ||||
| -rw-r--r-- | arch/arm/boot/dts/rk3288-veyron-tiger.dts | 2 | ||||
| -rw-r--r-- | arch/arm/boot/dts/rk3288.dtsi | 8 | ||||
| -rw-r--r-- | arch/arm/boot/dts/rk3xxx.dtsi | 6 | ||||
| -rw-r--r-- | arch/arm/boot/dts/rv1108.dtsi | 6 | 
10 files changed, 23 insertions, 20 deletions
diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi index c70182c5aeb1..cf36e25195b4 100644 --- a/arch/arm/boot/dts/rk3036.dtsi +++ b/arch/arm/boot/dts/rk3036.dtsi @@ -224,7 +224,7 @@  		status = "disabled";  	}; -	sdmmc: dwmmc@10214000 { +	sdmmc: mmc@10214000 {  		compatible = "rockchip,rk3036-dw-mshc", "rockchip,rk3288-dw-mshc";  		reg = <0x10214000 0x4000>;  		clock-frequency = <37500000>; @@ -238,7 +238,7 @@  		status = "disabled";  	}; -	sdio: dwmmc@10218000 { +	sdio: mmc@10218000 {  		compatible = "rockchip,rk3036-dw-mshc", "rockchip,rk3288-dw-mshc";  		reg = <0x10218000 0x4000>;  		max-frequency = <37500000>; @@ -252,7 +252,7 @@  		status = "disabled";  	}; -	emmc: dwmmc@1021c000 { +	emmc: mmc@1021c000 {  		compatible = "rockchip,rk3036-dw-mshc", "rockchip,rk3288-dw-mshc";  		reg = <0x1021c000 0x4000>;  		interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; diff --git a/arch/arm/boot/dts/rk3188-bqedison2qc.dts b/arch/arm/boot/dts/rk3188-bqedison2qc.dts index c8b62bbd6a4a..ad1afd403052 100644 --- a/arch/arm/boot/dts/rk3188-bqedison2qc.dts +++ b/arch/arm/boot/dts/rk3188-bqedison2qc.dts @@ -466,9 +466,12 @@  	pinctrl-names = "default";  	pinctrl-0 = <&sd1_clk>, <&sd1_cmd>, <&sd1_bus4>;  	vmmcq-supply = <&vccio_wl>; +	#address-cells = <1>; +	#size-cells = <0>;  	status = "okay";  	brcmf: wifi@1 { +		reg = <1>;  		compatible = "brcm,bcm4329-fmac";  		interrupt-parent = <&gpio3>;  		interrupts = <RK_PD2 GPIO_ACTIVE_HIGH>; diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi index 340ed6ccb08f..4e90efdc9630 100644 --- a/arch/arm/boot/dts/rk322x.dtsi +++ b/arch/arm/boot/dts/rk322x.dtsi @@ -662,7 +662,7 @@  		};  	}; -	sdmmc: dwmmc@30000000 { +	sdmmc: mmc@30000000 {  		compatible = "rockchip,rk3228-dw-mshc", "rockchip,rk3288-dw-mshc";  		reg = <0x30000000 0x4000>;  		interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; @@ -675,7 +675,7 @@  		status = "disabled";  	}; -	sdio: dwmmc@30010000 { +	sdio: mmc@30010000 {  		compatible = "rockchip,rk3228-dw-mshc", "rockchip,rk3288-dw-mshc";  		reg = <0x30010000 0x4000>;  		interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; @@ -688,7 +688,7 @@  		status = "disabled";  	}; -	emmc: dwmmc@30020000 { +	emmc: mmc@30020000 {  		compatible = "rockchip,rk3228-dw-mshc", "rockchip,rk3288-dw-mshc";  		reg = <0x30020000 0x4000>;  		interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; diff --git a/arch/arm/boot/dts/rk3288-evb.dtsi b/arch/arm/boot/dts/rk3288-evb.dtsi index 2afd686b2033..018802df4c0e 100644 --- a/arch/arm/boot/dts/rk3288-evb.dtsi +++ b/arch/arm/boot/dts/rk3288-evb.dtsi @@ -97,7 +97,7 @@  	};  	panel: panel { -		compatible = "lg,lp079qx1-sp0v", "simple-panel"; +		compatible = "lg,lp079qx1-sp0v";  		backlight = <&backlight>;  		enable-gpios = <&gpio7 RK_PA4 GPIO_ACTIVE_HIGH>;  		pinctrl-0 = <&lcd_cs>; diff --git a/arch/arm/boot/dts/rk3288-veyron-edp.dtsi b/arch/arm/boot/dts/rk3288-veyron-edp.dtsi index 300a7e32c978..32c0f10765dd 100644 --- a/arch/arm/boot/dts/rk3288-veyron-edp.dtsi +++ b/arch/arm/boot/dts/rk3288-veyron-edp.dtsi @@ -54,7 +54,7 @@  	};  	panel: panel { -		compatible = "innolux,n116bge", "simple-panel"; +		compatible = "innolux,n116bge";  		status = "okay";  		power-supply = <&panel_regulator>;  		backlight = <&backlight>; diff --git a/arch/arm/boot/dts/rk3288-veyron-minnie.dts b/arch/arm/boot/dts/rk3288-veyron-minnie.dts index 39f76e02875f..383fad1a88a1 100644 --- a/arch/arm/boot/dts/rk3288-veyron-minnie.dts +++ b/arch/arm/boot/dts/rk3288-veyron-minnie.dts @@ -71,7 +71,7 @@  };  &panel { -	compatible = "auo,b101ean01", "simple-panel"; +	compatible = "auo,b101ean01";  	/delete-node/ panel-timing; diff --git a/arch/arm/boot/dts/rk3288-veyron-tiger.dts b/arch/arm/boot/dts/rk3288-veyron-tiger.dts index bebb230e592f..069f0c2c1fdf 100644 --- a/arch/arm/boot/dts/rk3288-veyron-tiger.dts +++ b/arch/arm/boot/dts/rk3288-veyron-tiger.dts @@ -53,7 +53,7 @@  };  &panel { -	compatible = "auo,b101ean01", "simple-panel"; +	compatible = "auo,b101ean01";  	/delete-node/ panel-timing; diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 415c75f5783c..9beb662166aa 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -247,7 +247,7 @@  		ports = <&vopl_out>, <&vopb_out>;  	}; -	sdmmc: dwmmc@ff0c0000 { +	sdmmc: mmc@ff0c0000 {  		compatible = "rockchip,rk3288-dw-mshc";  		max-frequency = <150000000>;  		clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>, @@ -261,7 +261,7 @@  		status = "disabled";  	}; -	sdio0: dwmmc@ff0d0000 { +	sdio0: mmc@ff0d0000 {  		compatible = "rockchip,rk3288-dw-mshc";  		max-frequency = <150000000>;  		clocks = <&cru HCLK_SDIO0>, <&cru SCLK_SDIO0>, @@ -275,7 +275,7 @@  		status = "disabled";  	}; -	sdio1: dwmmc@ff0e0000 { +	sdio1: mmc@ff0e0000 {  		compatible = "rockchip,rk3288-dw-mshc";  		max-frequency = <150000000>;  		clocks = <&cru HCLK_SDIO1>, <&cru SCLK_SDIO1>, @@ -289,7 +289,7 @@  		status = "disabled";  	}; -	emmc: dwmmc@ff0f0000 { +	emmc: mmc@ff0f0000 {  		compatible = "rockchip,rk3288-dw-mshc";  		max-frequency = <150000000>;  		clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>, diff --git a/arch/arm/boot/dts/rk3xxx.dtsi b/arch/arm/boot/dts/rk3xxx.dtsi index 97307a405e60..241f43e29c77 100644 --- a/arch/arm/boot/dts/rk3xxx.dtsi +++ b/arch/arm/boot/dts/rk3xxx.dtsi @@ -231,7 +231,7 @@  		status = "disabled";  	}; -	mmc0: dwmmc@10214000 { +	mmc0: mmc@10214000 {  		compatible = "rockchip,rk2928-dw-mshc";  		reg = <0x10214000 0x1000>;  		interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; @@ -245,7 +245,7 @@  		status = "disabled";  	}; -	mmc1: dwmmc@10218000 { +	mmc1: mmc@10218000 {  		compatible = "rockchip,rk2928-dw-mshc";  		reg = <0x10218000 0x1000>;  		interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; @@ -259,7 +259,7 @@  		status = "disabled";  	}; -	emmc: dwmmc@1021c000 { +	emmc: mmc@1021c000 {  		compatible = "rockchip,rk2928-dw-mshc";  		reg = <0x1021c000 0x1000>;  		interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi index 5876690ee09e..1fd06e7cb983 100644 --- a/arch/arm/boot/dts/rv1108.dtsi +++ b/arch/arm/boot/dts/rv1108.dtsi @@ -456,7 +456,7 @@  		#reset-cells = <1>;  	}; -	emmc: dwmmc@30110000 { +	emmc: mmc@30110000 {  		compatible = "rockchip,rv1108-dw-mshc", "rockchip,rk3288-dw-mshc";  		reg = <0x30110000 0x4000>;  		interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; @@ -468,7 +468,7 @@  		status = "disabled";  	}; -	sdio: dwmmc@30120000 { +	sdio: mmc@30120000 {  		compatible = "rockchip,rv1108-dw-mshc", "rockchip,rk3288-dw-mshc";  		reg = <0x30120000 0x4000>;  		interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; @@ -480,7 +480,7 @@  		status = "disabled";  	}; -	sdmmc: dwmmc@30130000 { +	sdmmc: mmc@30130000 {  		compatible = "rockchip,rv1108-dw-mshc", "rockchip,rk3288-dw-mshc";  		reg = <0x30130000 0x4000>;  		interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;  | 
