diff options
| -rw-r--r-- | drivers/net/ethernet/mellanox/mlxsw/pci.c | 7 | ||||
| -rw-r--r-- | drivers/net/ethernet/mellanox/mlxsw/pci_hw.h | 1 | ||||
| -rw-r--r-- | drivers/net/ethernet/mellanox/mlxsw/spectrum_qdisc.c | 7 | 
3 files changed, 11 insertions, 4 deletions
| diff --git a/drivers/net/ethernet/mellanox/mlxsw/pci.c b/drivers/net/ethernet/mellanox/mlxsw/pci.c index 23f7d828cf67..6ef20e5cc77d 100644 --- a/drivers/net/ethernet/mellanox/mlxsw/pci.c +++ b/drivers/net/ethernet/mellanox/mlxsw/pci.c @@ -1643,7 +1643,12 @@ static int mlxsw_pci_sw_reset(struct mlxsw_pci *mlxsw_pci,  		return 0;  	} -	wmb(); /* reset needs to be written before we read control register */ +	/* Reset needs to be written before we read control register, and +	 * we must wait for the HW to become responsive once again +	 */ +	wmb(); +	msleep(MLXSW_PCI_SW_RESET_WAIT_MSECS); +  	end = jiffies + msecs_to_jiffies(MLXSW_PCI_SW_RESET_TIMEOUT_MSECS);  	do {  		u32 val = mlxsw_pci_read32(mlxsw_pci, FW_READY); diff --git a/drivers/net/ethernet/mellanox/mlxsw/pci_hw.h b/drivers/net/ethernet/mellanox/mlxsw/pci_hw.h index a6441208e9d9..fb082ad21b00 100644 --- a/drivers/net/ethernet/mellanox/mlxsw/pci_hw.h +++ b/drivers/net/ethernet/mellanox/mlxsw/pci_hw.h @@ -59,6 +59,7 @@  #define MLXSW_PCI_SW_RESET			0xF0010  #define MLXSW_PCI_SW_RESET_RST_BIT		BIT(0)  #define MLXSW_PCI_SW_RESET_TIMEOUT_MSECS	5000 +#define MLXSW_PCI_SW_RESET_WAIT_MSECS		100  #define MLXSW_PCI_FW_READY			0xA1844  #define MLXSW_PCI_FW_READY_MASK			0xFFFF  #define MLXSW_PCI_FW_READY_MAGIC		0x5E diff --git a/drivers/net/ethernet/mellanox/mlxsw/spectrum_qdisc.c b/drivers/net/ethernet/mellanox/mlxsw/spectrum_qdisc.c index c33beac5def0..b5397da94d7f 100644 --- a/drivers/net/ethernet/mellanox/mlxsw/spectrum_qdisc.c +++ b/drivers/net/ethernet/mellanox/mlxsw/spectrum_qdisc.c @@ -46,7 +46,8 @@ mlxsw_sp_tclass_congestion_enable(struct mlxsw_sp_port *mlxsw_sp_port,  				  int tclass_num, u32 min, u32 max,  				  u32 probability, bool is_ecn)  { -	char cwtp_cmd[max_t(u8, MLXSW_REG_CWTP_LEN, MLXSW_REG_CWTPM_LEN)]; +	char cwtpm_cmd[MLXSW_REG_CWTPM_LEN]; +	char cwtp_cmd[MLXSW_REG_CWTP_LEN];  	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;  	int err; @@ -60,10 +61,10 @@ mlxsw_sp_tclass_congestion_enable(struct mlxsw_sp_port *mlxsw_sp_port,  	if (err)  		return err; -	mlxsw_reg_cwtpm_pack(cwtp_cmd, mlxsw_sp_port->local_port, tclass_num, +	mlxsw_reg_cwtpm_pack(cwtpm_cmd, mlxsw_sp_port->local_port, tclass_num,  			     MLXSW_REG_CWTP_DEFAULT_PROFILE, true, is_ecn); -	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(cwtpm), cwtp_cmd); +	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(cwtpm), cwtpm_cmd);  }  static int | 
