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AgeCommit message (Expand)Author
2022-12-13riscv: Fixup compile error with !MMUGuo Ren
2022-12-12riscv: Fix P4D_SHIFT definition for 3-level page table modeAlexandre Ghiti
2022-12-12riscv: Apply a static assert to riscv_isa_ext_idAndrew Jones
2022-12-12Merge patch series "RISC-V: Align the shadow stack"Palmer Dabbelt
2022-12-12RISC-V: Add some comments about the shadow and overflow stacksPalmer Dabbelt
2022-12-12RISC-V: Align the shadow stackPalmer Dabbelt
2022-12-09Merge patch series "riscv: alternative-macros.h cleanups"Palmer Dabbelt
2022-12-09Merge patch series "RISC-V: Ensure Zicbom has a valid block size"Palmer Dabbelt
2022-12-09RISC-V: Ensure Zicbom has a valid block sizeAndrew Jones
2022-12-09RISC-V: Introduce riscv_isa_extension_checkAndrew Jones
2022-12-09RISC-V: Improve use of isa2hwcap[]Andrew Jones
2022-12-09riscv: Don't duplicate _ALTERNATIVE_CFG* macrosAndrew Jones
2022-12-09riscv: alternatives: Drop the underscores from the assembly macro namesAndrew Jones
2022-12-09riscv: alternatives: Don't name unused macro parametersAndrew Jones
2022-12-09riscv: Don't duplicate __ALTERNATIVE_CFG in __ALTERNATIVE_CFG_2Andrew Jones
2022-12-09riscv: mm: call best_map_size many times during linear-mappingQinglin Pan
2022-12-08Merge patch series "riscv: Fix crash during early errata patching"Palmer Dabbelt
2022-12-08riscv: Move cast inside kernel_mapping_[pv]a_to_[vp]aSamuel Holland
2022-12-08riscv: Fix crash during early errata patchingSamuel Holland
2022-12-08riscv: boot: add zstd supportJisheng Zhang
2022-12-08Merge patch series "RISC-V interrupt controller select cleanup"Palmer Dabbelt
2022-12-08RISC-V: stop selecting SIFIVE_PLIC at the SoC levelConor Dooley
2022-12-08irqchip/riscv-intc: remove user selectability of RISCV_INTCConor Dooley
2022-12-08irqchip/sifive-plic: remove user selectability of SIFIVE_PLICConor Dooley
2022-12-08Merge patch series "Add PMEM support for RISC-V"Palmer Dabbelt
2022-12-08RISC-V: Enable PMEM driversAnup Patel
2022-12-08RISC-V: Implement arch specific PMEM APIsAnup Patel
2022-12-08RISC-V: Fix MEMREMAP_WB for systems with SvpbmtAnup Patel
2022-12-08Merge patch "RISC-V: Fix unannoted hardirqs-on in return to userspace slow-path"Palmer Dabbelt
2022-12-08RISC-V: Fix unannoted hardirqs-on in return to userspace slow-pathAndrew Bresticker
2022-12-08riscv: mm: notify remote harts about mmu cache updatesSergey Matyukevich
2022-12-05riscv: stacktrace: Make walk_stackframe cross pt_regs frameGuo Ren
2022-12-05riscv: stacktrace: Fixup ftrace_graph_ret_addr retp argumentGuo Ren
2022-12-05RISC-V: kexec: Fix memory leak of elf header bufferLi Huafei
2022-12-05RISC-V: kexec: Fix memory leak of fdt bufferLi Huafei
2022-12-02Merge patch series "Support VMCOREINFO export for RISCV64"Palmer Dabbelt
2022-12-02Documentation: kdump: describe VMCOREINFO export for RISCV64Xianting Tian
2022-12-02RISC-V: Add arch_crash_save_vmcoreinfo supportXianting Tian
2022-12-02riscv: add riscv rethook implementationBinglei Wang
2022-12-02riscv/mm: add arch hook arch_clear_hugepage_flagsTong Tiangen
2022-12-02riscv/mm: hugepage's PG_dcache_clean flag is only set in head pageTong Tiangen
2022-12-02RISC-V: defconfig: Enable CONFIG_SERIAL_8250_DWHal Feng
2022-12-02Merge patch series "RISC-V: Dynamic ftrace support for RV32I"Palmer Dabbelt
2022-12-02RISC-V: enable dynamic ftrace for RV32IJamie Iles
2022-12-02RISC-V: preserve a1 in mcountJamie Iles
2022-12-02RISC-V: reduce mcount save space on RV32Jamie Iles
2022-12-02RISC-V: use REG_S/REG_L for mcountJamie Iles
2022-11-29riscv: fix race when vmap stack overflowJisheng Zhang
2022-11-29RISC-V: enable sparsemem by default for defconfigConor Dooley
2022-11-17riscv: Kconfig: Enable cpufreq kconfig menuLad Prabhakar