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2017-04-03ARM: dts: r8a7794: Add Z2 clockGeert Uytterhoeven
Add the Z2 clock (Cortex-A7 CPU core clock), which uses a fixed divider, and link the first CPU node to it. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-04-03ARM: dts: r8a7792: Correct Z clockGeert Uytterhoeven
Unlike other R-Car Gen2 SoCs with Cortex-A15 CPU cores, R-Car V2H does not have a programmable Z clock (Cortex-A15 CPU core clock), but uses a fixed divider. This is similar to the Z2 clock (Cortex-A7 CPU core clock) on R-Car E2. Hence: - Remove the Z clock output from the cpg_clocks node, as this implied a programmable clock, - Add the Z clock as a fixed factor clock, - Let the first CPU node point to the new Z clock, - Remove the Z clock index from the bindings (this definition was used by r8a7792.dtsi only, and was not a contract between DT and driver). Fixes: 7c4163aae3d8e5b9 ("ARM: dts: r8a7792: initial SoC device tree") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-04-03ARM: dts: r8a7793: Correct parent of SSI[0-9] clocksGeert Uytterhoeven
The SSI-ALL gate clock is located in between the P clock and the individual SSI[0-9] clocks, hence the former should be listed as their parent. Fixes: 072d326542e49187 ("ARM: dts: r8a7793: add MSTP10 clocks to device tree") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-04-03ARM: dts: r8a7791: Correct parent of SSI[0-9] clocksGeert Uytterhoeven
The SSI-ALL gate clock is located in between the P clock and the individual SSI[0-9] clocks, hence the former should be listed as their parent. Fixes: ee9141522dcf13f8 ("ARM: shmobile: r8a7791: add MSTP10 support on DTSI") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-04-03ARM: dts: r8a7790: Correct parent of SSI[0-9] clocksGeert Uytterhoeven
The SSI-ALL gate clock is located in between the P clock and the individual SSI[0-9] clocks, hence the former should be listed as their parent. Fixes: bcde372254386872 ("ARM: shmobile: r8a7790: add MSTP10 support on DTSI") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-04-03ARM: dts: r7s72100: fix ethernet clock parentChris Brandt
Technically, the Ethernet block is run off the 133MHz Bus (B) clock, not the 33MHz Peripheral 0 (P0) clock. Fixes: 969244f9c720 ("ARM: dts: r7s72100: add ethernet clock to device tree") Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-04-03dt-bindings: Document the STM32 USB OTG DWC2 core bindingBruno Herrera
This patch adds the documentation for STM32F4x9 USB OTG FS/HS compatible strings. Signed-off-by: Bruno Herrera <bruherrera@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
2017-04-03ARM: dts: stm32: Enable USB HS in FS mode (embedded phy) on stm32f429-discoBruno Herrera
This patch enables USB HS working in FS mode on stm32f429-disco with 5V VBUS enable. Signed-off-by: Bruno Herrera <bruherrera@gmail.com> Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
2017-04-03ARM: dts: stm32: Enable USB FS on stm32f469-discoBruno Herrera
This patch enables USB FS on stm32f469-disco with 5V VBUS enable. Signed-off-by: Bruno Herrera <bruherrera@gmail.com> Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
2017-04-03ARM: dts: stm32: Add USB FS support for STM32F429 MCUBruno Herrera
This patch adds the USB pins and nodes for USB FS core. Signed-off-by: Bruno Herrera <bruherrera@gmail.com> Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
2017-03-31Merge tag 'arm-soc/for-4.11/devicetree-fixes' of ↵Arnd Bergmann
http://github.com/Broadcom/stblinux into fixes There was a little conflict between the v4.11 bugfixes and the new changes for 4.12, this merges the fixes into the 4.12 branch to avoid having to resolve it again. * Broadcom fixes in mainline ARM: dts: BCM5301X: Correct GIC_PPI interrupt flags ARM: dts: BCM5301X: Fix memory start address ARM: dts: BCM5301X: Fix UARTs on bcm953012k Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2017-03-31Merge tag 'omap-for-v4.12/dt-v2-signed' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt Pull "Devicetree changes for omaps for v4.12 merge window" from Tony Lindgren: - Add hecc node for am35x - Add onenand support for omap3-igep - Add bluetooth binding for n900/n9/n950 - Configure clocks and SATA for dm81xx - Update operating points tables for am33xx, am43xx and dra7 - Update SPI flash documentation for w25q64 - Configure SPI NOR for am335x-icev2 - Mux uart0 for am437x-gp-evm - Add thermal zones for omap3, omap4, omap5, dra7 - Configure LEDs for am335x-baltos - A series of droid 4 changes to configure various devices such as keypad, regulators, gpio-keys, rtc, power button, compass, accelerometer, touchscreen, backlight, poweroff, tmp105, HDMI, LCD panel and LEDs, EHCI, and micro-SD * tag 'omap-for-v4.12/dt-v2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (35 commits) ARM: dts: am335x-baltos: add LED support ARM: dts: omap4-droid4: Fix MMC1 card for detect GPIO and regulator ARM: dts: OMAP4460: Thermal: Add slope and offset values ARM: dts: OMAP443x: Thermal: Add slope and offset values ARM: dts: OMAP5: Thermal: Add slope and offset values ARM: dts: DRA7: Thermal: Add slope and offset values ARM: dts: omap3: Add cpu_thermal zone ARM: dts: am437x-gp-evm: Add pinmux for uart0 ARM: dts: am335x-icev2: Add SPI based NOR Documentation: devicetree: mtd: add w25q64 to list of supported SPI flashes ARM: dts: dra7: Add updated operating-points-v2 table for cpu ARM: dts: am4372: Update operating-points-v2 table for cpu ARM: dts: am335x-boneblack: Enable 1GHz OPP for cpu ARM: dts: am33xx: Add updated operating-points-v2 table for cpu ARM: dts: dm8168-evm: add SATA node ARM: dts: dm8168-evm: add the external reference clock for SATA ARM: dts: N9/N950: add bluetooth ARM: dts: N900: Add bluetooth ARM: dts: omap4-droid4: Configure EHCI so modems can be accessed ARM: dts: motorola-cpcap-mapphone: add LEDs ...
2017-03-31Merge tag 'v4.12-rockchip-dts32-1' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt Pull "Rockchip dts32 updates for 4.12 part1" from Heiko Stübner: Contains one new board, the Tinkerboard from Asus based on the rk3288, definitions for the mmc resets in the socs reset controller, sound support for the Rock2, dma support for mmc controllers on the rk3188 and a led-fix for the MiQi board and and irq-fix for older Cortex-A9 socs. * tag 'v4.12-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: ARM: dts: rockchip: setup DMA-channels for mmc0 and emmc for rk3188 ARM: dts: rockchip: fix PPI misconfiguration on Cortex-A9 socs ARM: dts: rockchip: add rk322x dw-mmc resets ARM: dts: rockchip: add rk3066/rk3188 dw-mmc resets ARM: dts: rockchip: add rk3036 dw-mmc resets ARM: dts: rockchip: add rk3288 dw-mmc resets ARM: dts: rockchip: add dts for RK3288-Tinker board dt-bindings: add rk3288-based Asus Tinker board ARM: dts: rockchip: fix the MiQi board's LED definition ARM: dts: rockchip: Add support for ES8388 to the Radxa Rock 2
2017-03-31Merge tag 'gemini-dts-2' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into next/dt Pull "DTS updates for the Gemini on top of the multiplatform base" from Linus Walleij: - Add the power controller to the DTS. - Augment the GPIO nodes to also include the Faraday compatible. - Add the PCI bus host and config to the Gemini device trees. * tag 'gemini-dts-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik: ARM: dts: add PCI to the Gemini device trees ARM: dts: augment Gemini GPIO nodes ARM: dts: add power controller to the Gemini DTS
2017-03-31Merge tag 'arm-soc/for-4.12/devicetree' of ↵Arnd Bergmann
http://github.com/Broadcom/stblinux into next/dt Pull "Broadcom devicetree changes for 4.12" from Florian Fainelli: This pull request contains Broadcom ARM-based SoCs Device Tree updates for 4.12, please pull the following: - Rafal: * adds basic support for the Linksys EA9200, Linksys EA6300 V1, Linksys EA9500, TP-Link Archer C5 V2 which are all based on BCM470x SoCs with a bunch of BCM43602 radios. * updates the BCM5301X DTS and DTS include file and moves the serial console parameters to the DTS include file since all BCM5301X that we have so far are consistent in using the same UART. He also does the same for the BCM53573 DTS. * makes some updates to the Tenda AC9 platform by describing its PCIe controllers and endpoints in order to be able to represent GPIOs attached to the on-chip Wi-Fi module. Once done, he adds the 2Ghz LED which is connected to one of these GPIOs. * re-licenses the DTS files he created to the ISC license * removes the use of the non-existend "default-off" LED trigger in the BCM53573 and BCM5301X DTS files - Aditya adds missing Netgear R8000 LEDS and keys for WAN status LEDS and brightness - Jon: * adds NAND controller Device Tree nodes to the BCM953012K reference board * converts the BCM5301X SoC to use the recently introduced Broadcom QSPI controller Device Tree nodes. * fixes the GIC PPI interrupt flags that the kernel now reports about. * adds ARM TWD watchdog entries to the BCM5301X DTS include file * adds I2C entries to the BCM5301X DTS include files. * disables i2c by default in the Northstar Plus DTS include file, and ,enables it at the board level instead. * adds USB (OHCI & EHCI) Device Tree nodes to the Northstar Plus DTS include files. - Steven adds the mailbox (PDC) unit and the crytographic unit (SPU) to the Broadcom Northstar Plus SoC DTS include file. Steven also adds proper ethernet aliases to the BCM53012HR board since some bootloaders require that for MAC address patching. - Eric adds the DSI and its corresponding clock nodes to the BCM283x DTS files but leaves them disabled by default (overlays should take care of enabling it) - Boris adds support for HDMI audio and related DMA channels to the BCM283x SoCs - Gerd adds support for the BCM2835 specific SDHCI controller to the BCM283x SoCs - Rob fixes the iProc msi-controller name and unit address now that DTC can produce additional errors * tag 'arm-soc/for-4.12/devicetree' of http://github.com/Broadcom/stblinux: (27 commits) ARM: dts: bcm: fix msi-controller name and unit address ARM: dts: BCM53573: Specify serial console parameters ARM: dts: BCM5301X: Specify serial console params in dtsi files ARM: dts: NSP: Add crypto (SPU) to dtsi ARM: dts: NSP: Add mailbox (PDC) to NSP ARM: dts: BCM953012HR: Add ethernet aliases ARM: dts: BCM5301X: Add support for TP-LINK Archer C5 V2 ARM: dts: NSP: disable i2c DT entry by default ARM: dts: NSP: Add EHCI/OHCI USB nodes to device tree ARM: dts: BCM5301X: Add I2C support to the DT ARM: dts: BCM5301X: Add TWD WD Support to DT ARM: dts: BCM5301X: Correct GIC_PPI interrupt flags ARM: dts: bcm2835: add sdhost controller to devicetree ARM: dts: bcm283x: Add HDMI audio related properties ARM: dts: BCM5301X: Don't use nonexistent "default-off" LED trigger ARM: dts: BCM53573: Don't use nonexistent "default-off" LED trigger ARM: dts: BCM5301X: Add missing Netgear R8000 LEDs and Keys ARM: dts: BCM5301X: Relicense DTS files I created to the ISC ARM: dts: bcm2835: Add the DSI module nodes and clocks. ARM: dts: BCM53573: Add Tenda AC9 2 GHz LED ...
2017-03-31Merge tag 'mvebu-dt-4.12-1' of git://git.infradead.org/linux-mvebu into next/dtArnd Bergmann
Pull "mvebu dt for 4.12 (part 1)" from Gregory CLEMENT: - Add node lable for Armada 38x - Add support for Synology DS116 NAS and Linksys WRT1900ACS - Update mbus controller description on Armada 38x allowing entering in standby - Add default trigger for sata led on various linksys boards - Update newly added armada-xp-98dx3236 - Enable hardware buffer manager support for the devices in the Linksys WRT AC Serie * tag 'mvebu-dt-4.12-1' of git://git.infradead.org/linux-mvebu: ARM: dts: mvebu: linksys: enable buffer manager support ARM: dts: mvebu: remove unnecessary PCI range from 98dx3236 ARM: dts: mvebu: Move mv98dx3236 clock bindings ARM: dts: Use armada-370-xp as a base for armada-xp-98dx3236 ARM: dts: armada-xp-98dx3236: combine dfx server nodes ARM: dts: armada: Add default trigger for sata led ARM: dts: armada-38x: Adjust mbus controller description on Armada 38x ARM: dts: armada-385: add support for the Linksys WRT1900ACS (Shelby) ARM: dts: armada-385-synology-ds116: add support for Synology DS116 NAS ARM: dts: armada-38x add node labels
2017-03-31Merge tag 'davinci-for-v4.12/dt' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/dt Pull "DaVinci DT updates for v4.12" from Sekhar Nori: DaVinci device tree updates to enable Video display on DA850 along with some whitespace clean-up. Also, enables sound and ADC support on Lego EV3. * tag 'davinci-for-v4.12/dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci: ARM: dts: da850-evm: add the output port to the vpif node ARM: dts: da850-evm: add IO expander node on UI card ARM: dts: da850: add vpif video display pins ARM: dts: da850-evm: fix whitespace errors ARM: da850-lego-ev3: Add device tree node for sound ARM: da850-lego-ev3: Add device tree node for A/DC
2017-03-31ARM: dts: augment Moxa ART GPIO nodeLinus Walleij
The Moxa ART GPIO is a Faraday FTGPIO010. Augment the DTS node to indicate both compatible values for the SoC and the IP part. Also increase the register range to 0x100, it has at least 0x48 bytes of registers, and a few extra will not hurt. Tested-by: Jonas Jensen <jonas.jensen@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2017-03-31Merge tag 'uniphier-dt-v4.12' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier into next/dt Pull "UniPhier ARM SoC DT updates for v4.12" from Masahiro Yamada: - Remove skeleton.dtsi inclusion - Fix W=* build warnings - Fix eMMC pin-mux node - Add pagesize properties to EEPROM nodes * tag 'uniphier-dt-v4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier: ARM: dts: uniphier: add pagesize property to EEPROM of proto boards ARM: dts: uniphier: add pagesize property to EEPROM of Support Card ARM: dts: uniphier: fix pin groups of eMMC pin-mux node ARM: dts: uniphier: move memory node below aliases node ARM: dts: uniphier: fix no unit name warnings ARM: dts: uniphier: remove skeleton.dtsi inclusion
2017-03-31Merge tag 'samsung-dt-hdmi-cec-4.12' into next/dtKrzysztof Kozlowski
Add to hdmi-cec node a phandle to hdmi node for new hdmi-cec notifier.
2017-03-31ARM: dts: exynos: add HDMI controller phandle to exynos4.dtsiHans Verkuil
Add the new hdmi phandle to exynos4.dtsi. This phandle is needed by the s5p-cec driver to initialize the CEC notifier framework. Tested with my Odroid U3. Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2017-03-30ARM: dts: clearfog: keep dts alphabetically orderedRussell King
Keep the clearfog DTS file ordered alphabetically - Florian placed the MDIO entry after pinctrl, which mis-orders the file. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-03-30ARM: dts: da850: move spi0_cs3_pin pinconf nodeDavid Lechner
This moves the spi0_cs3_pin pinconf node from the LEGO EV3 file to the common DA850 include file. This node is applicable to any board, and therefore belongs in the common file. Signed-off-by: David Lechner <david@lechnology.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2017-03-29ARM: dts: STiH407-family: update rproc node names to avoid conflictLoic Pallardy
The two st231-rproc nodes have the same name; Due to that it was impossible to distinguish them in remoteproc sysfs and debugfs interface. This patch provides them a name related to their functionality. Signed-off-by: Loic Pallardy <loic.pallardy@st.com>
2017-03-29ARM: dts: sun5i: Add interrupt for display backendChen-Yu Tsai
The display backend on sun5i shares the same interrupt line as the display frontend. Add it. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-03-29dt-bindings: display: sun4i: Add display backend interrupt to device tree ↵Chen-Yu Tsai
binding The display backend has an interrupt line. Add it to the device tree binding. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-03-28Merge branch 'omap-for-v4.12/dt-droid4-v2' into omap-for-v4.12/dt-v2Tony Lindgren
2017-03-28ARM: dts: qcom: msm8974: Add RPMCC DT nodeGeorgi Djakov
Add the RPM Clock Controller DT node for msm8974-based platforms, so that drivers can use the clocks provided by the RPM processor. Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-03-28ARM: dts: fix typo on APQ8060 DragonboardLinus Walleij
The DTS referred to SDC5 when it meant SDC1. Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-03-28ARM: dts: add SDC2 and SDC4 to the MSM8660 familyLinus Walleij
To make the picture complete, add DTS entries also for the second and fourth MMC/SD blocks on the MSM8660. SDC2 is an 8-bit interface and SDC4 is a 4-bit interface. Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-03-28ARM: dts: msm8974: Hook up adsp-pil's xo clockJonathan Neuschäfer
Without this patch (and with CONFIG_QCOM_ADSP_PIL), I get this error: [ 0.711529] qcom_adsp_pil adsp-pil: failed to get xo clock [ 0.711540] remoteproc remoteproc0: releasing adsp-pil With this patch, adsp-pil can initialize correctly. Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-03-28ARM: dts: qcom: Add msm8974 CoreSight componentsIvan T. Ivanov
Add initial set of CoreSight components found on Qualcomm msm8974 and apq8074 based platforms, including the APQ8074 Dragonboard board. Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org> Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org> Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-03-28ARM: dts: rockchip: Enable sata support on rock2 squareSjoerd Simons
The Rock 2 square board has a USB -> SATA converter hooked up to its usb host1 connection. Enable the usb controller and always turn on the power on the 5V sata power connector (controlled by gpio). Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-03-28ARM: dts: am335x-baltos: add LED supportYegor Yefremov
All three devices provide GPIO based LEDs named power, wlan and app. Place LEDs definition into a separate dtsi file as not all devices including am335x-baltos.dtsi have the same LED layout. Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-03-28ARM: dts: omap4-droid4: Fix MMC1 card for detect GPIO and regulatorTony Lindgren
There's a typo, it should be GPIO176 and not GPIO106. And it seems I messed up the regulators at some point while trying to figure out what devices the regulators are used. The correct regulator for MMC1 is vwlan2. Fixes: 0d4cb3ccee58 ("ARM: dts: Configure regulators for droid 4") Reported-by: Sebastian Reichel <sre@kernel.org> Reviewed-by: Sebastian Reichel <sre@kernel.org> Tested-by: Sebastian Reichel <sre@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-03-28ARM: dts: silk: Correct clock of DU1Geert Uytterhoeven
The second channel of the display unit uses a different module clock than the first channel. Fixes: 84e734f497cd48f6 ("ARM: dts: silk: add DU DT support") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-03-28ARM: dts: alt: Correct clock of DU1Geert Uytterhoeven
The second channel of the display unit uses a different module clock than the first channel. Fixes: 876e7fb9f418fd86 ("ARM: shmobile: r8a7794: alt: Enable VGA port") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-03-28ARM: dts: r8a7794: Correct clock of DU1Geert Uytterhoeven
The second channel of the display unit uses a different module clock than the first channel. Fixes: 46c4f13d04d729fa ("ARM: shmobile: r8a7794: Add DU node to device tree") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-03-28ARM: dts: r8a7794: Add DU1 clock to device treeGeert Uytterhoeven
Add the missing module clock for the second channel of the display unit. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-03-27ARM: sun8i: h2+: enable USB OTG for Orange Pi Zero boardIcenowy Zheng
Orange Pi Zero board features a USB OTG port, which has a ID pin, and can be used to power up the board. However, even if the board is powered via +5V pin in GPIO/expansion headers, the VBUS in the OTG port cannot be powered up, thus it's impossible to use it in host mode with simple OTG cables. Add support for it in peripheral mode. If someone really want to use it in host mode, the mode of PHY can be switch via sysfs, then use a powered USB OTG cable or powered USB HUB to power up external USB devices. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-03-27ARM: sun8i: h3: enable USB OTG on Orange Pi OneIcenowy Zheng
Orange Pi One features a MicroUSB port that can work in both host mode and peripheral mode. When in host mode, its VBUS is controlled via a GPIO; when in peripheral mode, its VBUS cannot be used to power up the board. Add support for this port. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-03-27ARM: sunxi: h3/h5: add usb_otg and OHCI/EHCI for usbc0 on H3/H5Icenowy Zheng
Allwinner H3/H5 have a dual-routed USB PHY0 -- routed to either OHCI/EHCI or MUSB controller. Add device nodes for these controllers. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-03-27arm: sun8i: h3: split Allwinner H3 .dtsiAndre Przywara
The new Allwinner H5 SoC is pin-compatible to the H3 SoC, but with the Cortex-A7 cores replaced by Cortex-A53 cores and the MMC controller updated. So we should really share almost the whole .dtsi. In preparation for that move the peripheral parts of the existing sun8i-h3.dtsi into a new sunxi-h3-h5.dtsi. The actual sun8i-h3.dtsi then includes that and defines the H3 specific parts on top of it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> [Icenowy: also split out mmc and gic, as well as pio and ccu's compatible, and make drop of skeleton into a seperated patch] Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-03-27arm: sun8i: h3: correct the GIC compatible in H3 to gic-400Icenowy Zheng
According to the datasheets provided by Allwinner, both Allwinner H3 and H5 use GIC-400 as their interrupt controller. For better device tree reusing, correct the GIC compatible in H3 DTSI to "arm,gic-400", thus this node can be reused in H5. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-03-27arm: sun8i: h3: drop pinctrl-a10.h inclusion for H3 DTSIIcenowy Zheng
After converting to generic pinconf binding, pinctrl-a10.h is now not used at all. Drop its inclusion for H3 DTSI. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-03-27arm: sun8i: h3: drop skeleton.dtsi inclusion in H3 DTSIIcenowy Zheng
The skeleton.dtsi file is now deprecated, and do not exist in ARM64 environment. Since we will soon reuse most part of H3 DTSI for H5, which is an ARM64 chip, drop skeleton.dtsi inclusion now. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-03-27ARM: dts: sun7i: Use axp209.dtsi on A20-OLinuXino-MicroEzequiel Garcia
This commit makes use of the axp209.dtsi file to define the AXP209 PMIC. While here, define the rails that are enabled on this board. Tested checking the regulator voltage varies according to the CPU frequency. Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-03-27ARM: dts: sun6i: sina31s: Enable SPDIF outChen-Yu Tsai
The SinA31s has a coaxial SPDIF output. Enable it. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-03-27ARM: sun8i: sina33: add cpu-supplyQuentin Schulz
This adds the cpu-supply DT property to the cpu0 DT node needed by the board to adapt the regulator voltage depending on the currently used OPP. Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-03-27ARM: sun8i: a33: add all operating pointsQuentin Schulz
This adds almost all operating points allowed for the A33 as defined by fex files available at: https://github.com/linux-sunxi/sunxi-boards/tree/master/sys_config/a33 There are more possible frequencies in this patch than there are in the fex files because the fex files only give an interval of possible frequencies for a given voltage. All supported frequencies are defined in the original driver code in Allwinner vendor tree. There are two missing frequencies though: 1104MHz and 1200MHz which require the CPU to have 1.32V supplied, which is higher than the default voltage. Without all A33 boards defining the CPU regulator, we cannot have these two frequencies as it would cause the CPU to try to run a higher frequency without "overvolting" which is very likely to crash the CPU. Therefore, these two frequencies must be enabled on a per-board basis. Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
generated by cgit (git 2.34.1) at 2025-09-15 09:11:58 +0000