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2020-03-24mtd: spi-nor: Enable locking for n25q512ax3/n25q512aJungseung Lee
n25q512ax3 and n25q512a use the 4 bit Block Protection scheme. Enable locking for both. Tested on n25q512ax3. The other is modified following the datasheet. Signed-off-by: Jungseung Lee <js07.lee@samsung.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-03-24mtd: spi-nor: Add SR 4bit block protection supportJungseung Lee
Currently we are supporting block protection only for flash chips with 3 block protection bits (BP0-2) in the SR register. Enable block protection support for flashes with 4 block protection bits (BP0-3). Add a flash_info flag for flashes that describe 4 block protection bits. Add another flash_info flag for flashes in which BP3 bit is not adjacent to the BP0-2 bits. Tested with a n25q512ax3 (BP0-3) and w25q128 (BP0-2). Signed-off-by: Jungseung Lee <js07.lee@samsung.com> Reviewed-by: Michael Walle <michael@walle.cc> Tested-by: Michael Walle <michael@walle.cc> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-03-24mtd: spi-nor: Add generic formula for SR block protection handlingJungseung Lee
The current mainline locking was restricted and could only be applied to flashes that have 3 block protection bits and fixed locking ratio. A new method of normalization was reached at the end of the discussion [1]. (1) - if bp slot is insufficient. (2) - if bp slot is sufficient. if (bp_slots_needed > bp_slots) // (1) min_prot_length = sector_size << (bp_slots_needed - bp_slots); else // (2) min_prot_length = sector_size; This patch changes logic to handle block protection based on min_prot_length. It is suitable for the overall flashes with exception of some corner cases (see EON and catalyst) and easy to extend and apply for the case of 2bit or 4bit block protection. [1] http://lists.infradead.org/pipermail/linux-mtd/2020-February/093934.html Signed-off-by: Jungseung Lee <js07.lee@samsung.com> Reviewed-by: Michael Walle <michael@walle.cc> Tested-by: Michael Walle <michael@walle.cc> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2020-03-24x86/vmware: Use bool type for vmw_sched_clockAlexey Makhalov
To be aligned with other bool variables. Signed-off-by: Alexey Makhalov <amakhalov@vmware.com> Signed-off-by: Borislav Petkov <bp@suse.de> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lkml.kernel.org/r/20200323195707.31242-6-amakhalov@vmware.com
2020-03-24Merge branch 'for-mingo' of ↵Ingo Molnar
git://git.kernel.org/pub/scm/linux/kernel/git/paulmck/linux-rcu into core/rcu Pull RCU changes from Paul E. McKenney: - Make kfree_rcu() use kfree_bulk() for added performance - RCU updates - Callback-overload handling updates - Tasks-RCU KCSAN and sparse updates - Locking torture test and RCU torture test updates - Documentation updates - Miscellaneous fixes Signed-off-by: Ingo Molnar <mingo@kernel.org>
2020-03-24gpiolib: acpi: Add quirk to ignore EC wakeups on HP x2 10 CHT + AXP288 modelHans de Goede
There are at least 3 models of the HP x2 10 models: Bay Trail SoC + AXP288 PMIC Cherry Trail SoC + AXP288 PMIC Cherry Trail SoC + TI PMIC Like on the other HP x2 10 models we need to ignore wakeup for ACPI GPIO events on the external embedded-controller pin to avoid spurious wakeups on the HP x2 10 CHT + AXP288 model too. This commit adds an extra DMI based quirk for the HP x2 10 CHT + AXP288 model, ignoring wakeups for ACPI GPIO events on the EC interrupt pin on this model. This fixes spurious wakeups from suspend on this model. Fixes: aa23ca3d98f7 ("gpiolib: acpi: Add honor_wakeup module-option + quirk mechanism") Reported-and-tested-by: Marc Lehmann <schmorp@schmorp.de> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Link: https://lore.kernel.org/r/20200302111225.6641-4-hdegoede@redhat.com Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-24x86/vmware: Enable steal time accountingAlexey Makhalov
Set paravirt_steal_rq_enabled if steal clock present. paravirt_steal_rq_enabled is used in sched/core.c to adjust task progress by offsetting stolen time. Use 'no-steal-acc' off switch (share same name with KVM) to disable steal time accounting. Signed-off-by: Alexey Makhalov <amakhalov@vmware.com> Signed-off-by: Borislav Petkov <bp@suse.de> Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lkml.kernel.org/r/20200323195707.31242-5-amakhalov@vmware.com
2020-03-24x86/vmware: Add steal time clock support for VMware guestsAlexey Makhalov
Steal time is the amount of CPU time needed by a guest virtual machine that is not provided by the host. Steal time occurs when the host allocates this CPU time elsewhere, for example, to another guest. Steal time can be enabled by adding the VM configuration option stealclock.enable = "TRUE". It is supported by VMs that run hardware version 13 or newer. Introduce the VMware steal time infrastructure. The high level code (such as enabling, disabling and hot-plug routines) was derived from KVM. [ Tomer: use READ_ONCE macros and 32bit guests support. ] [ bp: Massage. ] Co-developed-by: Tomer Zeltzer <tomerr90@gmail.com> Signed-off-by: Alexey Makhalov <amakhalov@vmware.com> Signed-off-by: Tomer Zeltzer <tomerr90@gmail.com> Signed-off-by: Borislav Petkov <bp@suse.de> Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lkml.kernel.org/r/20200323195707.31242-4-amakhalov@vmware.com
2020-03-24habanalabs: fix pm manual->auto in GOYAOded Gabbay
When moving from manual to automatic power management mode in GOYA, the driver didn't correctly place the device in LOW power mode. As a result, if an application was run immediately after the move, it would have run with low frequencies. Reviewed-by: Omer Shpigelman <oshpigelman@habana.ai> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2020-03-24habanalabs: show unsupported message for GAUDIOded Gabbay
If a GAUDI device is present in the system, display an error message that it is not supported by the current kernel. Reviewed-by: Omer Shpigelman <oshpigelman@habana.ai> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2020-03-24habanalabs: add print upon clock changeOmer Shpigelman
Add print upon clock slow down due to power consumption or overheating. In addition, add print when back to optimal clock. Signed-off-by: Omer Shpigelman <oshpigelman@habana.ai> Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2020-03-24habanalabs: update goya firmware register mapOded Gabbay
Use specific values in enum of register map to be able to deprecate old values. Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2020-03-24habanalabs: Add missing annotation for goya_hw_queues_unlock()Jules Irenge
Sparse reports a warning at goya_hw_queues_unlock() warning: context imbalance in goya_hw_queues_unlock() - unexpected unlock The root cause is a missing annotation at goya_hw_queues_unlock() Add the missing __releases(&goya->hw_queues_lock) annotation Signed-off-by: Jules Irenge <jbi.octave@gmail.com> Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2020-03-24habanalabs: Add missing annotation for goya_hw_queues_lock()Jules Irenge
Sparse reports a warning at goya_hw_queues_lock() warning: context imbalance in goya_hw_queues_lock() - wrong count at exit The root cause is a missing annotation at goya_hw_queues_lock() Add the missing __acquires(&goya->hw_queues_lock) annotation Signed-off-by: Jules Irenge <jbi.octave@gmail.com> Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2020-03-24habanalabs: Remove unused parse_cnt variableTomer Tayar
The "parse_cnt" variable is incremented while validating the CS chunks, but it is actually not being used. Signed-off-by: Tomer Tayar <ttayar@habana.ai> Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2020-03-24habanalabs: provide historical maximum of various sensorsChristine Gharzuzi
Add support for hwmon_in_highest, hwmon_temp_highest and hwmon_curr_highest attributes. These attributes retrieve the historical maximum voltage, temperature and current that were sampled, respectively. Signed-off-by: Christine Gharzuzi <cgharzuzi@habana.ai> Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2020-03-24habanalabs: modify the return values of hl_read/write routinesMoti Haimovski
The hl read and write routines implement the hwmon_ops read and write interface routines respectively. These routines are expected to return a completion status when called, which was not the case until this commit. This commit modifies these routines to return 0 upon success and a negative error value upon failure. Signed-off-by: Moti Haimovski <mhaimovski@habana.ai> Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2020-03-24habanalabs: support temperature offset via sysfsMoti Haimovski
This commit adds support for offsetting the temperatures reading by a specified value as defined in https://www.kernel.org/doc/Documentation/hwmon/sysfs-interface using the standard sysfs defined for hwmon. This is required by system administrators to inject errors to test their monitoring applications in data centers. Signed-off-by: Moti Haimovski <mhaimovski@habana.ai> Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2020-03-24habanalabs: ratelimit error prints of IRQsOded Gabbay
The compute engines can perform millions of transactions per second. If there is a bug in the S/W stack, we could get a lot of interrupts and spam the kernel log. Therefore, ratelimit these prints Reviewed-by: Omer Shpigelman <oshpigelman@habana.ai> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2020-03-24habanalabs: add debugfs write64/read64Moti Haimovski
Allow debug user to write/read 64-bit data through debugfs. This will expedite the dump process of the (large) internal memories of the device done during debug. Signed-off-by: Moti Haimovski <mhaimovski@habana.ai> Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2020-03-24habanalabs: fix DDR bar address settingOmer Shpigelman
DRAM_PHYS_BASE is already taken into account in MMU_PAGE_TABLES_ADDR. Signed-off-by: Omer Shpigelman <oshpigelman@habana.ai> Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2020-03-24habanalabs: removing extra ;Oded Gabbay
There is an extra ; after the end of a function, which needs to be removed Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com> Reviewed-by: Tomer Tayar <ttayar@habana.ai>
2020-03-24habanalabs: Avoid running restore chunks if no execute chunksTomer Tayar
CS with no chunks for execute phase is invalid, so its context_switch/restore phase should not be run. Hence, move the check of the execute chunks number to the beginning of hl_cs_ioctl(). Signed-off-by: Tomer Tayar <ttayar@habana.ai> Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2020-03-24habanalabs: Modify CS jobs counter to u16Tomer Tayar
As HL_MAX_JOBS_PER_CS is 512, it is possible that more than 255 CS jobs will be submitted for a certain queue. Hence, modify the "jobs_in_queue_cnt" parameter of the "hl_cs" structure to be u16 instead of u8. Signed-off-by: Tomer Tayar <ttayar@habana.ai> Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2020-03-24habanalabs: split the host MMU propertiesOmer Shpigelman
Host memory may be allocated with huge pages. A different virtual range may be used for mapping in this case. Add Huge PCI MMU (HPMMU) properties to support it. This patch is a prerequisite for future ASICs support and has no effect on Goya ASIC as currently a single virtual host range is used for all page sizes. Signed-off-by: Omer Shpigelman <oshpigelman@habana.ai> Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2020-03-24habanalabs: use the user CB size as a default job sizeOmer Shpigelman
When no patched command buffer (CB) is created, use the user CB size as the job size. Signed-off-by: Omer Shpigelman <oshpigelman@habana.ai> Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2020-03-24habanalabs: flush only at the end of the map/unmapPawel Piskorski
Optimize hl_mmu_map and hl_mmu_unmap by not calling flush(ctx) within per-page loop. Signed-off-by: Pawel Piskorski <ppiskorski@habana.ai> Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
2020-03-24Bluetooth: L2CAP: Add get_peer_pid callbackLuiz Augusto von Dentz
This adds a callback to read the socket pid. Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com> Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
2020-03-24x86/vmware: Remove vmware_sched_clock_setup()Alexey Makhalov
Move cyc2ns setup logic to separate function. This separation will allow to use cyc2ns mult/shift pair not only for the sched_clock but also for other clocks such as steal_clock. Signed-off-by: Alexey Makhalov <amakhalov@vmware.com> Signed-off-by: Borislav Petkov <bp@suse.de> Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lkml.kernel.org/r/20200323195707.31242-3-amakhalov@vmware.com
2020-03-24x86/vmware: Make vmware_select_hypercall() __initAlexey Makhalov
vmware_select_hypercall() is used only by the __init functions, and should be annotated with __init as well. Signed-off-by: Alexey Makhalov <amakhalov@vmware.com> Signed-off-by: Borislav Petkov <bp@suse.de> Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lkml.kernel.org/r/20200323195707.31242-2-amakhalov@vmware.com
2020-03-24xfrm: policy: Fix doulbe free in xfrm_policy_timerYueHaibing
After xfrm_add_policy add a policy, its ref is 2, then xfrm_policy_timer read_lock xp->walk.dead is 0 .... mod_timer() xfrm_policy_kill policy->walk.dead = 1 .... del_timer(&policy->timer) xfrm_pol_put //ref is 1 xfrm_pol_put //ref is 0 xfrm_policy_destroy call_rcu xfrm_pol_hold //ref is 1 read_unlock xfrm_pol_put //ref is 0 xfrm_policy_destroy call_rcu xfrm_policy_destroy is called twice, which may leads to double free. Call Trace: RIP: 0010:refcount_warn_saturate+0x161/0x210 ... xfrm_policy_timer+0x522/0x600 call_timer_fn+0x1b3/0x5e0 ? __xfrm_decode_session+0x2990/0x2990 ? msleep+0xb0/0xb0 ? _raw_spin_unlock_irq+0x24/0x40 ? __xfrm_decode_session+0x2990/0x2990 ? __xfrm_decode_session+0x2990/0x2990 run_timer_softirq+0x5c5/0x10e0 Fix this by use write_lock_bh in xfrm_policy_kill. Fixes: ea2dea9dacc2 ("xfrm: remove policy lock when accessing policy->walk.dead") Signed-off-by: YueHaibing <yuehaibing@huawei.com> Acked-by: Timo Teräs <timo.teras@iki.fi> Acked-by: Herbert Xu <herbert@gondor.apana.org.au> Signed-off-by: Steffen Klassert <steffen.klassert@secunet.com>
2020-03-24mtd: spi-nor: Set all BP bits to one when lock_len == mtd->sizeTudor Ambarus
When there are more BP settings than needed for defining the protected areas of the flash memory, most flashes will define the remaining settings as "protect all", i.e. the equivalent of having all the BP bits set to one. But there are flashes where the in-between BP values are undefined (not mentioned), and only the "all bits set" is protecting the entire memory. One such example is w25q80, where BP[2:0]=0b101 and 0b110 are not defined. Set all the BP bits to one when lock_len == mtd->size, to treat this special case. Suggested-by: Michael Walle <michael@walle.cc> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Jungseung Lee <js07.lee@samsung.com> Reviewed-by: Michael Walle <michael@walle.cc>
2020-03-23Merge branch 'PTP_CLK-pin-configuration-for-SJA1105-DSA-driver'David S. Miller
Vladimir Oltean says: ==================== PTP_CLK pin configuration for SJA1105 DSA driver This series adds support for the PTP_CLK pin on SJA1105 to be configured via the PTP subsystem, in the "periodic output" and "external timestamp input" modes. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23net: dsa: sja1105: configure the PTP_CLK pin as EXT_TS or PER_OUTVladimir Oltean
The SJA1105 switch family has a PTP_CLK pin which emits a signal with fixed 50% duty cycle, but variable frequency and programmable start time. On the second generation (P/Q/R/S) switches, this pin supports even more functionality. The use case described by the hardware documents talks about synchronization via oneshot pulses: given 2 sja1105 switches, arbitrarily designated as a master and a slave, the master emits a single pulse on PTP_CLK, while the slave is configured to timestamp this pulse received on its PTP_CLK pin (which must obviously be configured as input). The difference between the timestamps then exactly becomes the slave offset to the master. The only trouble with the above is that the hardware is very much tied into this use case only, and not very generic beyond that: - When emitting a oneshot pulse, instead of being told when to emit it, the switch just does it "now" and tells you later what time it was, via the PTPSYNCTS register. [ Incidentally, this is the same register that the slave uses to collect the ext_ts timestamp from, too. ] - On the sync slave, there is no interrupt mechanism on reception of a new extts, and no FIFO to buffer them, because in the foreseen use case, software is in control of both the master and the slave pins, so it "knows" when there's something to collect. These 2 problems mean that: - We don't support (at least yet) the quirky oneshot mode exposed by the hardware, just normal periodic output. - We abuse the hardware a little bit when we expose generic extts. Because there's no interrupt mechanism, we need to poll at double the frequency we expect to receive a pulse. Currently that means a non-configurable "twice a second". Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Acked-by: Richard Cochran <richardcochran@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23net: dsa: sja1105: make the AVB table dynamically reconfigurableVladimir Oltean
The AVB table contains the CAS_MASTER field (to be added in the next patch) which decides the direction of the PTP_CLK pin. Reconfiguring this field dynamically is highly preferable to having to reset the switch and upload a new static configuration, so we add support for exactly that. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23net: dsa: sja1105: make future_base_time a common helperVladimir Oltean
Because the PTP_CLK pin starts toggling only at a time higher than the current PTP clock, this helper from the time-aware shaper code comes in handy here as well. We'll use it to transform generic user input for the perout request into valid input for the sja1105 hardware. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23net: dsa: sja1105: unconditionally set DESTMETA and SRCMETA in AVB tableVladimir Oltean
These fields configure the destination and source MAC address that the switch will put in the Ethernet frames sent towards the CPU port that contain RX timestamps for PTP. These fields do not enable the feature itself, that is configured via SEND_META0 and SEND_META1 in the General Params table. The implication of this patch is that the AVB Params table will always be present in the static config. Which doesn't really hurt. This is needed because in a future patch, we will add another field from this table, CAS_MASTER, for configuring the PTP_CLK pin function. That can be configured irrespective of whether RX timestamping is enabled or not, so always having this table present is going to simplify things a bit. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23net: typhoon: Add required whitespace after keywordsLogan Magee
checkpatch found a lack of appropriate whitespace after certain keywords as per the style guide. Add it in. Signed-off-by: Logan Magee <mageelog@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23Merge branch 'introduce-read_poll_timeout'David S. Miller
Dejin Zheng says: ==================== introduce read_poll_timeout This patch sets is introduce read_poll_timeout macro, it is an extension of readx_poll_timeout macro. the accessor function op just supports only one parameter in the readx_poll_timeout macro, but this macro can supports multiple variable parameters for it. so functions like phy_read(struct phy_device *phydev, u32 regnum) and phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum) can use this poll timeout framework. the first patch introduce read_poll_timeout macro, and the second patch redefined readx_poll_timeout macro by read_poll_timeout(), and the other patches are examples using read_poll_timeout macro. v6 -> v7: - add a parameter to supports that it can sleep some time before read operation in read_poll_timeout macro. - add prefix with double underscores for some variable to avoid any variable re-declaration or shadowing in patch 3 and patch 7. v5 -> v6: - add some check to keep the code more similar in patch 8 v4 -> v5: - add some msleep() before call phy_read_mmd_poll_timeout() to keep the code more similar in patch 6 and patch 9. - add a patch of drop by v4, it can add msleep before call phy_read_poll_timeout() to keep the code more similar. v3 -> v4: - add 3 examples of using new functions. - deal with precedence issues for parameter cond. - drop a patch about phy_poll_reset() function. v2 -> v3: - modify the parameter order of newly added functions. phy_read_mmd_poll_timeout(val, cond, sleep_us, timeout_us, \ phydev, devaddr, regnum) || \/ phy_read_mmd_poll_timeout(phydev, devaddr regnum, val, cond, \ sleep_us, timeout_us) phy_read_poll_timeout(val, cond, sleep_us, timeout_us, \ phydev, regnum) || \/ phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \ timeout_us) v1 -> v2: - passed a phydev, device address and a reg to replace args... parameter in phy_read_mmd_poll_timeout() by Andrew Lunn 's suggestion in patch 3. Andrew Lunn <andrew@lunn.ch>, Thanks very much for your help! - also in patch 3, handle phy_read_mmd return an error(the return value < 0) in phy_read_mmd_poll_timeout(). Thanks Andrew again. - in patch 6, pass a phydev and a reg to replace args... parameter in phy_read_poll_timeout(), and also handle the phy_read() function's return error. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23net: phy: tja11xx: use phy_read_poll_timeout() to simplify the codeDejin Zheng
use phy_read_poll_timeout() to replace the poll codes for simplify tja11xx_check() function. Suggested-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Dejin Zheng <zhengdejin5@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23net: phy: smsc: use phy_read_poll_timeout() to simplify the codeDejin Zheng
use phy_read_poll_timeout() to replace the poll codes for simplify lan87xx_read_status() function. Suggested-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Dejin Zheng <zhengdejin5@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23net: phy: use phy_read_poll_timeout() to simplify the codeDejin Zheng
use phy_read_poll_timeout() to replace the poll codes for simplify the code in phy_poll_reset() function. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Dejin Zheng <zhengdejin5@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23net: phy: introduce phy_read_poll_timeout macroDejin Zheng
it is sometimes necessary to poll a phy register by phy_read() function until its value satisfies some condition. introduce phy_read_poll_timeout() macros that do this. Suggested-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Dejin Zheng <zhengdejin5@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23net: phy: marvell10g: use phy_read_mmd_poll_timeout() to simplify the codeDejin Zheng
use phy_read_mmd_poll_timeout() to replace the poll codes for simplify mv3310_reset() function. Suggested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Dejin Zheng <zhengdejin5@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23net: phy: aquantia: use phy_read_mmd_poll_timeout() to simplify the codeDejin Zheng
use phy_read_mmd_poll_timeout() to replace the poll codes for simplify aqr107_wait_reset_complete() function. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Dejin Zheng <zhengdejin5@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23net: phy: bcm84881: use phy_read_mmd_poll_timeout() to simplify the codeDejin Zheng
use phy_read_mmd_poll_timeout() to replace the poll codes for simplify bcm84881_wait_init() function. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Dejin Zheng <zhengdejin5@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23net: phy: introduce phy_read_mmd_poll_timeout macroDejin Zheng
it is sometimes necessary to poll a phy register by phy_read_mmd() function until its value satisfies some condition. introduce phy_read_mmd_poll_timeout() macros that do this. Suggested-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Dejin Zheng <zhengdejin5@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23iopoll: redefined readx_poll_timeout macro to simplify the codeDejin Zheng
redefined readx_poll_timeout macro by read_poll_timeout to simplify the code. Signed-off-by: Dejin Zheng <zhengdejin5@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23iopoll: introduce read_poll_timeout macroDejin Zheng
this macro is an extension of readx_poll_timeout macro. the accessor function op just supports only one parameter in the readx_poll_timeout macro, but this macro can supports multiple variable parameters for it. so functions like phy_read(struct phy_device *phydev, u32 regnum) and phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum) can also use this poll timeout core. and also expand it can sleep some time before read operation. Signed-off-by: Dejin Zheng <zhengdejin5@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-23Remove DST_HOSTDavid Laight
Previous changes to the IP routing code have removed all the tests for the DS_HOST route flag. Remove the flags and all the code that sets it. Signed-off-by: David Laight <david.laight@aculab.com> Acked-by: David Ahern <dsahern@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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