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2020-07-28ARM: mstar: Add infinity/infinity3 family dtsisDaniel Palmer
This adds two family level dtsis for the infinity and infinity3 and then adds a chip level dtsi each for a chip in those families. infinity3.dtsi includes infinity.dtsi as these SoCs share most of their memory map and we would have a lot of duplication otherwise. Signed-off-by: Daniel Palmer <daniel@0x0f.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-28ARM: mstar: Add Armv7 base dtsiDaniel Palmer
Adds initial dtsi for the base MStar/Sigmastar Armv7 SoCs. These SoCs have very similar memory maps and this will avoid duplicating nodes across multiple dtsis. Signed-off-by: Daniel Palmer <daniel@0x0f.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-28ARM: mstar: Add binding details for mstar,l3bridgeDaniel Palmer
This adds a YAML description of the l3bridge node needed by the platform code for the MStar/SigmaStar Armv7 SoCs. Signed-off-by: Daniel Palmer <daniel@0x0f.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-28ARM: mstar: Add machine for MStar/Sigmastar Armv7 SoCsDaniel Palmer
Initial support for the MStar/Sigmastar Armv7 based IP camera and dashcam SoCs. These chips are interesting in that they contain a Cortex-A7, peripherals and system memory in a single tiny QFN package that can be hand soldered allowing almost anyone to embed Linux in their projects. Signed-off-by: Daniel Palmer <daniel@0x0f.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-28dt-bindings: arm: Add mstar YAML schemaDaniel Palmer
Signed-off-by: Daniel Palmer <daniel@0x0f.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-28dt-bindings: vendor-prefixes: Add thingy.jp prefixDaniel Palmer
Add prefix for thingy.jp Signed-off-by: Daniel Palmer <daniel@0x0f.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-28dt-bindings: vendor-prefixes: Add 70mai vendor prefixDaniel Palmer
Add prefix for 70mai Co., Ltd Signed-off-by: Daniel Palmer <daniel@0x0f.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-28dt-bindings: vendor-prefixes: Add sstar vendor prefixDaniel Palmer
Add prefix for Xiamen Xingchen Technology Co., Ltd Signed-off-by: Daniel Palmer <daniel@0x0f.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-28dt-bindings: vendor-prefixes: Add mstar vendor prefixDaniel Palmer
Add prefix for MStar Semiconductor, Inc. Signed-off-by: Daniel Palmer <daniel@0x0f.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-28arm64: dts: sparx5: Add i2c devices, i2c muxesLars Povlsen
This patch adds i2c devices and muxes to the Sparx5 reference boards. Link: https://lore.kernel.org/r/20200615133242.24911-11-lars.povlsen@microchip.com Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-28arm64: dts: sparx5: Add Sparx5 SoC DPLL clockLars Povlsen
This adds a DPLL clock to the Sparx5 SoC. It is used to generate clock to misc peripherals, specifically the SDHCI/eMMC controller. Link: https://lore.kernel.org/r/20200615133242.24911-10-lars.povlsen@microchip.com Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-28lockdep: Move list.h inclusion into lockdep.hHerbert Xu
Currently lockdep_types.h includes list.h without actually using any of its macros or functions. All it needs are the type definitions which were moved into types.h long ago. This potentially causes inclusion loops because both are included by many core header files. This patch moves the list.h inclusion into lockdep.h. Note that we could probably remove it completely but that could potentially result in compile failures should any end users not include list.h directly and also be unlucky enough to not get list.h via some other header file. Reported-by: Petr Mladek <pmladek@suse.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Tested-by: Petr Mladek <pmladek@suse.com> Link: https://lkml.kernel.org/r/20200716063649.GA23065@gondor.apana.org.au
2020-07-28ALSA: hda/hdmi: Fix keep_power assignment for non-component devicesTakashi Iwai
It's been reported that, when neither nouveau nor Nvidia graphics driver is used, the screen starts flickering. And, after comparing between the working case (stable 4.4.x) and the broken case, it turned out that the problem comes from the audio component binding. The Nvidia and AMD audio binding code clears the bus->keep_power flag whenever snd_hdac_acomp_init() succeeds. But this doesn't mean that the component is actually bound, but it merely indicates that it's ready for binding. So, when both nouveau and Nvidia are blacklisted or not ready, the driver keeps running without the audio component but also with bus->keep_power = false. This made the driver runtime PM kicked in and powering down when unused, which results in flickering in the graphics side, as it seems. For fixing the bug, this patch moves the bus->keep_power flag change into generic_acomp_notifier_set() that is the function called from the master_bind callback of component ops; i.e. it's guaranteed that the binding succeeded. BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=208609 Fixes: 5a858e79c911 ("ALSA: hda - Disable audio component for legacy Nvidia HDMI codecs") Cc: <stable@vger.kernel.org> Link: https://lore.kernel.org/r/20200728082033.23933-1-tiwai@suse.de Signed-off-by: Takashi Iwai <tiwai@suse.de>
2020-07-28KVM: arm64: Don't inherit exec permission across page-table levelsWill Deacon
If a stage-2 page-table contains an executable, read-only mapping at the pte level (e.g. due to dirty logging being enabled), a subsequent write fault to the same page which tries to install a larger block mapping (e.g. due to dirty logging having been disabled) will erroneously inherit the exec permission and consequently skip I-cache invalidation for the rest of the block. Ensure that exec permission is only inherited by write faults when the new mapping is of the same size as the existing one. A subsequent instruction abort will result in I-cache invalidation for the entire block mapping. Signed-off-by: Will Deacon <will@kernel.org> Signed-off-by: Marc Zyngier <maz@kernel.org> Tested-by: Quentin Perret <qperret@google.com> Reviewed-by: Quentin Perret <qperret@google.com> Cc: Marc Zyngier <maz@kernel.org> Cc: <stable@vger.kernel.org> Link: https://lore.kernel.org/r/20200723101714.15873-1-will@kernel.org
2020-07-28KVM: arm64: Prevent vcpu_has_ptrauth from generating OOL functionsMarc Zyngier
So far, vcpu_has_ptrauth() is implemented in terms of system_supports_*_auth() calls, which are declared "inline". In some specific conditions (clang and SCS), the "inline" very much turns into an "out of line", which leads to a fireworks when this predicate is evaluated on a non-VHE system (right at the beginning of __hyp_handle_ptrauth). Instead, make sure vcpu_has_ptrauth gets expanded inline by directly using the cpus_have_final_cap() helpers, which are __always_inline, generate much better code, and are the only thing that make sense when running at EL2 on a nVHE system. Fixes: 29eb5a3c57f7 ("KVM: arm64: Handle PtrAuth traps early") Reported-by: Nathan Chancellor <natechancellor@gmail.com> Reported-by: Nick Desaulniers <ndesaulniers@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Tested-by: Nathan Chancellor <natechancellor@gmail.com> Reviewed-by: Nathan Chancellor <natechancellor@gmail.com> Link: https://lore.kernel.org/r/20200722162231.3689767-1-maz@kernel.org
2020-07-28ARM: dts: berlin: Align L2 cache-controller nodename with dtschemaKrzysztof Kozlowski
Fix dtschema validator warnings like: l2-cache-controller@ac0000: $nodename:0: 'l2-cache-controller@ac0000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$' Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com> Link: https://lore.kernel.org/r/20200626080642.4244-1-krzk@kernel.org' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-28Bluetooth: hci_serdev: Only unregister device if it was registeredNicolas Boichat
We should not call hci_unregister_dev if the device was not successfully registered. Fixes: c34dc3bfa7642fd ("Bluetooth: hci_serdev: Introduce hci_uart_unregister_device()") Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
2020-07-28Bluetooth: Return NOTIFY_DONE for hci_suspend_notifierMax Chou
The original return is NOTIFY_STOP, but notifier_call_chain would stop the future call for register_pm_notifier even registered on other Kernel modules with the same priority which value is zero. Signed-off-by: Max Chou <max.chou@realtek.com> Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
2020-07-28Bluetooth: hci_h5: Set HCI_UART_RESET_ON_INIT to correct flagsNicolas Boichat
HCI_UART_RESET_ON_INIT belongs in hdev_flags, not flags. Fixes: ce945552fde4a09 ("Bluetooth: hci_h5: Add support for serdev enumerated devices") Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
2020-07-28Merge tag 'aspeed-5.9-devicetree' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed into arm/dt ASPEED device tree updates for 5.9 There is one new machine; AMD's EthanolX reference platform with an AST2600 BMC. Misc updates for Rainier, Tacoma, Wedge and Mihawk machines. * tag 'aspeed-5.9-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed: (26 commits) ARM: dts: Aspeed: tacoma: Enable EHCI controller ARM: dts: aspeed: rainier: Enable EHCI controller ARM: dts: aspeed: rainier: Switch OCCs to P10 ARM: dts: aspeed: rainier: Add FSI I2C masters ARM: dts: aspeed: rainier: Add CFAM SPI controllers ARM: dts: aspeed: rainier: Add I2C buses for NVMe use ARM: dts: aspeed: Initial device tree for AMD EthanolX ARM: dts: rainier: Describe GPIO mux on I2C3 ARM: dts: aspeed: wedge40: Enable pwm_tacho device ARM: dts: aspeed: wedge40: Enable ADC device ARM: dts: aspeed: wedge40: Disable unused i2c controllers ARM: dts: aspeed: cmm: Fixup I2C tree ARM: dts: aspeed: tacoma: Add CFAM reset GPIO ARM: dts: aspeed: rainier: Add CFAM reset GPIO ARM: dts: aspeed: tacoma: Fix gpio-key definitions ARM: dts: rainier: Configure ball Y23 as GPIOP7 for MCLR_VPP ARM: dts: aspeed: rainier: Add second cfam on the hub ARM: dts: aspeed: rainier: Add line-name checkstop ARM: dts: aspeed: tacoma: Remove checkstop gpio-key ARM: dts: aspeed: tacoma: Enable XDMA engine ... Link: https://lore.kernel.org/r/CACPK8Xf_Np7LtcDFhywi6Uk1EgUpb0pVVa+Lr9YEwBRjbjOKCQ@mail.gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-28Bluetooth: btusb: Fix and detect most of the Chinese Bluetooth controllersIsmael Ferreras Morezuelas
For some reason they tend to squat on the very first CSR/ Cambridge Silicon Radio VID/PID instead of paying fees. This is an extremely common problem; the issue goes as back as 2013 and these devices are only getting more popular, even rebranded by reputable vendors and sold by retailers everywhere. So, at this point in time there are hundreds of modern dongles reusing the ID of what originally was an early Bluetooth 1.1 controller. Linux is the only place where they don't work due to spotty checks in our detection code. It only covered a minimum subset. So what's the big idea? Take advantage of the fact that all CSR chips report the same internal version as both the LMP sub-version and HCI revision number. It always matches, couple that with the manufacturer code, that rarely lies, and we now have a good idea of who is who. Additionally, by compiling a list of user-reported HCI/lsusb dumps, and searching around for legit CSR dongles in similar product ranges we can find what CSR BlueCore firmware supported which Bluetooth versions. That way we can narrow down ranges of fakes for each of them. e.g. Real CSR dongles with LMP subversion 0x73 are old enough that support BT 1.1 only; so it's a dead giveaway when some third-party BT 4.0 dongle reuses it. So, to sum things up; there are multiple classes of fake controllers reusing the same 0A12:0001 VID/PID. This has been broken for a while. Known 'fake' bcdDevices: 0x0100, 0x0134, 0x1915, 0x2520, 0x7558, 0x8891 IC markings on 0x7558: FR3191AHAL 749H15143 (???) https://bugzilla.kernel.org/show_bug.cgi?id=60824 Fixes: 81cac64ba258ae (Deal with USB devices that are faking CSR vendor) Reported-by: Michał Wiśniewski <brylozketrzyn@gmail.com> Tested-by: Mike Johnson <yuyuyak@gmail.com> Tested-by: Ricardo Rodrigues <ekatonb@gmail.com> Tested-by: M.Hanny Sabbagh <mhsabbagh@outlook.com> Tested-by: Oussama BEN BRAHIM <b.brahim.oussama@gmail.com> Tested-by: Ismael Ferreras Morezuelas <swyterzone@gmail.com> Signed-off-by: Ismael Ferreras Morezuelas <swyterzone@gmail.com> Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
2020-07-27arm64: dts: qcom: Add Microsoft Lumia 950 (Talkman) device treeKonrad Dybcio
Add device tree support for the Microsoft Lumia 950 smartphone. It is based on msm8992 and supports booting Linux via a custom EDK2 port. Currently it supports: * Screen console via EFIFB * Booting via EFI_STUB * SDHCI * I2C * PSCI core bringup Please note that there is an implementation of EL2 startup on this board, but it requires the user to resign from PSCI and use spin-table instead. This revision sticks with PSCI. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200625182118.131476-14-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: Add Xiaomi Libra (Mi 4C) device treeKonrad Dybcio
This commit adds support for the Xiaomi Libra (Mi 4C) smartphone. It's based on the Qualcomm msm8992 SoC. It currently supports: * Screen console from bootloader * SDHCI * Regulator configuration * Serial console * I2C Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200625182118.131476-13-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: msm8992: Add RPMCC nodeKonrad Dybcio
This lets us use clocks provided by RPM. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200625182118.131476-12-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: msm8992: Add PSCI support.Konrad Dybcio
This SoC's firmware does not fully support the PSCI spec, but it's good enough to bring the cores up. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200625182118.131476-11-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: msm8992: Add PMU nodeKonrad Dybcio
Add the PMU so we can get proper perf event support on this SoC. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200625182118.131476-10-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: msm8992: Add BLSP2_UART2 and I2C nodesKonrad Dybcio
Add support for I2C to enable support for peripherals such as touchscreens or sensors. Also add BLSP_UART2 interface. Please note that the naming scheme follows downstream and as abominable as it is, that's what we get. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200625182118.131476-9-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: msm8992: Add SPMI PMIC arbiter deviceKonrad Dybcio
Add SPMI PMIC arbiter device to communicate with PMICs attached to SPMI bus. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200625182118.131476-8-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: msm8992: Add a SCM nodeKonrad Dybcio
Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200625182118.131476-7-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: msm8992: Add a proper CPU mapKonrad Dybcio
This commit adds cpu nodes for all 6 cores present on this SoC and the cpu-map. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200625182118.131476-6-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: bullhead: Move UART pinctrl to SoCKonrad Dybcio
This pinout is common for every 8992-based device and should therefore reside in the SoC device tree. Also convert addresses into phandles. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200625182118.131476-5-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: bullhead: Add qcom,msm-idKonrad Dybcio
Add the property required for the bootloader to select the correct device tree blob. It has been removed from the SoC device tree as it should be set on a per-device basis. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200625182118.131476-4-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: msm8992: Fix SDHCI1Konrad Dybcio
This commit ensures the correct IRQ type is set and disables the device by default. The mmc-hs400-1_8v property is also moved to Bullhead as it might not be present on all boards. The node has been renamed to sdhci@ instead of mmc@ and the phandle was changed to sdhc_1 to comply with the newer DTS style. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200625182118.131476-3-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: msm8992: Modernize the DTS styleKonrad Dybcio
Following changes have been made: - remove name, compatible and msm-id - wrap clocks in clocks{} - order nodes by name and by address - clock_gcc -> gcc - msmgpio -> tlmm - retire msm8992-pins.dtsi - add some of the missing pins - make comments C-style - make apcs a mailbox Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200625182118.131476-2-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: Add support for Sony Xperia Z5 (SoMC Sumire-RoW)Konrad Dybcio
Add device tree support for the Sony Xperia Z5 smartphone. It's based on Sony Kitakami platform (msm8994) and hence a Kitakami-common DTSI has been created so as to reduce clutter when remaining devices are added. The board currently supports * Serial * SDHCI * I2C * Regulator configuration * pstore log dump * GPIO keys Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200624150107.76234-9-konradybcio@gmail.com [bjorn: Changed vendor identifier in board compatible from somc to sony] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: Move msm8994-smd-rpm contents to lg-bullhead.Konrad Dybcio
This was the only device using that dtsi, so no point keeping it separate AND with a confusing name (bullhead is based on msm8992 and the file contains regulator values for that specific board). Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200624150107.76234-8-konradybcio@gmail.com [bjorn: Squashed with change that remove regulators from msm8992.dtsi] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: msm8994: Add support for SMD RPMKonrad Dybcio
Add support for SMD RPM, including pm8994 and pmi8994 regulators. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200624150107.76234-7-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: msm8992: Add a label to rpm-requestsKonrad Dybcio
This enables the node to be referenced directly from other DTs. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200624150107.76234-4-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: msm8994: Add SCM nodeKonrad Dybcio
Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200624150107.76234-3-konradybcio@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: sdm845-db845c: Add hdmi bridge nodesBjorn Andersson
Enable MDSS and DSI and add the LT9611 HDMI bridge. Also add the HDMI audio nodes. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Co-developed-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20200727075532.1932134-1-vkoul@kernel.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: add sm8250 GPU nodesJonathan Marek
This brings up the GPU. Tested on HDK865 by running vulkan CTS. Signed-off-by: Jonathan Marek <jonathan@marek.ca> Link: https://lore.kernel.org/r/20200709135251.643-15-jonathan@marek.ca Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: add sm8150 GPU nodesJonathan Marek
This brings up the GPU. Tested on HDK855 by running vulkan CTS. Signed-off-by: Jonathan Marek <jonathan@marek.ca> Link: https://lore.kernel.org/r/20200709135251.643-14-jonathan@marek.ca Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27dt-bindings: power: Add missing rpmpd rpmh regulator levelJonathan Marek
Add RPMH_REGULATOR_LEVEL_SVS_L0, used by sm8250. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Jonathan Marek <jonathan@marek.ca> Link: https://lore.kernel.org/r/20200709135251.643-13-jonathan@marek.ca Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: sc7180: Add opp-peak-kBps to GPU oppSharat Masetty
Add opp-peak-kBps bindings to the GPU opp table, listing the peak GPU -> DDR bandwidth requirement for each opp level. This will be used to scale the DDR bandwidth along with the GPU frequency dynamically. Signed-off-by: Sharat Masetty <smasetty@codeaurora.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Akhil P Oommen <akhilpo@codeaurora.org> Link: https://lore.kernel.org/r/1594992579-20662-7-git-send-email-akhilpo@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: sc7180: Add interconnects property for GPUSharat Masetty
This patch adds the interconnects property to the GPU node. This enables the GPU->DDR path bandwidth voting. Signed-off-by: Sharat Masetty <smasetty@codeaurora.org> Signed-off-by: Akhil P Oommen <akhilpo@codeaurora.org> Link: https://lore.kernel.org/r/1594992579-20662-6-git-send-email-akhilpo@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: SDM845: Enable GPU DDR bw scalingSharat Masetty
This patch adds the interconnects property for the gpu node and the opp-peak-kBps property to the opps of the gpu opp table. This should help enable DDR bandwidth scaling dynamically and proportionally to the GPU frequency. Signed-off-by: Sharat Masetty <smasetty@codeaurora.org> Signed-off-by: Akhil P Oommen <akhilpo@codeaurora.org> Link: https://lore.kernel.org/r/1594992579-20662-5-git-send-email-akhilpo@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-27arm64: dts: qcom: sc7180: Add support for context losing replicatorSai Prakash Ranjan
Add "qcom,replicator-loses-context" property to the replicator in Always-on domain in SC7180 SoC to enable coresight replicator driver to handle this variation of replicator designs. Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Link: https://lore.kernel.org/r/5072d94849cfaee46748d26ac997212fb2d783c2.1591708204.git.saiprakash.ranjan@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-28usb: chipidea: imx: get available runtime dr mode for wakeup settingPeter Chen
If runtime dr_mode is not dual-role, it doesn't need to enable ID wakeup interrupt. If runtime dr_mode is host, it doesn't need to enable VBUS wakeup interrupt. With these changes, the user will not get the unexpected wakeup for single role use case. For example, the host-only use case at Micro-AB port, the controller should not be waken up by only plug in Micro-AB cable or the Micro-B cable with host. Signed-off-by: Peter Chen <peter.chen@nxp.com>
2020-07-27soc: qcom: pdr: Reorder the PD state indication ackSibi Sankar
The Protection Domains (PD) have a mechanism to keep its resources enabled until the PD down indication is acked. Reorder the PD state indication ack so that clients get to release the relevant resources before the PD goes down. Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Rishabh Bhatnagar <rishabhb@codeaurora.org> Fixes: fbe639b44a82 ("soc: qcom: Introduce Protection Domain Restart helpers") Reported-by: Rishabh Bhatnagar <rishabhb@codeaurora.org> Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Link: https://lore.kernel.org/r/20200701195954.9007-1-sibis@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-28usb: chipidea: add query_available_role interfacePeter Chen
The glue layer may need to know current available role to do some setting, eg, the wakeup setting. So we add ci_hdrc_query_available_role for that. Signed-off-by: Peter Chen <peter.chen@nxp.com>
generated by cgit (git 2.34.1) at 2025-09-22 04:42:35 +0000