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2019-08-20perf evsel: Add comment for 'idx' member in 'struct perf_sample_idAdrian Hunter
The 'idx' member was added as preparation for AUX area sampling. Add a comment to describe why. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Michael Petlan <mpetlan@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lkml.kernel.org/r/83ff264f-84c3-5372-8976-dd9293d20c6f@intel.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2019-08-20tools arch x86: Sync asm/cpufeatures.h with the with the kernelArnaldo Carvalho de Melo
To pick up the changes in: f36cf386e3fe ("x86/speculation/swapgs: Exclude ATOMs from speculation through SWAPGS") 18ec54fdd6d1 ("x86/speculation: Prepare entry code for Spectre v1 swapgs mitigations") That don't affect anything in tools/. This silences this perf build warning: Warning: Kernel ABI header at 'tools/arch/x86/include/asm/cpufeatures.h' differs from latest version at 'arch/x86/include/asm/cpufeatures.h' diff -u tools/arch/x86/include/asm/cpufeatures.h arch/x86/include/asm/cpufeatures.h Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: Josh Poimboeuf <jpoimboe@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Thomas Gleixner <tglx@linutronix.de> Link: https://lkml.kernel.org/n/tip-860dq1qie2cpnfghlpcnxrzr@git.kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2019-08-20tools headers: Synchronize linux/bits.h with the kernel sourcesArnaldo Carvalho de Melo
To pick up the changes in this cset: 95b980d62d52 ("linux/bits.h: make BIT(), GENMASK(), and friends available in assembly") To address this tools/perf build warning: Warning: Kernel ABI header at 'tools/include/linux/bits.h' differs from latest version at 'include/linux/bits.h' diff -u tools/include/linux/bits.h include/linux/bits.h Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Namhyung Kim <namhyung@kernel.org> Link: https://lkml.kernel.org/n/tip-1if3iga5r3di6oyddgxsr225@git.kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2019-08-20tools headers: Grab copy of linux/const.h, needed by linux/bits.hArnaldo Carvalho de Melo
So that can update the copy of linux/bits.h that now uses macros defined in const.h and that are not available in older systems. Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: Namhyung Kim <namhyung@kernel.org> Link: https://lkml.kernel.org/n/tip-c2qfcbl58hxyfb5u5xivp7is@git.kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2019-08-20perf tools: tools/include should come before tools/uapi/includeArnaldo Carvalho de Melo
The next cset will grap const.h copies from the kernel to keep bits.h in sync as it started to use linux/const.h, that in turn includes uapi/linux/const.h. So now we have a file with the same name in tools/include and tools/uapi/include, and one includes the other, we need to have tools/include/uapi/ after tools/include/ for this to work, fix it. Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: Namhyung Kim <namhyung@kernel.org> Link: https://lkml.kernel.org/n/tip-qzjqxa1wdrt51kwadyqawnuj@git.kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2019-08-20tools headers: Add limits.h to access __WORDSIZEArnaldo Carvalho de Melo
We need to make sure limits.h is included before checking if we can use __WORDSIZE, do it. Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: Namhyung Kim <namhyung@kernel.org> Link: https://lkml.kernel.org/n/tip-5yfoed4rnsck2n3cwhm9mvth@git.kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2019-08-20xdp: unpin xdp umem pages in error pathIvan Khoronzhuk
Fix mem leak caused by missed unpin routine for umem pages. Fixes: 8aef7340ae9695 ("xsk: introduce xdp_umem_page") Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@linaro.org> Acked-by: Jonathan Lemon <jonathan.lemon@gmail.com> Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
2019-08-20iwlwifi: pcie: fix recognition of QuZ devicesLuca Coelho
If the HW revision of Qu devices we found is QuZ, then we need to switch the configuration accordingly in order to use the correct FW. Add a block of ifs in order do that. Signed-off-by: Luca Coelho <luciano.coelho@intel.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2019-08-20iwlwifi: pcie: don't switch FW to qnj when ax201 is detectedLuca Coelho
We have a too generic condition that switches from Qu configurations to QnJ configurations. We need to exclude some configurations so that they are not erroneously switched. Add the ax201 configuration to the list of exclusions. Signed-off-by: Luca Coelho <luciano.coelho@intel.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2019-08-20iwlwifi: pcie: fix the byte count table format for 22560 devicesEmmanuel Grumbach
Starting from 22560, the byte count is expected to be in bytes and we have now 14 bits. Ajust the code to this. Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2019-08-20iwlwifi: mvm: Allow multicast data frames only when associatedIlan Peer
The MAC context configuration always allowed multicast data frames to pass to the driver for all MAC context types, and in the case of station MAC context both when associated and when not associated. One of the outcomes of this configuration is having the FW forward encrypted multicast frames to the driver with Rx status indicating that the frame was not decrypted (as expected, since no keys were configured yet) which in turn results with unnecessary error messages. Change this behavior to allow multicast data frames only when they are actually expected, e.g., station MAC context is associated etc. Signed-off-by: Ilan Peer <ilan.peer@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2019-08-20rt2x00: clear IV's on start to fix AP mode regressionStanislaw Gruszka
To do not brake HW restart we should keep initialization vectors data. I assumed that on start the data is already initialized to zeros, but that not true on some scenarios and we should clear it. So add additional flag to check if we are under HW restart and clear IV's data if we are not. Patch fixes AP mode regression. Reported-and-tested-by: Emil Karlson <jekarl@iki.fi> Fixes: 710e6cc1595e ("rt2800: do not nullify initialization vector data") Signed-off-by: Stanislaw Gruszka <sgruszka@redhat.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2019-08-20mt76: mt76x0u: do not reset radio on resumeStanislaw Gruszka
On some machines mt76x0u firmware can hung during resume, what result on messages like below: [ 475.480062] mt76x0 1-8:1.0: Error: MCU response pre-completed! [ 475.990066] mt76x0 1-8:1.0: Error: send MCU cmd failed:-110 [ 475.990075] mt76x0 1-8:1.0: Error: MCU response pre-completed! [ 476.500003] mt76x0 1-8:1.0: Error: send MCU cmd failed:-110 [ 476.500012] mt76x0 1-8:1.0: Error: MCU response pre-completed! [ 477.010046] mt76x0 1-8:1.0: Error: send MCU cmd failed:-110 [ 477.010055] mt76x0 1-8:1.0: Error: MCU response pre-completed! [ 477.529997] mt76x0 1-8:1.0: Error: send MCU cmd failed:-110 [ 477.530006] mt76x0 1-8:1.0: Error: MCU response pre-completed! [ 477.824907] mt76x0 1-8:1.0: Error: send MCU cmd failed:-71 [ 477.824916] mt76x0 1-8:1.0: Error: MCU response pre-completed! [ 477.825029] usb 1-8: USB disconnect, device number 6 and possible whole system freeze. This can be avoided, if we do not perform mt76x0_chip_onoff() reset. Cc: stable@vger.kernel.org Fixes: 134b2d0d1fcf ("mt76x0: init files") Signed-off-by: Stanislaw Gruszka <sgruszka@redhat.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2019-08-20spi: spi-fsl-dspi: Move dspi_interrupt above dspi_transfer_one_messageVladimir Oltean
The two functions are loosely coupled through dspi->waitq, but logically, dspi_transfer_one_message depends on dspi_interrupt in order to complete. Move its definition above it so the I/O functions are grouped closer together. Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Link: https://lore.kernel.org/r/20190818180115.31114-13-olteanv@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-08-20spi: spi-fsl-dspi: Fix typosVladimir Oltean
mask of -> mask off at and -> and Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Link: https://lore.kernel.org/r/20190818180115.31114-12-olteanv@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-08-20spi: spi-fsl-dspi: Use reverse Christmas tree declaration orderVladimir Oltean
This patch puts variable declaration in the reverse order of their length for cosmetic purposes. Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Link: https://lore.kernel.org/r/20190818180115.31114-11-olteanv@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-08-20spi: spi-fsl-dspi: Replace legacy spi_master names with spi_controllerVladimir Oltean
This adapts the spi-fsl-dspi driver to the API changes introduced in commit 8caab75fd2c2 ("spi: Generalize SPI "master" to "controller""). Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Link: https://lore.kernel.org/r/20190818180115.31114-10-olteanv@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-08-20spi: spi-fsl-dspi: Remove pointless assignment of master->transfer to NULLVladimir Oltean
Introduced in commit 9298bc727385 ("spi: spi-fsl-dspi: Remove spi-bitbang") for less than obvious reasons, this assignment is confusing and serves no purpose. Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Link: https://lore.kernel.org/r/20190818180115.31114-9-olteanv@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-08-20spi: spi-fsl-dspi: Remove unused initialization of 'ret' in dspi_probeVladimir Oltean
There is no code path for reaching 'return ret;' without it first being assigned to an error code. Therefore the initialization with 0 is pointless. Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Link: https://lore.kernel.org/r/20190818180115.31114-8-olteanv@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-08-20spi: spi-fsl-dspi: Reduce indentation in dspi_release_dma()Vladimir Oltean
There is no point in surrounding an entire function block in an if condition. Rather, exit early if the condition is false. Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Link: https://lore.kernel.org/r/20190818180115.31114-7-olteanv@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-08-20spi: spi-fsl-dspi: Change usage pattern of SPI_MCR_* and SPI_CTAR_* macrosVladimir Oltean
These are macros that accept 0 or 1 as argument (a boolean value). Their use encourages the abuse of complex ternary operations inside their argument list, which detracts from the code readability. Replace these with simple if-else statements. Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Link: https://lore.kernel.org/r/20190818180115.31114-6-olteanv@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-08-20spi: spi-fsl-dspi: Demistify magic value in SPI_SR_CLEARVladimir Oltean
This patch adds the field definitions for the SPI_SR register. The SPI status register is write-1-to-clear and this value is written at init time. Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Link: https://lore.kernel.org/r/20190818180115.31114-5-olteanv@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-08-20spi: spi-fsl-dspi: Use BIT() and GENMASK() macrosVladimir Oltean
Switch to using more idiomatic register field definitions, which makes it easier to look them up in the datasheet. Cosmetic patch. Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Link: https://lore.kernel.org/r/20190818180115.31114-4-olteanv@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-08-20spi: spi-fsl-dspi: Remove unused defines and includesVladimir Oltean
This is a cosmetic patch. Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Link: https://lore.kernel.org/r/20190818180115.31114-3-olteanv@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-08-20spi: spi-fsl-dspi: Fix code alignmentVladimir Oltean
This is a cosmetic patch that changes nothing except makes sure the code is aligned to the same column, which makes it easier to the eye. Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Link: https://lore.kernel.org/r/20190818180115.31114-2-olteanv@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-08-20spi: Fix the number of CS lines documented as an exampleManivannan Sadhasivam
The number of CS lines is mentioned as 2 in the spi-controller binding but however in the example, 4 cs-gpios are used. Hence fix that to mention 4. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20190820115000.32041-1-manivannan.sadhasivam@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2019-08-20spi: zynq-qspi: Fix missing spi_unregister_controller when unload moduleAxel Lin
Use devm_spi_register_controller to fix missing spi_unregister_controller when unload module. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/20190818095113.2397-1-axel.lin@ingics.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-08-20iommu/arm-smmu: Ensure 64-bit I/O accessors are available on 32-bit CPURobin Murphy
As part of the grand SMMU driver refactoring effort, the I/O register accessors were moved into 'arm-smmu.h' in commit 6d7dff62afb0 ("iommu/arm-smmu: Move Secure access quirk to implementation"). On 32-bit architectures (such as ARM), the 64-bit accessors are defined in 'linux/io-64-nonatomic-hi-lo.h', so include this header to fix the build. Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Will Deacon <will@kernel.org>
2019-08-20dmaengine: ti: omap-dma: Add cleanup in omap_dma_probe()Wenwen Wang
If devm_request_irq() fails to disable all interrupts, no cleanup is performed before retuning the error. To fix this issue, invoke omap_dma_free() to do the cleanup. Signed-off-by: Wenwen Wang <wenwen@cs.uga.edu> Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Link: https://lore.kernel.org/r/1565938570-7528-1-git-send-email-wenwen@cs.uga.edu Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-08-20dmaengine: ti: dma-crossbar: Fix a memory leak bugWenwen Wang
In ti_dra7_xbar_probe(), 'rsv_events' is allocated through kcalloc(). Then of_property_read_u32_array() is invoked to search for the property. However, if this process fails, 'rsv_events' is not deallocated, leading to a memory leak bug. To fix this issue, free 'rsv_events' before returning the error. Signed-off-by: Wenwen Wang <wenwen@cs.uga.edu> Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Link: https://lore.kernel.org/r/1565938136-7249-1-git-send-email-wenwen@cs.uga.edu Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-08-20iommu/arm-smmu: Make private implementation details staticWill Deacon
Many of the device-specific implementation details in 'arm-smmu-impl.c' are exposed to other compilation units. Whilst we may require this in the future, let's make it all 'static' for now so that we can expose things on a case-by-case basic. Signed-off-by: Will Deacon <will@kernel.org>
2019-08-20dt-bindings: clock: meson: add resets to the audio clock controllerJerome Brunet
Add the documentation and bindings for the resets provided by the g12a audio clock controller Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2019-08-20auxdisplay: ht16k33: Make ht16k33_fb_fix and ht16k33_fb_var constantNishka Dasgupta
The static structures ht16k33_fb_fix and ht16k33_fb_var, of types fb_fix_screeninfo and fb_var_screeninfo respectively, are not used except to be copied into other variables. Hence make both of them constant to prevent unintended modification. Issue found with Coccinelle. Acked-by: Robin van der Gracht <robin@protonic.nl> Signed-off-by: Nishka Dasgupta <nishkadg.linux@gmail.com> Signed-off-by: Miguel Ojeda <miguel.ojeda.sandonis@gmail.com>
2019-08-20irqchip: Remove dev_err() usage after platform_get_irq()Stephen Boyd
We don't need dev_err() messages when platform_get_irq() fails now that platform_get_irq() prints an error message itself when something goes wrong. Let's remove these prints with a simple semantic patch. // <smpl> @@ expression ret; struct platform_device *E; @@ ret = ( platform_get_irq(E, ...) | platform_get_irq_byname(E, ...) ); if ( \( ret < 0 \| ret <= 0 \) ) { ( -if (ret != -EPROBE_DEFER) -{ ... -dev_err(...); -... } | ... -dev_err(...); ) ... } // </smpl> While we're here, remove braces on if statements that only have one statement (manually). Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Marc Zyngier <maz@kernel.org>
2019-08-20irqchip: Add include guard to irq-partition-percpu.hMasahiro Yamada
Add a header include guard just in case. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Marc Zyngier <maz@kernel.org>
2019-08-20irqchip/mmp: Do not call irq_set_default_host() on DT platformsLubomir Rintel
Using a default domain on DT platforms is unnecessary, as the firmware tables describe the full topology, and nothing is implicit. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> [maz: wrote an actual changelog] Signed-off-by: Marc Zyngier <maz@kernel.org>
2019-08-20irqchip/gic-v3-its: Remove the redundant set_bit for lpi_mapZenghui Yu
We try to find a free LPI region in device's lpi_map and allocate them (set them to 1) when we want to allocate LPIs for this device. This is what bitmap_find_free_region() has done for us. The following set_bit is redundant and a bit confusing (since we only set_bit against the first allocated LPI idx). Remove it, and make the set_bit explicit by comment. Signed-off-by: Zenghui Yu <yuzenghui@huawei.com> Signed-off-by: Marc Zyngier <maz@kernel.org>
2019-08-20irqchip/gic-v3: Add quirks for HIP06/07 invalid GICD_TYPER erratum 161010803Marc Zyngier
It looks like the HIP06/07 SoCs have extra bits in their GICD_TYPER registers, which confuse the GICv3.1 code (these systems appear to expose ESPIs while they actually don't). Detect these systems as early as possible and wipe the fields that should be RES0 in the register. Tested-by: John Garry <john.garry@huawei.com> Signed-off-by: Marc Zyngier <maz@kernel.org>
2019-08-20irqchip/gic: Skip DT quirks when evaluating IIDR-based quirksMarc Zyngier
When evaluating potential quirks matched by reads of the IIDR register, skip the quirk entries that use a "compatible" property attached to them, as these are DT based. Signed-off-by: Marc Zyngier <maz@kernel.org>
2019-08-20irqchip/gic-v3: Warn about inconsistent implementations of extended rangesMarc Zyngier
As is it usual for the GIC, it isn't disallowed to put together a system that is majorly inconsistent, with a distributor supporting the extended ranges while some of the CPUs don't. Kindly tell the user that things are sailing isn't going to be smooth. Signed-off-by: Marc Zyngier <maz@kernel.org>
2019-08-20irqchip/gic-v3: Add EPPI range supportMarc Zyngier
Expand the pre-existing PPI support to be able to deal with the Extended PPI range (EPPI). This includes obtaining the number of PPIs from each individual redistributor, and compute the minimum set (just in case someone builds something really clever...). Signed-off-by: Marc Zyngier <maz@kernel.org>
2019-08-20dt-bindings: interrupt-controller: arm,gic-v3: Describe EPPI range supportMarc Zyngier
Update the GICv3 binding to allow interrupts in the EPPI range. Signed-off-by: Marc Zyngier <maz@kernel.org>
2019-08-20irqchip/gic-v3: Dynamically allocate PPI partition descriptorsMarc Zyngier
Again, PPIs are becoming a variable set. Let's hack the PPI partition code to make the top-level array dynamically allocated. Signed-off-by: Marc Zyngier <maz@kernel.org>
2019-08-20irqchip/gic-v3: Dynamically allocate PPI NMI refcountsMarc Zyngier
As we're about to have a variable number of PPIs, let's make the allocation of the NMI refcounts dynamic. Also apply some minor cleanups (moving things around). Signed-off-by: Marc Zyngier <maz@kernel.org>
2019-08-20irqchip/gic: Prepare for more than 16 PPIsMarc Zyngier
GICv3.1 allows up to 80 PPIs (16 legaci PPIs and 64 Extended PPIs), meaning we can't just leave the old 16 hardcoded everywhere. We also need to add the infrastructure to discover the number of PPIs on a per redistributor basis, although we still pretend there is only 16 of them for now. No functional change. Signed-off-by: Marc Zyngier <maz@kernel.org>
2019-08-20irqchip/gic-v3: Add ESPI range supportMarc Zyngier
Add the required support for the ESPI range, which behave exactly like the SPIs of old, only with new funky INTIDs. Signed-off-by: Marc Zyngier <maz@kernel.org>
2019-08-20Revert "init/Kconfig: Fix infinite Kconfig recursion on PPC"Will Deacon
This reverts commit 71c67a31f09fa8fdd1495dffd96a5f0d4cef2ede. Commit 117acf5c29dd ("powerpc/Makefile: Always pass --synthetic to nm if supported") removed the only conditional definition of $(NM), so we can revert our temporary bodge to avoid Kconfig recursion and go back to passing $(NM) through to the 'tools-support-relr.sh' when detecting support for RELR relocations. Signed-off-by: Will Deacon <will@kernel.org>
2019-08-20Merge branch 'for-joerg/batched-unmap' of ↵Joerg Roedel
git://git.kernel.org/pub/scm/linux/kernel/git/will/linux into core
2019-08-20dt-bindings: interrupt-controller: arm,gic-v3: Describe ESPI range supportMarc Zyngier
GICv3.1 introduces support for new interrupt ranges, one of them being the Extended SPI range (ESPI). The DT binding is extended to deal with it as a new interrupt class. Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Marc Zyngier <maz@kernel.org>
2019-08-20irqchip/gic-v3: Add INTID range and convertion primitivesMarc Zyngier
In the beginning, life was simple. The GIC driver mostly cared about PPIs, SPIs and LPIs, all with nicely layed out ranges. We're about to change all that, with new ranges such as EPPI and ESPI interleaved in the middle of the no-irq-land between the "special IDs" and the LPI range. Boo. In order to make our life less hellish, let's introduce a set of primitives that will allow ranges to be identified easily and offsets to be remapped. So far, there is no functionnal change. Signed-off-by: Marc Zyngier <maz@kernel.org>
generated by cgit (git 2.34.1) at 2025-09-20 15:20:19 +0000