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2024-12-13dt-bindings: soc: renesas: Document RZ/G3E SMARC SoM and Carrier-II EVKBiju Das
Document the Renesas RZ/G3E SMARC Carrier-II EVK board which is based on the Renesas RZ/G3E SMARC SoM. The RZ/G3E SMARC Carrier-II EVK consists of an RZ/G3E SoM module and a SMARC Carrier-II carrier board. The SoM module sits on top of the carrier board. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20241203105005.103927-4-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-12-13dt-bindings: soc: renesas: Document Renesas RZ/G3E SoC variantsBiju Das
Document Renesas RZ/G3E (R9A09G047) SoC variants. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20241203105005.103927-3-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-12-12riscv: dts: thead: Add mailbox nodeMichal Wilczynski
Add mailbox device tree node. This work is based on the vendor kernel [1]. Link: https://github.com/revyos/thead-kernel.git [1] Signed-off-by: Michal Wilczynski <m.wilczynski@samsung.com> Reviewed-by: Drew Fustini <dfustini@tenstorrent.com> Signed-off-by: Drew Fustini <dfustini@tenstorrent.com>
2024-12-11arm64: dts: renesas: gray-hawk-single: Add video capture supportNiklas Söderlund
The Gray-Hawk single board contains two MAX96724 connected to the using I2C and CSI-2, record the connections. Also enable all nodes (VIN, CSI-2 and ISP) that are part of the downstream video capture pipeline. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20241209125504.2010984-1-niklas.soderlund+renesas@ragnatech.se Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-12-11arm64: dts: renesas: gray-hawk-single: Add DisplayPort supportTomi Valkeinen
Add support for the mini DP output on the Gray Hawk board. Signed-off-by: Tomi Valkeinen <tomi.valkeinen+renesas@ideasonboard.com> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20241206-rcar-gh-dsi-v3-10-d74c2166fa15@ideasonboard.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-12-11arm64: dts: renesas: r8a779h0: Add display supportTomi Valkeinen
Add the device nodes for supporting DU and DSI. Signed-off-by: Tomi Valkeinen <tomi.valkeinen+renesas@ideasonboard.com> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20241206-rcar-gh-dsi-v3-9-d74c2166fa15@ideasonboard.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-12-11arm64: dts: renesas: gray-hawk-single: Fix indentationTomi Valkeinen
Fix the indent on the two regulators. Signed-off-by: Tomi Valkeinen <tomi.valkeinen+renesas@ideasonboard.com> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20241206-rcar-gh-dsi-v3-8-d74c2166fa15@ideasonboard.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-12-11ARM: dts: renesas: r7s72100: Add DMA support to RSPIGeert Uytterhoeven
Add DMA properties to the device nodes for Renesas Serial Peripheral Interfaces. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/dfafc16b840630f20e75292d419479294558e173.1732098491.git.geert+renesas@glider.be
2024-12-11arm64: dts: exynosautov920: add watchdog DT nodeByoungtae Cho
Adds two watchdog devices for ExynosAutoV920 SoC. Signed-off-by: Byoungtae Cho <bt.cho@samsung.com> Signed-off-by: Taewan Kim <trunixs.kim@samsung.com> Link: https://lore.kernel.org/r/20241206025139.2148833-2-trunixs.kim@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-12-10arm64: dts: renesas: white-hawk-single: Add R-Car Sound supportGeert Uytterhoeven
White Hawk Single boards can use the same ARD-AUDIO-DA7212 external audio board as the White Hawk board stack. Add support for building DTBs for them, and document the small differences in connector labels. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/7c840b6e08e0af8a6b9bd5516969eb585f16e10a.1733402907.git.geert+renesas@glider.be
2024-12-10arm64: dts: renesas: white-hawk-ard-audio: Drop SoC partGeert Uytterhoeven
The White Hawk with ARD-AUDIO-DA7212 external audio board stack is not specific to R8A779G0. Hence rename its DTS file name to drop the "r8a779g0-" prefix. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/0a72c67991828784066f76b61605d2f7913a353c.1733402907.git.geert+renesas@glider.be
2024-12-10arm64: dts: renesas: r8a779g3: Add White Hawk Single supportGeert Uytterhoeven
The White Hawk Single board with R-Car V4H ES3.0 (R8A779G3) uses an updated version of the R-Car V4H (R8A779G0) SoC. For now, there are no visible differences compared to the variant equipped with an R-Car V4H ES2.0 (R8A779G2) SoC. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/66d0fe78c393e6df2775287c730464e91732ec56.1733156661.git.geert+renesas@glider.be
2024-12-10arm64: dts: renesas: Add R8A779G3 SoC supportGeert Uytterhoeven
Add support for the Renesas R-Car V4H ES3.0 (R8A779G3) SoC, which is an updated version of the R-Car V4H (R8A779G0) SoC. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/978c41f932aa2dccd46ad91fc1ddfabacd1c254c.1733156661.git.geert+renesas@glider.be
2024-12-10arm64: dts: renesas: Factor out White Hawk Single board supportGeert Uytterhoeven
Move the common parts for the Renesas White Hawk Single board to white-hawk-single.dtsi, to enable future reuse. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/1661743b18a9ff9fac716f98a663b39fc8488d7e.1733156661.git.geert+renesas@glider.be
2024-12-10dt-bindings: soc: renesas: Document R8A779G3 White Hawk SingleGeert Uytterhoeven
Document the compatible value for the Renesas R-Car V4H ES3.0 (R8A779G3) SoC, as used on the Renesas White Hawk Single board. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/1d2d2a6cbf31c817f574f6eed310a960e6175afe.1733156661.git.geert+renesas@glider.be
2024-12-10dt-bindings: soc: renesas: Move R8A779G0 White Hawk upGeert Uytterhoeven
Move the R8A779G0-only White Hawk board stack section up, just below the R8A779G0-only White Hawk CPU section, to improve sort order. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/d553ef4b1f969f72e384f274d42ac7a62fe45fd4.1733156661.git.geert+renesas@glider.be
2024-12-10arm64: dts: renesas: rzg3s-smarc: Enable I2C1 and connected power monitorWolfram Sang
Enable I2C1 for the carrier board and the connected power monitor ISL28022. Limit the bus speed to the maximum the power monitor supports. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Tested-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Link: https://lore.kernel.org/20241120085345.24638-2-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-12-10arm64: dts: renesas: rzg3s-smarc: Fix the debug serial aliasClaudiu Beznea
The debug serial of the RZ/G3S is SCIF0 which is routed on the Renesas RZ SMARC Carrier II board on the SER3_UART. Use serial3 alias for it for better hardware description. Along with it, the chosen properties were moved to the device tree corresponding to the RZ SMARC Carrier II board. Fixes: adb4f0c5699c ("arm64: dts: renesas: Add initial support for RZ/G3S SMARC SoM") Fixes: d1ae4200bb26 ("arm64: dts: renesas: Add initial device tree for RZ SMARC Carrier-II Board") Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20241115134401.3893008-6-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-12-10arm64: dts: renesas: r9a08g045: Add the remaining SCIF interfacesClaudiu Beznea
The Renesas RZ/G3S SoC has 6 SCIF interfaces. SCIF0 is used as debug console. Add the remaining ones. Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20241115134401.3893008-5-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-12-10ARM: dts: stm32: lxa-tac: Add support for generation 3 devicesLeonard Göhrs
Add support for the lxa-tac generation 3 board based on the STM32MP153c. Signed-off-by: Leonard Göhrs <l.goehrs@pengutronix.de> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2024-12-10ARM: dts: stm32: lxa-tac: move adc and gpio{e,g} to gen{1,2} boardsLeonard Göhrs
This is a preparation patch in order to add lxa-tac generation 3 board. As the gen3 board has a different adc and gpio{e,g} setups, move these from the stm32mp15xc-lxa-tac.dtsi to the gen{1,2}.dts files. Signed-off-by: Leonard Göhrs <l.goehrs@pengutronix.de> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2024-12-10dt-bindings: arm: stm32: add compatible strings for Linux Automation LXA TAC ↵Leonard Göhrs
gen 3 The Linux Automation LXA TAC generation 3 is built around an OSD32MP153x SiP with CPU, RAM, PMIC, Oscillator and EEPROM. LXA TACs are a development tool for embedded devices with a focus on embedded Linux devices. Add compatible for the generation 3 based on the STM32MP153c. Signed-off-by: Leonard Göhrs <l.goehrs@pengutronix.de> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2024-12-10ARM: dts: stm32: lxa-tac: adjust USB gadget fifo sizes for multi functionLeonard Göhrs
Allow providing the Ethernet and mass storage functions on the USB peripheral port at the same time. Signed-off-by: Leonard Göhrs <l.goehrs@pengutronix.de> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2024-12-10ARM: dts: stm32: lxa-tac: extend the alias tableLeonard Göhrs
Some of the userspace software and tests depend on the can/i2c/spi devices having the same name on every boot. This may not always be the case based on e.g. parallel probe order. Assign static device numbers to all can/i2c/spi devices. Signed-off-by: Leonard Göhrs <l.goehrs@pengutronix.de> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2024-12-10ARM: dts: stm32: lxa-tac: disable the real time clockLeonard Göhrs
The RTC was enabled under the false assumption that the SoM already contains a suitable 32.768 kHz crystal. It does however not contain such a crystal and since none is fitted externally to the SoM the RTC can not be used on the hardware. Reflect that in the devicetree. Signed-off-by: Leonard Göhrs <l.goehrs@pengutronix.de> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2024-12-10ARM: dts: stm32: Fix IPCC EXTI declaration on stm32mp151Arnaud Pouliquen
The GIC IRQ type used for IPCC RX should be IRQ_TYPE_LEVEL_HIGH. Replacing the interrupt with the EXTI event changes the type to the numeric value 1, meaning IRQ_TYPE_EDGE_RISING. The issue is that EXTI event 61 is a direct event.The IRQ type of direct events is not used by EXTI and is propagated to the parent IRQ controller of EXTI, the GIC. Align the IRQ type to the value expected by the GIC by replacing the second parameter "1" with IRQ_TYPE_LEVEL_HIGH. Fixes: 7d9802bb0e34 ("ARM: dts: stm32: remove the IPCC "wakeup" IRQ on stm32mp151") Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2024-12-09arm64: dts: exynos: Add initial support for Samsung Galaxy S20 (x1slte)Umer Uddin
Add initial support for the Samsung Galaxy S20 (x1slte/SM-G980F) phone. It was launched in 2020, and it's based on the Exynos 990 SoC. It has only one configuration with 8GB of RAM and 128GB of UFS 3.0 storage. This device tree adds support for the following: - SimpleFB - 8GB RAM - Buttons Signed-off-by: Umer Uddin <umer.uddin@mentallysanemainliners.org> Link: https://lore.kernel.org/r/20241209080059.11891-5-umer.uddin@mentallysanemainliners.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-12-09arm64: dts: exynos: Add initial support for Samsung Galaxy S20 5G (x1s)Umer Uddin
Add initial support for the Samsung Galaxy S20 5G (x1s/SM-G981B) phone. It was launched in 2020, and it's based on the Exynos 990 SoC. It has only one configuration with 12GB of RAM and 128GB of UFS 3.0 storage. This device tree adds support for the following: - SimpleFB - 12GB RAM - Buttons Signed-off-by: Umer Uddin <umer.uddin@mentallysanemainliners.org> Link: https://lore.kernel.org/r/20241209080059.11891-4-umer.uddin@mentallysanemainliners.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-12-09arm64: dts: exynos: Add initial support for Samsung Galaxy S20 Series boards ↵Umer Uddin
(x1s-common) Add initial support for the Samsung Galaxy S20 Series (x1s-common) phones. They were launched in 2020, and are based on the Exynos 990 SoC. The devices have multiple RAM configurations, starting from 8GB going all the way up to 16GB for the S20 Ultra devices. This device tree adds support for the following: - SimpleFB - 8GB RAM (Any more will be mapped in device trees) - Buttons Signed-off-by: Umer Uddin <umer.uddin@mentallysanemainliners.org> Link: https://lore.kernel.org/r/20241209080059.11891-3-umer.uddin@mentallysanemainliners.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-12-09dt-bindings: arm: samsung: samsung-boards: Add bindings for SM-G981B and ↵Umer Uddin
SM-G980F board Add devicetree bindings for Samsung Galaxy S20 5G and Samsung Galaxy S20 board. Signed-off-by: Umer Uddin <umer.uddin@mentallysanemainliners.org> Link: https://lore.kernel.org/r/20241209080059.11891-2-umer.uddin@mentallysanemainliners.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-12-09arm64: dts: exynos: gs101: allow stable USB phy Vbus detectionAndré Draszik
For the DWC3 core to reliably detect the connected phy's Vbus state, we need to disable phy suspend. Add snps,dis_u2_susphy_quirk snps,dis_u3_susphy_quirk to do that. While at it, also add snps,has-lpm-erratum as this is set downstream which implies that the core was configured with LPM Erratum. We should do the same here. Signed-off-by: André Draszik <andre.draszik@linaro.org> Reviewed-by: Peter Griffin <peter.griffin@linaro.org> Tested-by: Peter Griffin <peter.griffin@linaro.org> Link: https://lore.kernel.org/r/20241203-gs101-phy-lanes-orientation-dts-v2-3-1412783a6b01@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-12-09arm64: dts: exynos: gs101: phy region for exynos5-usbdrd is largerAndré Draszik
Turns out there are some additional registers in the phy region, update the DT accordingly. Signed-off-by: André Draszik <andre.draszik@linaro.org> Reviewed-by: Peter Griffin <peter.griffin@linaro.org> Tested-by: Peter Griffin <peter.griffin@linaro.org> Link: https://lore.kernel.org/r/20241203-gs101-phy-lanes-orientation-dts-v2-2-1412783a6b01@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-12-09ARM: dts: stm32: Sort M24256E write-lockable page in DH STM32MP13xx DHCOR SoM DTMarek Vasut
Move the M24256E write-lockable page subnode after RTC subnode in DH STM32MP13xx DHCOR SoM DT to keep the list of nodes sorted by I2C address. No functional change. Fixes: 3f2e7d167307 ("ARM: dts: stm32: Describe M24256E write-lockable page in DH STM32MP13xx DHCOR SoM DT") Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2024-12-09ARM: dts: stm32: Increase CPU core voltage on STM32MP13xx DHCOR SoMMarek Vasut
The STM32MP13xx DHCOR DHSBC is populated with STM32MP13xx part capable of 1 GHz operation, increase the CPU core voltage to 1.35 V to make sure the SoC is stable even if the blobs unconditionally force the CPU to 1 GHz operation. It is not possible to make use of CPUfreq on the STM32MP13xx because the SCMI protocol 0x13 is not implemented by upstream OpTee-OS which is the SCMI provider. Fixes: 6331bddce649 ("ARM: dts: stm32: Add support for STM32MP13xx DHCOR SoM and DHSBC board") Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2024-12-09ARM: dts: stm32: Deduplicate serial aliases and chosen node for STM32MP15xx ↵Marek Vasut
DHCOM SoM Deduplicate /aliases { serialN = ... } and /chosen node into stm32mp15xx-dhcom-som.dtsi , since the content is identical on all carrier boards using the STM32MP15xx DHCOM SoM. No functional change. Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Christoph Niedermaier <cniedermaier@dh-electronics.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2024-12-09arm64: dts: st: Enable COMBOPHY on the stm32mp257f-ev1 boardChristian Bruel
Enable the COMBOPHY with external pad clock on stm32mp257f-ev1 board, to be used for the PCIe clock provider. Signed-off-by: Christian Bruel <christian.bruel@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2024-12-09arm64: dts: st: Add combophy node on stm32mp251Christian Bruel
Add support for COMBOPHY which is used either by the USB3 and PCIe controller. USB3 or PCIe mode is done with phy_set_mode(). PCIe internal reference clock can be generated from the internal clock source or optionnaly from an external 100Mhz pad. Signed-off-by: Christian Bruel <christian.bruel@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2024-12-09arm64: dts: st: add spdifrx support on stm32mp251Olivier Moysan
Add S/PDIFRX support to STM32MP25 SoC family. Signed-off-by: Olivier Moysan <olivier.moysan@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2024-12-09arm64: dts: st: add sai support on stm32mp251Olivier Moysan
Add SAI support to STM32MP25 SoC family. Signed-off-by: Olivier Moysan <olivier.moysan@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2024-12-09arm64: dts: st: add i2s support to stm32mp251Olivier Moysan
Add I2S support to STM32MP25 SoCs. Signed-off-by: Olivier Moysan <olivier.moysan@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2024-12-09MAINTAINERS: add myself and Tudor as reviewers for Google Tensor SoCAndré Draszik
Add myself and Tudor as reviewers for the Google Tensor SoC alongside Peter. While at it, also add our IRC channel. Signed-off-by: André Draszik <andre.draszik@linaro.org> Acked-by: Tudor Ambarus <tudor.ambarus@linaro.org> Reviewed-by: Peter Griffin <peter.griffin@linaro.org> Link: https://lore.kernel.org/r/20241203-gs101-maintainers-v1-1-f287036dbde5@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-12-09arm64: dts: exynos990: Add pmu and syscon-reboot nodesIgor Belwon
Add PMU syscon, and syscon-reboot nodes to the Exynos990 dtsi. Reboot of the Exynos990 SoC is handled by setting bit(SWRESET_TRIGGER[1]) of SWRESET register (PMU + 0x3a00). Tested using the "reboot" command. Signed-off-by: Igor Belwon <igor.belwon@mentallysanemainliners.org> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Link: https://lore.kernel.org/r/20241204145559.524932-3-igor.belwon@mentallysanemainliners.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-12-08Linux 6.13-rc2Linus Torvalds
2024-12-08Merge tag 'kbuild-fixes-v6.13' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild Pull Kbuild fixes from Masahiro Yamada: - Fix a section mismatch warning in modpost - Fix Debian package build error with the O= option * tag 'kbuild-fixes-v6.13' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild: kbuild: deb-pkg: fix build error with O= modpost: Add .irqentry.text to OTHER_SECTIONS
2024-12-08Merge tag 'irq_urgent_for_v6.13_rc2' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull irq fixes from Borislav Petkov: - Fix a /proc/interrupts formatting regression - Have the BCM2836 interrupt controller enter power management states properly - Other fixlets * tag 'irq_urgent_for_v6.13_rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: irqchip/stm32mp-exti: CONFIG_STM32MP_EXTI should not default to y when compile-testing genirq/proc: Add missing space separator back irqchip/bcm2836: Enable SKIP_SET_WAKE and MASK_ON_SUSPEND irqchip/gic-v3: Fix irq_complete_ack() comment
2024-12-08Merge tag 'timers_urgent_for_v6.13_rc2' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull timer fix from Borislav Petkov: - Handle the case where clocksources with small counter width can, in conjunction with overly long idle sleeps, falsely trigger the negative motion detection of clocksources * tag 'timers_urgent_for_v6.13_rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: clocksource: Make negative motion detection more robust
2024-12-08Merge tag 'x86_urgent_for_v6.13_rc2' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull x86 fixes from Borislav Petkov: - Have the Automatic IBRS setting check on AMD does not falsely fire in the guest when it has been set already on the host - Make sure cacheinfo structures memory is allocated to address a boot NULL ptr dereference on Intel Meteor Lake which has different numbers of subleafs in its CPUID(4) leaf - Take care of the GDT restoring on the kexec path too, as expected by the kernel - Make sure SMP is not disabled when IO-APIC is disabled on the kernel cmdline - Add a PGD flag _PAGE_NOPTISHADOW to instruct machinery not to propagate changes to the kernelmode page tables, to the user portion, in PTI - Mark Intel Lunar Lake as affected by an issue where MONITOR wakeups can get lost and thus user-visible delays happen - Make sure PKRU is properly restored with XRSTOR on AMD after a PRKU write of 0 (WRPKRU) which will mark PKRU in its init state and thus lose the actual buffer * tag 'x86_urgent_for_v6.13_rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/CPU/AMD: WARN when setting EFER.AUTOIBRS if and only if the WRMSR fails x86/cacheinfo: Delete global num_cache_leaves cacheinfo: Allocate memory during CPU hotplug if not done from the primary CPU x86/kexec: Restore GDT on return from ::preserve_context kexec x86/cpu/topology: Remove limit of CPUs due to disabled IO/APIC x86/mm: Add _PAGE_NOPTISHADOW bit to avoid updating userspace page tables x86/cpu: Add Lunar Lake to list of CPUs with a broken MONITOR implementation x86/pkeys: Ensure updated PKRU value is XRSTOR'd x86/pkeys: Change caller of update_pkru_in_sigframe()
2024-12-08Merge tag 'mm-hotfixes-stable-2024-12-07-22-39' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/akpm/mm Pull misc fixes from Andrew Morton: "24 hotfixes. 17 are cc:stable. 15 are MM and 9 are non-MM. The usual bunch of singletons - please see the relevant changelogs for details" * tag 'mm-hotfixes-stable-2024-12-07-22-39' of git://git.kernel.org/pub/scm/linux/kernel/git/akpm/mm: (24 commits) iio: magnetometer: yas530: use signed integer type for clamp limits sched/numa: fix memory leak due to the overwritten vma->numab_state mm/damon: fix order of arguments in damos_before_apply tracepoint lib: stackinit: hide never-taken branch from compiler mm/filemap: don't call folio_test_locked() without a reference in next_uptodate_folio() scatterlist: fix incorrect func name in kernel-doc mm: correct typo in MMAP_STATE() macro mm: respect mmap hint address when aligning for THP mm: memcg: declare do_memsw_account inline mm/codetag: swap tags when migrate pages ocfs2: update seq_file index in ocfs2_dlm_seq_next stackdepot: fix stack_depot_save_flags() in NMI context mm: open-code page_folio() in dump_page() mm: open-code PageTail in folio_flags() and const_folio_flags() mm: fix vrealloc()'s KASAN poisoning logic Revert "readahead: properly shorten readahead when falling back to do_page_cache_ra()" selftests/damon: add _damon_sysfs.py to TEST_FILES selftest: hugetlb_dio: fix test naming ocfs2: free inode when ocfs2_get_init_inode() fails nilfs2: fix potential out-of-bounds memory access in nilfs_find_entry() ...
2024-12-08kbuild: deb-pkg: fix build error with O=Masahiro Yamada
Since commit 13b25489b6f8 ("kbuild: change working directory to external module directory with M="), the Debian package build fails if a relative path is specified with the O= option. $ make O=build bindeb-pkg [ snip ] dpkg-deb: building package 'linux-image-6.13.0-rc1' in '../linux-image-6.13.0-rc1_6.13.0-rc1-6_amd64.deb'. Rebuilding host programs with x86_64-linux-gnu-gcc... make[6]: Entering directory '/home/masahiro/linux/build' /home/masahiro/linux/Makefile:190: *** specified kernel directory "build" does not exist. Stop. This occurs because the sub_make_done flag is cleared, even though the working directory is already in the output directory. Passing KBUILD_OUTPUT=. resolves the issue. Fixes: 13b25489b6f8 ("kbuild: change working directory to external module directory with M=") Reported-by: Charlie Jenkins <charlie@rivosinc.com> Closes: https://lore.kernel.org/all/Z1DnP-GJcfseyrM3@ghost/ Tested-by: Charlie Jenkins <charlie@rivosinc.com> Reviewed-by: Charlie Jenkins <charlie@rivosinc.com> Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
2024-12-08modpost: Add .irqentry.text to OTHER_SECTIONSThomas Gleixner
The compiler can fully inline the actual handler function of an interrupt entry into the .irqentry.text entry point. If such a function contains an access which has an exception table entry, modpost complains about a section mismatch: WARNING: vmlinux.o(__ex_table+0x447c): Section mismatch in reference ... The relocation at __ex_table+0x447c references section ".irqentry.text" which is not in the list of authorized sections. Add .irqentry.text to OTHER_SECTIONS to cure the issue. Reported-by: Sergey Senozhatsky <senozhatsky@chromium.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: stable@vger.kernel.org # needed for linux-5.4-y Link: https://lore.kernel.org/all/20241128111844.GE10431@google.com/ Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
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