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2025-01-16Merge tag 'hisi-arm64-dt-for-6.14' of ↵Arnd Bergmann
https://github.com/hisilicon/linux-hisi into soc/dt ARM64: DT: HiSilicon ARM64 DT updates for v6.14 - Remove "enable-dma" and "bus-id" properties from the spi node on hi6220 * tag 'hisi-arm64-dt-for-6.14' of https://github.com/hisilicon/linux-hisi: arm64: dts: hisilicon: Remove unused and undocumented "enable-dma" and "bus-id" properties Link: https://lore.kernel.org/r/67767DCA.8060902@hisilicon.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-01-16Merge tag 'dt-cleanup-6.14' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt into soc/dt Minor improvements in ARM DTS for v6.14 1. Marvell: Use un-deprecated hp-det-gpios (no ABI impact expected). 2. SoCFPGA: Drop spidev devices which are not properly described in DTS, but are using some other compatibles. This was part of wider tree effort to fix such incorrect hardware descriptions. Important: Dropping this device node will have user-visible impact: spidev device will not register. * tag 'dt-cleanup-6.14' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt: ARM: dts: socfpga: remove non-existent DAC from CycloneV devkit ARM: dts: marvell: mmp2-olpc-xo-1-75: Switch to {hp,mic}-det-gpios Link: https://lore.kernel.org/r/20241231132847.135814-2-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-01-16Merge tag 'dt64-cleanup-6.14' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt into soc/dt Minor improvements in ARM64 DTS for v6.14 1. Spreadtrum: - Correct few issues pointed out by DT schema around properties and node names. - Move fuel-gauge from DTSI to DTS, because it belongs to the board. - Use undeprecated properties, like battery-detect-gpios, already supported by Linux. 2. Uniphier: Use un-deprecated hp-det-gpios (no ABI impact expected). * tag 'dt64-cleanup-6.14' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt: arm64: dts: sprd: Fix battery-detect-gpios property arm64: dts: uniphier: Switch to hp-det-gpios arm64: dts: sprd: sc9863a: reorder clocks, clock-names per bindings arm64: dts: sprd: sc9863a: fix in-ports property arm64: dts: sprd: sc2731: move fuel-gauge monitored-battery to device DTS arm64: dts: sprd: sp9860g-1h10: fix factory-internal-resistance-micro-ohms property arm64: dts: sprd: sp9860g-1h10: fix constant-charge-voltage-max-microvolt property Link: https://lore.kernel.org/r/20241231132847.135814-1-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-01-15Merge tag 'samsung-dt64-6.14' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt Samsung DTS ARM64 changes for v6.14 1. Exynos8895: Add UART nodes, PMU (performance) for the M2 cluster and I2C controllers in the camera block (HSI2C in CAM0-3). 2. Exynos990: Add Power Management Unit (Samsung block), PMU (performance) for M5 cluster and two clock controllers. 3. ExynosAutov920: Add watchdog and DMA controllers. 4. Google GS101: Minor fixes for phy and USB. Add USB Type-C. 5. Exynos850-e850-96 board: Drop gap in memory layout. 6. New SoC: Exynos9810. 7. New boards, all mobile phones: - Exynos9810: Samsung Galaxy S9 (SM-G960F) - Exynos990: Samsung Galaxy S20 FE (SM-G780F) Samsung Galaxy S20 5G (SM-G980F) * tag 'samsung-dt64-6.14' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (23 commits) arm64: dts: exynos8895: Add camera hsi2c nodes arm64: dts: exynos990: Add clock management unit nodes arm64: dts: exynos: gs101-oriole: add pd-disable and typec-power-opmode arm64: dts: exynos: gs101-oriole: enable Maxim max77759 TCPCi arm64: dts: exynos: Add initial support for Samsung Galaxy S9 (SM-G960F) arm64: dts: exynos: Add Exynos9810 SoC support arm64: dts: exynos850-e850-96: Specify reserved secure memory explicitly arm64: dts: exynos990: Add a PMU node for the third cluster arm64: dts: exynosautov920: Add DMA nodes arm64: dts: exynos8895: Add a PMU node for the second cluster dt-bindings: clock: samsung: Add Exynos990 SoC CMU bindings arm64: dts: exynosautov920: add watchdog DT node arm64: dts: exynos: Add initial support for Samsung Galaxy S20 (x1slte) arm64: dts: exynos: Add initial support for Samsung Galaxy S20 5G (x1s) arm64: dts: exynos: Add initial support for Samsung Galaxy S20 Series boards (x1s-common) dt-bindings: arm: samsung: samsung-boards: Add bindings for SM-G981B and SM-G980F board arm64: dts: exynos: gs101: allow stable USB phy Vbus detection arm64: dts: exynos: gs101: phy region for exynos5-usbdrd is larger MAINTAINERS: add myself and Tudor as reviewers for Google Tensor SoC arm64: dts: exynos990: Add pmu and syscon-reboot nodes ... Link: https://lore.kernel.org/r/20241231131742.134329-4-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-01-15Merge tag 'thead-dt-for-v6.14' of https://github.com/pdp7/linux into soc/dtArnd Bergmann
thead-dt-for-v6.14: T-HEAD Devicetrees for v6.14 Add mailbox node for the T-Head TH1520 RISC-V SoC. The mailbox bindings and driver were already merged in v6.13: b2cf36e4a2ac ("dt-bindings: mailbox: Add thead,th1520-mailbox bindings") 5d4d263e1c6b ("mailbox: Introduce support for T-head TH1520 Mailbox driver") Signed-off-by: Drew Fustini <drew@pdp7.com> * tag 'thead-dt-for-v6.14' of https://github.com/pdp7/linux: riscv: dts: thead: Add mailbox node
2025-01-15Merge tag 'samsung-dt-6.14' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt Samsung DTS ARM changes for v6.14 Few fixes and improvements for sound on Galaxy Tab3 (Exynos4212). * tag 'samsung-dt-6.14' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: ARM: dts: samsung: exynos4212-tab3: Drop interrupt from WM1811 codec ARM: dts: samsung: exynos4212-tab3: Add MCLK2 clock to WM1811 codec config ARM: dts: samsung: exynos4212-tab3: Fix headset mic, add jack detection Link: https://lore.kernel.org/r/20241231131742.134329-3-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-12-30arm64: dts: exynos8895: Add camera hsi2c nodesIvaylo Ivanov
Add nodes for hsi2c1-4 (CAM0-3), which allows using them. Signed-off-by: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com> Link: https://lore.kernel.org/r/20241221152803.1663820-1-ivo.ivanov.ivanov1@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-12-30arm64: dts: exynos990: Add clock management unit nodesIgor Belwon
Add CMU nodes for: - cmu_top: provides clocks for other blocks - cmu_hsi0: provides clocks for usb31 Signed-off-by: Igor Belwon <igor.belwon@mentallysanemainliners.org> Link: https://lore.kernel.org/r/20241224-cmu-v3-1-33ca24b2413c@mentallysanemainliners.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-12-30Merge branch 'for-v6.14/dt-bindings-clk-samsung' into next/dt64Krzysztof Kozlowski
2024-12-29ARM: dts: samsung: exynos4212-tab3: Drop interrupt from WM1811 codecArtur Weber
This was initially copied from the Midas DTSI, but there is no proof that the same interrupt is also used on the Tab 3. The pin listed as the interrupt here is GPIO_HDMI_CEC on the Midas, but for the Tab 3 it is the headset button GPIO - GPIO_EAR_SEND_END. Drop the interrupt, since there is no proof that it is used. Signed-off-by: Artur Weber <aweber.kernel@gmail.com> Link: https://lore.kernel.org/r/20240816-midas-audio-tab3-v2-5-48ee7f2293b3@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-12-29ARM: dts: samsung: exynos4212-tab3: Add MCLK2 clock to WM1811 codec configArtur Weber
In the schematics, the MCLK2 pin is shown as connected to CODEC_CLK32K, which is derived from the same 32KHZ_PMIC clock as Bluetooth/WiFi and GPS clocks. 32KHZ_PMIC is connected to the BTCLK pin, represented in mainline as S2MPS11_CLK_BT. Add the MCLK2 clock to the WM1811 codec clock property to properly describe the hardware. Signed-off-by: Artur Weber <aweber.kernel@gmail.com> Link: https://lore.kernel.org/r/20240816-midas-audio-tab3-v2-4-48ee7f2293b3@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-12-29ARM: dts: samsung: exynos4212-tab3: Fix headset mic, add jack detectionArtur Weber
Set up headset mic bias regulator and add the necessary properties to the samsung,midas-audio node to allow for headset jack detection. Signed-off-by: Artur Weber <aweber.kernel@gmail.com> Link: https://lore.kernel.org/r/20240816-midas-audio-tab3-v2-3-48ee7f2293b3@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-12-29ARM: dts: socfpga: remove non-existent DAC from CycloneV devkitConor Dooley
There is no Rohm DAC on the CycloneV devkit according to the online documentation for it that I could find, and it definitely does not have a dh2228fv as this device does not actually exist! Remove the DAC node from the devicetree as it is not acceptable to pretend to have a device on a board in order to bind the spidev driver in Linux. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240717-partake-antivirus-3347e415fb7d@spud Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-12-29arm64: dts: exynos: gs101-oriole: add pd-disable and typec-power-opmodeAndré Draszik
When the serial console is enabled, we need to disable power delivery since serial uses the SBU1/2 pins and appears to confuse the TCPCI, resulting in endless interrupts. For now, change the DT such that the serial console continues working. Note1: We can not have both typec-power-opmode and new-source-frs-typec-current active at the same time, as otherwise DT binding checks complain. Note2: When using a downstream DT, the Pixel boot-loader will modify the DT accordingly before boot, but for this upstream DT it doesn't know where to find the TCPCI node. The intention is for this commit to be reverted once an updated Pixel boot-loader becomes available. Signed-off-by: André Draszik <andre.draszik@linaro.org> Link: https://lore.kernel.org/r/20241203-gs101-phy-lanes-orientation-dts-v2-5-1412783a6b01@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-12-29arm64: dts: exynos: gs101-oriole: enable Maxim max77759 TCPCiAndré Draszik
On Pixel 6 (and Pro), a max77759 companion PMIC for USB Type-C applications is used, which contains four functional blocks (at distinct I2C addresses): * top (including GPIO) * charger * fuel gauge * TCPCi While in the same package, TCPCi and Fuel Gauge have separate I2C addresses, interrupt lines and interrupt status registers and can be treated independently. The TCPCi is required to detect and handle connector orientation in Pixel's USB PHY driver, and to configure the USB controller's role (host vs device). This change adds the TCPCi part as it can be independent and doesn't need a top-level MFD. Signed-off-by: André Draszik <andre.draszik@linaro.org> Reviewed-by: Peter Griffin <peter.griffin@linaro.org> Tested-by: Peter Griffin <peter.griffin@linaro.org> Link: https://lore.kernel.org/r/20241203-gs101-phy-lanes-orientation-dts-v2-4-1412783a6b01@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-12-22arm64: dts: exynos: Add initial support for Samsung Galaxy S9 (SM-G960F)Markuss Broks
Samsung Galaxy S9 (SM-G960F), codenamed starlte, is a mobile phone released in 2017. It has 4GB of RAM, 64GB of UFS storage, Exynos9810 SoC and 1440x2960 Super AMOLED display. This initial device tree enables the framebuffer pre-initialised by bootloader and physical buttons of the device, with more support to come in the future. Co-developed-by: Maksym Holovach <nergzd@nergzd723.xyz> Signed-off-by: Maksym Holovach <nergzd@nergzd723.xyz> Signed-off-by: Markuss Broks <markuss.broks@gmail.com> Link: https://lore.kernel.org/r/20241214-exynos9810-v4-2-4e91fbbc2133@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-12-22arm64: dts: exynos: Add Exynos9810 SoC supportMarkuss Broks
Exynos 9810 is an ARMv8 mobile SoC found in various Samsung devices, such as Samsung Galaxy S9 (starlte), S9 Plus (star2lte), Note 9 (crownlte) and perhaps others. Add minimal support for this SoC, including basic stuff like: - PSCI for bringing up secondary cores - ARMv8 generic timer - GPIO and pinctrl. The firmware coming with the devices based on this SoC is buggy and doesn't configure CNTFRQ_EL0, as required by spec, so it's needed to hardcode the frequency in the timer node. Co-developed-by: Maksym Holovach <nergzd@nergzd723.xyz> Signed-off-by: Maksym Holovach <nergzd@nergzd723.xyz> Signed-off-by: Markuss Broks <markuss.broks@gmail.com> Link: https://lore.kernel.org/r/20241214-exynos9810-v4-1-4e91fbbc2133@gmail.com [krzysztof: Rename and move PMU nodes to proper sorting position] Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-12-22arm64: dts: exynos850-e850-96: Specify reserved secure memory explicitlySam Protsenko
Instead of carving out the secure area in 'memory' node, let's describe it in 'reserved-memory'. That makes it easier to understand both RAM regions and particular secure world memory region. Originally the device tree was created in a way to make sure it was well aligned with the way LittleKernel bootloader modified it. But later it was found the LittleKernel works fine with properly described reserved regions, so it's possible now to define those in a cleaner way. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Link: https://lore.kernel.org/r/20241211033027.12985-1-semen.protsenko@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-12-22arm64: dts: exynos990: Add a PMU node for the third clusterUmer Uddin
Since we have a PMU compatiable for Samsung's Mongoose cores now, drop the comment that explains the lack of it and define the node. Signed-off-by: Umer Uddin <umer.uddin@mentallysanemainliners.org> Link: https://lore.kernel.org/r/20241214115855.49138-2-umer.uddin@mentallysanemainliners.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-12-20Merge tag 'renesas-dts-for-v6.14-tag1' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt Renesas DTS updates for v6.14 - Add more serial (SCIF), power monitor, ADC, and sound support for the RZ/G3S SoC and the RZ/G3S SMARC SoM and development board, - Add support for the R-Car V4H ES3.0 (R8A779G3) SoC on the White Hawk Single development board, - Add display support for the R-Car V4M SoC and the Gray Hawk Single development board, - Add video capture support for the Gray Hawk Single development board, - Add initial support for the RZ/G3E (R9A09G047) SoC and the RZ/G3E SMARC SoM and Carrier-II EVK development board, - Add support for 5-port MATEnet on the Falcon Ethernet sub-board, - Miscellaneous fixes and improvements. * tag 'renesas-dts-for-v6.14-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (33 commits) arm64: dts: renesas: r9a09g047: Add I2C nodes arm64: dts: renesas: rzg3s-smarc: Add sound card arm64: dts: renesas: rzg3s-smarc: Enable SSI3 arm64: dts: renesas: Add da7212 audio codec node arm64: dts: renesas: rzg3s-smarc-som: Add versa3 clock generator node arm64: dts: renesas: r9a08g045: Add SSI nodes arm64: dts: renesas: rzg3s-smarc-som: Enable ADC arm64: dts: renesas: r9a08g045: Add ADC node arm64: dts: renesas: Add initial device tree for RZ/G3E SMARC EVK board arm64: dts: renesas: Add initial support for RZ/G3E SMARC SoM arm64: dts: renesas: r9a09g047: Add OPP table arm64: dts: renesas: Add initial DTSI for RZ/G3E SoC arm64: dts: renesas: falcon-ethernet: Describe PHYs connected on the breakout board arm64: dts: renesas: r8a779a0: Remove address- and size-cells from AVB[1-5] dt-bindings: clock: renesas: Document RZ/G3E SoC CPG dt-bindings: soc: renesas: Document RZ/G3E SMARC SoM and Carrier-II EVK dt-bindings: soc: renesas: Document Renesas RZ/G3E SoC variants arm64: dts: renesas: gray-hawk-single: Add video capture support arm64: dts: renesas: gray-hawk-single: Add DisplayPort support arm64: dts: renesas: r8a779h0: Add display support ... Link: https://lore.kernel.org/r/cover.1734689803.git.geert+renesas@glider.be Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-12-20Merge tag 'stm32-dt-for-v6.14-1' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/dt STM32 DT for v6.14, round 1 Highlights: ---------- - MPU: - STM32MP13: - Populate all timer counter nodes in Soc file. - Enable counter (timers) on stm32mp135f-dk. - DH core: increase CPU voltage to fit with STM32MP135F datasheet. - STMP32MP15: - Populate all timer counter nodes in Soc file. - Enable counter (timers) on stm32mp15 EV1 and DK boards. - OCTAVO: - LXA-TAC (gen1/2): disable RTC, update aliases and adjust USB gadget. - Add LXA-TAC gen3 based on OSD32MP153x SIP: STMP32MP153, RAM, PMIC. - DH: minor fixes. - STM32MP25: - Enable imx335/CSI/DCMIPP pipeline on stm32mp257f-ev1. - Add I2S, SAI, SPDIFRX supports. - Add and enable COMBOPHY on stm32mp257f-ev1. Combophy is used by PCIe and USB3. * tag 'stm32-dt-for-v6.14-1' of https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (23 commits) arm64: dts: st: enable imx335/csi/dcmipp pipeline on stm32mp257f-ev1 arm64: dts: st: add csi & dcmipp node in stm32mp25 ARM: dts: stm32: Swap USART3 and UART8 alias on STM32MP15xx DHCOM SoM ARM: dts: stm32: add counter subnodes on stm32mp157 dk boards ARM: dts: stm32: add counter subnodes on stm32mp157c-ev1 ARM: dts: stm32: add counter subnodes on stm32mp135f-dk ARM: dts: stm32: populate all timer counter nodes on stm32mp15 ARM: dts: stm32: populate all timer counter nodes on stm32mp13 ARM: dts: stm32: lxa-tac: Add support for generation 3 devices ARM: dts: stm32: lxa-tac: move adc and gpio{e,g} to gen{1,2} boards dt-bindings: arm: stm32: add compatible strings for Linux Automation LXA TAC gen 3 ARM: dts: stm32: lxa-tac: adjust USB gadget fifo sizes for multi function ARM: dts: stm32: lxa-tac: extend the alias table ARM: dts: stm32: lxa-tac: disable the real time clock ARM: dts: stm32: Fix IPCC EXTI declaration on stm32mp151 ARM: dts: stm32: Sort M24256E write-lockable page in DH STM32MP13xx DHCOR SoM DT ARM: dts: stm32: Increase CPU core voltage on STM32MP13xx DHCOR SoM ARM: dts: stm32: Deduplicate serial aliases and chosen node for STM32MP15xx DHCOM SoM arm64: dts: st: Enable COMBOPHY on the stm32mp257f-ev1 board arm64: dts: st: Add combophy node on stm32mp251 ... Link: https://lore.kernel.org/r/7ffcca65-3953-413a-bcf3-0702a6b0518b@foss.st.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-12-20arm64: dts: st: enable imx335/csi/dcmipp pipeline on stm32mp257f-ev1Alain Volmat
Enable the camera pipeline with a imx335 sensor connected to the dcmipp via the csi interface. Signed-off-by: Alain Volmat <alain.volmat@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2024-12-20arm64: dts: st: add csi & dcmipp node in stm32mp25Alain Volmat
Add nodes describing the csi and dcmipp controllers handling the camera pipeline on the stm32mp25x. Signed-off-by: Alain Volmat <alain.volmat@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2024-12-20ARM: dts: stm32: Swap USART3 and UART8 alias on STM32MP15xx DHCOM SoMMarek Vasut
Swap USART3 and UART8 aliases on STM32MP15xx DHCOM SoM, make sure UART8 is listed first, USART3 second, because the UART8 is labeled as UART2 on the SoM pinout, while USART3 is labeled as UART3 on the SoM pinout. Fixes: 34e0c7847dcf ("ARM: dts: stm32: Add DH Electronics DHCOM STM32MP1 SoM and PDK2 board") Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Christoph Niedermaier <cniedermaier@dh-electronics.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2024-12-20ARM: dts: stm32: add counter subnodes on stm32mp157 dk boardsFabrice Gasnier
Enable the counter nodes without dedicated pins. With such configuration, the counter interface can be used on internal clock to generate events. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2024-12-20ARM: dts: stm32: add counter subnodes on stm32mp157c-ev1Fabrice Gasnier
Enable the counter nodes without dedicated pins. With such configuration, the counter interface can be used on internal clock to generate events. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2024-12-20ARM: dts: stm32: add counter subnodes on stm32mp135f-dkFabrice Gasnier
Enable the counter nodes without dedicated pins. With such configuration, the counter interface can be used on internal clock to generate events. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2024-12-20ARM: dts: stm32: populate all timer counter nodes on stm32mp15Fabrice Gasnier
Counter driver originally had support limited to quadrature interface and simple counter. It has been improved[1], so add the remaining stm32 timer counter nodes. [1] https://lore.kernel.org/linux-arm-kernel/20240307133306.383045-1-fabrice.gasnier@foss.st.com/ Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2024-12-20ARM: dts: stm32: populate all timer counter nodes on stm32mp13Fabrice Gasnier
Counter driver originally had support limited to quadrature interface and simple counter. It has been improved[1], so add the remaining stm32 timer counter nodes. [1] https://lore.kernel.org/linux-arm-kernel/20240307133306.383045-1-fabrice.gasnier@foss.st.com/ Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2024-12-17arm64: dts: hisilicon: Remove unused and undocumented "enable-dma" and ↵Rob Herring (Arm)
"bus-id" properties Remove "enable-dma" and "bus-id" properties which are both unused in the kernel and undocumented. Most likely they are leftovers from downstream. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2024-12-17arm64: dts: renesas: r9a09g047: Add I2C nodesBiju Das
Add I2C{0..8} nodes to RZ/G3E (R9A09G047) SoC DTSI. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20241216120029.143944-4-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-12-14arm64: dts: exynosautov920: Add DMA nodesFaraz Ata
ExynosAutov920 SoC has 7 DMA controllers. Two secure DMAC (SPDMA0 & SPDMA1) and five non-secure DMAC (PDMA0 to PDMA4). Add the required dt nodes for the same. Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Faraz Ata <faraz.ata@samsung.com> Link: https://lore.kernel.org/r/20241212115709.1724-1-faraz.ata@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-12-14arm64: dts: exynos8895: Add a PMU node for the second clusterIvaylo Ivanov
Since we have a PMU compatible for Samsung's Mongoose cores now, drop the comment that explains the lack of it and define the node. Signed-off-by: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com> Link: https://lore.kernel.org/r/20241211162942.450525-2-ivo.ivanov.ivanov1@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-12-14dt-bindings: clock: samsung: Add Exynos990 SoC CMU bindingsIgor Belwon
Add dt-schema documentation for the Exynos990 SoC CMU. This clock management unit has a topmost block (CMU_TOP) that generates top clocks for other blocks. Currently the only other block implemented is CMU_HSI0, which provides clocks for the USB part of the SoC. Also, device-tree binding definitions added for these blocks: - CMU_TOP - CMU_HSI0 Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Igor Belwon <igor.belwon@mentallysanemainliners.org> Link: https://lore.kernel.org/r/20241209-exynos990-cmu-v4-1-57f07080f9e4@mentallysanemainliners.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-12-13ARM: dts: nuvoton: Fix at24 EEPROM node namesRob Herring (Arm)
at24.yaml defines the node name for at24 EEPROMs as 'eeprom'. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20240910215905.823337-1-robh@kernel.org Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-12-13arm64: dts: renesas: rzg3s-smarc: Add sound cardClaudiu Beznea
Add sound card with SSI3 as CPU DAI and DA7212 as codec DAI. Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Link: https://lore.kernel.org/20241210170953.2936724-25-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-12-13arm64: dts: renesas: rzg3s-smarc: Enable SSI3Claudiu Beznea
Enable SSI3. Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Link: https://lore.kernel.org/20241210170953.2936724-24-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-12-13arm64: dts: renesas: Add da7212 audio codec nodeClaudiu Beznea
Add the da7212 audio codec node. Along with it regulators nodes were reworked to be able to re-use them on da7212. Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Link: https://lore.kernel.org/20241210170953.2936724-23-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-12-13arm64: dts: renesas: rzg3s-smarc-som: Add versa3 clock generator nodeClaudiu Beznea
Add versa3 clock generator node. It provides the clocks for the Ethernet PHY, PCIe, audio devices. Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Link: https://lore.kernel.org/20241210170953.2936724-22-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-12-13arm64: dts: renesas: r9a08g045: Add SSI nodesClaudiu Beznea
Add DT nodes for the SSI IPs available on the Renesas RZ/G3S SoC. Along with it external audio clocks were added. Board device tree could use it and update the frequencies. Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20241210170953.2936724-21-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-12-13arm64: dts: renesas: rzg3s-smarc-som: Enable ADCClaudiu Beznea
Enable ADC. Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20241206111337.726244-16-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-12-13arm64: dts: renesas: r9a08g045: Add ADC nodeClaudiu Beznea
Add the device tree node for the ADC IP available on the Renesas RZ/G3S SoC. Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20241206111337.726244-15-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-12-13arm64: dts: renesas: Add initial device tree for RZ/G3E SMARC EVK boardBiju Das
Add the initial device tree for the Renesas RZ/G3E SMARC EVK board. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20241203105005.103927-13-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-12-13arm64: dts: renesas: Add initial support for RZ/G3E SMARC SoMBiju Das
Add initial support for the RZ/G3E SMARC SoM with 4GB memory, audio_extal, qextal and rtxin clks. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20241203105005.103927-12-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-12-13arm64: dts: renesas: r9a09g047: Add OPP tableBiju Das
Add OPP table for RZ/G3E SoC. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20241203105005.103927-11-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-12-13arm64: dts: renesas: Add initial DTSI for RZ/G3E SoCBiju Das
Add the initial DTSI for the RZ/G3E SoC. The files in this commit have the following meaning: - r9a09g047.dtsi: RZ/G3E family SoC common parts - r9a09g047e57.dtsi: RZ/G3E R0A09G047E{4,5}{7,8} SoC specific parts - r9a09g047e37.dtsi: RZ/G3E R0A09G047E{2,3}{7,8} SoC specific parts Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20241203105005.103927-10-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-12-13Merge tag 'renesas-r9a09g047-dt-binding-defs-tag1' into renesas-dts-for-v6.14Geert Uytterhoeven
Renesas RZ/G3E DT Binding Definitions DT bindings and binding definitions for the Renesas RZ/G3E (R9A09G047) SoC, shared by driver and DT source files.
2024-12-13arm64: dts: renesas: falcon-ethernet: Describe PHYs connected on the ↵Niklas Söderlund
breakout board Describe and connect the five Marvell 88Q2110 PHYs present on the Falcon Ethernet breakout board. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20241023154643.4025941-3-niklas.soderlund+renesas@ragnatech.se Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-12-13arm64: dts: renesas: r8a779a0: Remove address- and size-cells from AVB[1-5]Niklas Söderlund
When describing the PHYs on the Falcon Ethernet breakout board mdio nodes will be needed to describe the connections, and each mdio node will need to contain these two properties instead. This will make the address-cells and size-cells described in the base SoC include file redundant and they will produce warnings, remove them. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20241023154643.4025941-2-niklas.soderlund+renesas@ragnatech.se Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-12-13dt-bindings: clock: renesas: Document RZ/G3E SoC CPGBiju Das
Document the device tree bindings for the Renesas RZ/G3E SoC Clock Pulse Generator (CPG). Also define constants for the core clocks of the RZ/G3E SoC. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20241203105005.103927-5-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
generated by cgit (git 2.34.1) at 2025-09-18 05:17:30 +0000