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2010-10-26[SCSI] lpfc 8.3.18: Fix critical errorsJames Smart
Fix critical errors - Update send_scsi_event to validate pnode pointer active before copying the wwpn information. - Add a message, mailbox_idle, and unlock before failing SECURITY_MGMT or AUTH_PORT mailbox commands - Prevent spin_lock_irqsave from being called twice in a row. Signed-off-by: Alex Iannicelli <alex.iannicelli@emulex.com> Signed-off-by: James Smart <james.smart@emulex.com> Signed-off-by: James Bottomley <James.Bottomley@suse.de>
2010-10-26[SCSI] lpfc 8.3.18: Adapter Shutdown and Unregistration cleanupJames Smart
Adapter Shutdown and Unregistration cleanup - Correct the logic around hba shutdown. Prior to final reset, the driver must wait for all XRIs to return from the adapter. Added logic to poll, progressively slowing the poll rate as delay gets longer. - Correct behavior around the rsvd1 field in UNREG_RPI_ALL mailbox completion and final rpi cleanup. - Updated logic to move pending VPI registrations to their completion in cases where a CVL may be received while registration in progress. - Added unreg all rpi mailbox command before unreg vpi. Signed-off-by: Alex Iannicelli <alex.iannicelli@emulex.com> Signed-off-by: James Smart <james.smart@emulex.com> Signed-off-by: James Bottomley <James.Bottomley@suse.de>
2010-10-26[SCSI] lpfc 8.3.18: Add logic to detect last devloss timeoutJames Smart
Added driver logic to detect the last devloss timeout of remote nodes which was still in use of FCF. At that point, the driver should set the last in-use remote node devloss timeout flag if it was not already set and should perform proper action on the in-use FCF and recover of FCF from firmware, depending on the state the driver's FIP engine is in. Find eligible FCF through FCF table rescan or the next new FCF event when FCF table rescan turned out empty eligible FCF, and the successful flogi into an FCF shall clear the HBA_DEVLOSS_TMO flag, indicating the successful recovery from devloss timeout. [jejb: add delay.h include to lpfc_hbadisc.c to fix ppc compile] Signed-off-by: Alex Iannicelli <alex.iannicelli@emulex.com> Signed-off-by: James Smart <james.smart@emulex.com> Signed-off-by: James Bottomley <James.Bottomley@suse.de>
2010-10-26perf record: Remove newline character from perror() argumentMatt Fleming
If we include a newline character in the string argument to perror() then the output will be split across two lines like so, Unable to read perf file descriptor : No space left on device Deleting the newline character prints a much more readable error, Unable to read perf file descriptor: No space left on device Cc: Peter Zijlstra <peterz@infradead.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Ingo Molnar <mingo@elte.hu> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: Tom Zanussi <tzanussi@gmail.com> LKML-Reference: <89e77b54659bc3798b23a5596c2debb7f6f4cf27.1283010281.git.matt@console-pimps.org> Signed-off-by: Matt Fleming <matt@console-pimps.org> Signed-off-by: Arnaldo Carvalho de Melo <acme@felicio.ghostprotocols.net>
2010-10-26ARM: imx: Add wake functionality to GPIODinh Nguyen
Add function definition for irq_chip.set_wake to enable GPIO to wake-up the system. This patch has been tested on a MX51 Babbage system that had suspend code implemented. The set_wake implementation is necessary for a GPIO to wake up a system from suspend. Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-10-26ARM: mx5: Add gpio-keys to mx51 babbage boardDinh Nguyen
Add functionality for the power button on MX51 Babbage board. Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-10-26ARM: imx: Add gpio-keys to plat-mxcDinh Nguyen
Add imx_add_gpio_keys function to add gpio-keys in plat-mxc Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-10-26mx31_3ds: Fix spi registrationRogerio Pimentel
Commit (06606ff13) "ARM: imx: dynamically register spi_imx devices (imx31)" registered the wrong SPI port for mx31_3ds board. mx31_3ds uses SPI2 to connect to the MC13783 PMIC. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Rogerio Pimentel <rogerio.pimentel@freescale.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-10-26mx31_3ds: Fix the logic for detecting the debug boardRogerio Pimentel
The function mxc_expio_init returns 0 on success, so fix the logic for printing the error case. Also fixed the wording on the error message. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Rogerio Pimentel <rogerio.pimentel@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-10-26Merge branch 'tip/perf/ringbuffer-2' of ↵Ingo Molnar
git://git.kernel.org/pub/scm/linux/kernel/git/rostedt/linux-2.6-trace into perf/urgent
2010-10-26Revert "mtd: cleanup Kconfig dependencies"David Woodhouse
This reverts commit 432dc821c90114f9b0e00f6752a700e937516ade. The individual CFI geometry options were carefully set up to get sane default values if the CFI_ADV_OPTIONS wasn't set, and it wasn't appropriate to move them into an if/endif block. Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2010-10-26mtd: cfi_cmdset_0002: make sector erase command variableGuillaume LECERF
Some old SST chips use 0x50 as sector erase command, instead of 0x30. Make this value variable to handle such chips. Signed-off-by: Guillaume LECERF <glecerf@gmail.com> Acked-by: Wolfram Sang <w.sang@pengutronix.de> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2010-10-26mtd: cfi_cmdset_0002: add CFI detection for SST 38VF640x chipsGuillaume LECERF
Add support for SST38VF640x chips in CFI mode. Signed-off-by: Guillaume LECERF <glecerf@gmail.com> Signed-off-by: yidong zhang <zhangyd6@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2010-10-26mtd: cfi_util: add support for switching SST 39VF640xB chips into QRY modeGuillaume LECERF
Signed-off-by: Guillaume LECERF <glecerf@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2010-10-26mtd: cfi_cmdset_0001: use defined value of P_ID_INTEL_PERFORMANCE instead of ↵Guillaume LECERF
hardcoded one Signed-off-by: Guillaume LECERF <glecerf@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2010-10-26block2mtd: dubious assignmentNicolas Kaiser
When block2mtd_erase fails, a duplicated assignment instantly changes instr->state from MTD_ERASE_FAILED to MTD_ERASE_DONE. It looks to me like this might not be intended, or is it? Signed-off-by: Nicolas Kaiser <nikai@nikai.net> Acked-By: Joern Engel <joern@logfs.org> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2010-10-26AT91: rtc: enable built-in RTC in Kconfig for at91sam9g45 familyNicolas Ferre
Enable built-in RTC IP in Kconfig and modify comments and help messages. RTT as RTC is still available but should not be selected in common case. Reported-by: Yegor Yefremov <yegor_sub1@visionsystems.de> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2010-10-26at91/atmel-mci: inclusion of sd/mmc driver in at91sam9g45 chip and boardNicolas Ferre
This adds the support of atmel-mci sd/mmc driver in at91sam9g45 devices and board files. This also configures the DMA controller slave interface for at_hdmac dmaengine driver. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2010-10-26AT91: pm: make sure that r0 is 0 when dealing with cache operationsNicolas Ferre
When using CP15 cache operations (c7), we make sure that Rd (r0) is actually 0 as ARM 926 TRM is saying. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2010-10-26AT91: pm: use plain cpu_do_idle() for "wait for interrupt"Nicolas Ferre
For power management at91_pm_enter() routine, use the cpu_do_idle() for a rock solid "wait for interrupt" implementation. For AT91SAM9 ARM 926 based chips, we can exceed the cache line length as we can access RAM even while in self-refresh mode. We keep plain access to CP15 for at91rm9200 as this feature is not available: instructions have to be in a single cache line. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2010-10-26AT91: reset: extend alternate reset procedure to several chipsNicolas Ferre
Several at91sam9 chips need the alternate reset procedure to be sure to halt SDRAM smoothly before resetting the chip. This is an extension of previous patch "Fix AT91SAM9G20 reset" to all chips affected. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2010-10-26AT91: reset routine cleanup, remove not needed icache flushNicolas Ferre
Generalize assembler reset routine to allow use on several at91sam9 chips. This patch replace double definitions of SDRAM controller registers and RSTC registers with use of classical header files. For this rework, we remove the not needed icache flush as it is already done in the calling function: arm_machine_restart(). Rename at91sam9g20_reset.S to generalize to several chips. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2010-10-26AT91: trivial: align comment of at91sam9g20_reset with one more tabNicolas Ferre
Preparing next patch with longer names Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2010-10-26AT91: Fix AT91SAM9G20 reset as per the errata in the data sheetPeter Horton
If the SDRAM is not cleanly shutdown before reset it can be left driving the bus, which then stops the bootloader booting from NAND. Signed-off-by: Peter Horton <phorton@bitbox.co.uk> [nicolas.ferre@atmel.com: change file header line order] Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2010-10-26AT91: add board support for Pcontrol_G20Peter Gsellmann
Board is a carrier board for Stamp9G20, with additional peripherals for a building automation system Signed-off-by: Peter Gsellmann <pgsellmann@portner-elektronik.at> [nicolas.ferre@atmel.com: remove machine_desc.io_pg_offst and .phys_io] Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2010-10-26ACPI: install ACPI table handler before any dynamic tables being loadedZhang Rui
ACPI table sysfs I/F is broken by commit 78f1699659963fff97975df44db6d5dbe7218e55 Author: Alex Chiang <achiang@hp.com> Date: Sun Dec 20 12:19:09 2009 -0700 ACPI: processor: call _PDC early because dynamic SSDT tables may be loaded in _PDC, before installing the ACPI table handler. As a result, the sysfs I/F of these dynamic tables are located at /sys/firmware/acpi/tables instead of /sys/firmware/acpi/tables/dynamic, which is not true. Invoke acpi_sysfs_init() before acpi_early_processor_set_pdc(), so that the table handler is installed before any dynamic tables loaded. https://bugzilla.kernel.org/show_bug.cgi?id=21142 CC: Dennis Jansen <dennis.jansen@web.de> CC: Alex Chiang <achiang@hp.com> Signed-off-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2010-10-26genirq: Add single IRQ reservation helperPaul Mundt
For cases that wish to reserve a single IRQ at a given place simply provide a wrapper in to the ranged reservation routine. Signed-off-by: Paul Mundt <lethal@linux-sh.org> LKML-Reference: <20101026071912.GD4733@linux-sh.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2010-10-26Merge branch 'perf/core' of ↵Ingo Molnar
git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux-2.6 into perf/urgent
2010-10-26sh: Switch dynamic IRQ creation to generic irq allocator.Paul Mundt
Now that the genirq code provides an IRQ bitmap of its own and the necessary API to manipulate it, there's no need to keep our own version around anymore. In the process we kill off some unused IRQ reservation code, with future users now having to tie in to the genirq API as normal. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-10-26sh: Tidy up genirq Kconfig bits.Paul Mundt
Now that there's a HAVE_GENERIC_HARDIRQS, switch over. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-10-26ARM: ux500 specific L2 cache codePer Fransson
The generic version of l2x0_inv_all is only called just after disabling the L2 cache and is surrounded by a spinlock. However, we're not really turning off the L2 cache right now, and the PL310 does not support exclusive accesses (used to implement the spinlock). So, the invalidation needs to be done without the spinlock. Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Hans-Juergen Koch <hjk@linutronix.de> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Per Fransson <per.xx.fransson@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
2010-10-26ARM: l2x0: Optimise the range based operationsSantosh Shilimkar
For the big buffers which are in excess of cache size, the maintaince operations by PA are very slow. For such buffers the maintainace operations can be speeded up by using the WAY based method. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Linus Walleij <linus.walleij@stericsson.com>
2010-10-26ARM: l2x0: Determine the cache sizeSantosh Shilimkar
The cache size is needed for to optimise range based maintainance operations Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Linus Walleij <linus.walleij@stericsson.com>
2010-10-26ARM: l2x0: Fix coding-style in the cache-l2x0.hSantosh Shilimkar
Replace tab with space after #define to be consisten with other define in the file. Also move the bit mask below the register offsets. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Linus Walleij <linus.walleij@stericsson.com>
2010-10-26omap4: l2x0: Override the default l2x0_disableSantosh Shilimkar
The machine_kexec() calls outer_disable which can crash on OMAP4 becasue of trustzone restrictions. This patch overrides the default l2x0_disable with a OMAP4 specific implementation taking care of trustzone Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Tony Lindgren <tony@atomide.com> Acked-by: Linus Walleij <linus.walleij@stericsson.com>
2010-10-26arm: Implement l2x0 cache disable functionsThomas Gleixner
Add flush_all, inv_all and disable functions to the l2x0 code. These functions are called from kexec code to prevent random crashes in the new kernel. Platforms like OMAP which control L2 enable/disable via SMI mode can override the outer_cache.disable() function to implement their own. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Linus Walleij <linus.walleij@stericsson.com>
2010-10-26arm: Disable outer (L2) cache in kexecThomas Gleixner
kexec does not disable the outer cache before disabling the inner caches in cpu_proc_fin(). So L2 is enabled across the kexec jump. When the new kernel enables chaches again, it randomly crashes. Disabling L2 before calling cpu_proc_fin() cures the problem. Disabling L2 requires the following new functions: flush_all(), inv_all() and disable(). Add them to outer_cache_fns and call them from the kexec code. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Linus Walleij <linus.walleij@stericsson.com>
2010-10-26ARM: Improve the L2 cache performance when PL310 is usedCatalin Marinas
With this L2 cache controller, the cache maintenance by PA and sync operations are atomic and do not require a "wait" loop. This patch conditionally defines the cache_wait() function. Since L2x0 cache controllers do not work with ARMv7 CPUs, the patch automatically enables CACHE_PL310 when only CPU_V7 is defined. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2010-10-26sh: Sanitize sparse irqThomas Gleixner
Switch over to the new allocator functions. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-10-26sh: Expose physical addressing mode through cpuinfo.Paul Mundt
CPUs can be in either the legacy 29-bit or 32-bit physical addressing modes. This follows the x86 approach of tracking the phys bits in cpuinfo and exposing it to userspace through procfs. This change was requested to permit kexec-tools to detect the physical addressing mode in order to determine the appropriate address mangling. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-10-26drm/radeon/kms: properly compute group_size on 6xx/7xxAlex Deucher
Needed for tiled surfaces. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Cc: stable@kernel.org Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-10-26drm/radeon/kms: fix 2D tile height alignment in the r600 CS checkerAlex Deucher
macro tile heights are aligned to num channels, not num banks. Noticed by Dave Airlie. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Cc: stable@kernel.org Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-10-26drm/radeon/kms/evergreen: set the clear state to the blit stateAlex Deucher
The hw stores a default clear state for registers in the context range that can be initialized when the CP is set up. Set the blit state as the default clear state and use the CLEAR_STATE packet to load the blit state rather than loading it from an IB. This reduces overhead when doing bo moves using the 3D engine. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-10-26ARM: S5PV310: Support ethernet for SMDKV310 and SMDKC210Daein Moon
This patch adds to support ethernet for SMDKV310 and SMDKC210 board. - define smc911x resources - define configurations of smc911x platform data - define platform device "smsc911x" - initialize srom controller for lan9215 chip Signed-off-by: Daein Moon <moon9124@samsung.com> Signed-off-by: Sangbeom Kim <sbkim73@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-10-26drm/radeon/kms: don't poll dac load detect.Dave Airlie
This is slightly destructive, cpu intensive and can cause lockups. Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-10-26mx31_3ds: Remove unused debug board definitionsRogerio Pimentel
In commit (c5d38f08): "mx31_3ds: revert 3ds debug board relate code" the debug board definitions are placed in a separate file. Remove the remaining debug board related define from mach-mx31_3ds.c. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Rogerio Pimentel <rogerio.pimentel@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-10-25net/sunrpc: Use static const char arraysJoe Perches
Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: Trond Myklebust <Trond.Myklebust@netapp.com>
2010-10-25nfs4: fix channel attribute sanity-checksJ. Bruce Fields
The sanity checks here are incorrect; in the worst case they allow values that crash the client. They're also over-reliant on the preprocessor. Signed-off-by: J. Bruce Fields <bfields@redhat.com> Signed-off-by: Trond Myklebust <Trond.Myklebust@netapp.com>
2010-10-25Merge branch 'for-next' of git://android.git.kernel.org/kernel/tegraLinus Torvalds
* 'for-next' of git://android.git.kernel.org/kernel/tegra: spi: tegra: fix error setting on timeout spi: add spi_tegra driver tegra: harmony: enable PCI Express tegra: add PCI Express support tegra: add PCI Express clocks [ARM] tegra: Add APB DMA support [ARM] tegra: Add cpufreq support [ARM] tegra: common: Update common clock init table [ARM] tegra: clock: Add dvfs support, bug fixes, and cleanups [ARM] tegra: Add support for reading fuses [ARM] tegra: gpio: Add suspend and wake support [ARM] tegra: pinmux: add safe values, move tegra2, add suspend [ARM] tegra: add suspend and mirror irqs to legacy controller [ARM] tegra: Add legacy irq support [ARM] tegra: update iomap
2010-10-25Merge branch 'for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin: Blackfin: fix inverted anomaly 05000481 logic Blackfin: drop unused irq_panic()/DEBUG_ICACHE_CHECK Blackfin: ppi/spi/twi headers: add missing __BFP undef Blackfin: update defconfigs Blackfin: bfin_twi.h: start a common TWI header netdev: bfin_mac: push settings to platform resources
generated by cgit (git 2.34.1) at 2025-09-16 06:09:04 +0000