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2024-07-01arm64: dts: ti: k3-am62p: Add gpio-ranges propertiesNishanth Menon
On the AM62P platform we have no single 1:1 relation regarding index of GPIO and pin controller. The GPIOs and pin controller registers have mapping and holes in the map. These have been extracted from the AM62P data sheet. MCU pinctrl definition is shared as it is common between AM62P and J722S, but that is not the case for main domain. Ref: AM62P Data sheet https://www.ti.com/lit/gpn/am62p Signed-off-by: Nishanth Menon <nm@ti.com> Link: https://lore.kernel.org/r/20240627162539.691223-3-nm@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-07-01arm64: dts: ti: k3-pinctrl: Define a generic GPIO MUX ModeNishanth Menon
Introduce a GPIO mux mode macro for easier readability. All K3 devices use mux mode 7 to switch to GPIO mux and this allows the gpio-ranges to be defined for pinctrl-single clearly. Signed-off-by: Nishanth Menon <nm@ti.com> Link: https://lore.kernel.org/r/20240627162539.691223-2-nm@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-07-01arm64: dts: ti: k3-am62: Add cpsw-mac-efuse node to wkup_confAndrew Davis
The WKUP system controller address region contains an eFuse block with MAC addresses to be used by the Ethernet controller. The property “ti,syscon-efuse” contains a phandle to a syscon region and an offset into this region where the MAC addresses can be found. Currently "ti,syscon-efuse" points to the entire system controller address space node with an offset to the eFuse IP address. Instead add a cpsw-mac-efuse node to describe the exact eFuse area. Then point the Ethernet controller directly to this region, no offset needed. Signed-off-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20240628151518.40100-8-afd@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-07-01arm64: dts: ti: k3-am62a: Add cpsw-mac-efuse node to wkup_confAndrew Davis
The WKUP system controller address region contains an eFuse block with MAC addresses to be used by the Ethernet controller. The property “ti,syscon-efuse” contains a phandle to a syscon region and an offset into this region where the MAC addresses can be found. Currently "ti,syscon-efuse" points to the entire system controller address space node with an offset to the eFuse IP address. Instead add a cpsw-mac-efuse node to describe the exact eFuse area. Then point the Ethernet controller directly to this region, no offset needed. This makes it so the system controller memory area does not need to be one big syscon area, describe this bus address area as the simple-bus it is. Signed-off-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20240628151518.40100-7-afd@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-07-01arm64: dts: ti: k3-j784s4: Add cpsw-mac-efuse node to mcu_confAndrew Davis
The MCU system controller address region contains an eFuse block with MAC addresses to be used by the Ethernet controller. The property “ti,syscon-efuse” contains a phandle to a syscon region and an offset into this region where the MAC addresses can be found. Currently "ti,syscon-efuse" points to the entire system controller address space node with an offset to the eFuse IP address. Instead add a cpsw-mac-efuse node to describe the exact eFuse area. Then point the Ethernet controller directly to this region, no offset needed. This makes it so the system controller memory area does not need to be one big syscon area, describe this bus address area as the simple-bus it is. Signed-off-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20240628151518.40100-6-afd@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-07-01arm64: dts: ti: k3-j721s2: Add cpsw-mac-efuse node to mcu_confAndrew Davis
The MCU system controller address region contains an eFuse block with MAC addresses to be used by the Ethernet controller. The property “ti,syscon-efuse” contains a phandle to a syscon region and an offset into this region where the MAC addresses can be found. Currently "ti,syscon-efuse" points to the entire system controller address space node with an offset to the eFuse IP address. Instead add a cpsw-mac-efuse node to describe the exact eFuse area. Then point the Ethernet controller directly to this region, no offset needed. This makes it so the system controller memory area does not need to be one big syscon area, describe this bus address area as the simple-bus it is. Signed-off-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20240628151518.40100-5-afd@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-07-01arm64: dts: ti: k3-j721e: Add cpsw-mac-efuse node to mcu_confAndrew Davis
The MCU system controller address region contains an eFuse block with MAC addresses to be used by the Ethernet controller. The property “ti,syscon-efuse” contains a phandle to a syscon region and an offset into this region where the MAC addresses can be found. Currently "ti,syscon-efuse" points to the entire system controller address space node with an offset to the eFuse IP address. Instead add a cpsw-mac-efuse node to describe the exact eFuse area. Then point the Ethernet controller directly to this region, no offset needed. This makes it so the system controller memory area does not need to be one big syscon area, describe this bus address area as the simple-bus it is. Signed-off-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20240628151518.40100-4-afd@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-07-01arm64: dts: ti: k3-j7200: Add cpsw-mac-efuse node to mcu_confAndrew Davis
The MCU system controller address region contains an eFuse block with MAC addresses to be used by the Ethernet controller. The property “ti,syscon-efuse” contains a phandle to a syscon region and an offset into this region where the MAC addresses can be found. Currently "ti,syscon-efuse" points to the entire system controller address space node with an offset to the eFuse IP address. Instead add a cpsw-mac-efuse node to describe the exact eFuse area. Then point the Ethernet controller directly to this region, no offset needed. This makes it so the system controller memory area does not need to be one big syscon area, describe this bus address area as the simple-bus it is. Signed-off-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20240628151518.40100-3-afd@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-07-01arm64: dts: ti: k3-am65: Add cpsw-mac-efuse node to mcu_confAndrew Davis
The MCU system controller address region contains an eFuse block with MAC addresses to be used by the Ethernet controller. The property “ti,syscon-efuse” contains a phandle to a syscon region and an offset into this region where the MAC addresses can be found. Currently "ti,syscon-efuse" points to the entire system controller address space node with an offset to the eFuse IP address. Instead add a cpsw-mac-efuse node to describe the exact eFuse area. Then point the Ethernet controller directly to this region, no offset needed. This makes it so the system controller memory area does not need to be one big syscon area, describe this bus address area as the simple-bus it is. Signed-off-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20240628151518.40100-2-afd@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-07-01arm: dts: k3-am642-evm-nand: Add bootph-all to NAND related nodesRoger Quadros
NAND boot would require these nodes to be present at early stage. Ensure that by adding "bootph-all" to relevant nodes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://lore.kernel.org/r/20240628-am642-evm-nand-bootph-v2-1-387bfa1533a6@kernel.org Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-07-01arm64: dts: ti: Add basic support for phyBOARD-Lyra-AM62AxGarrett Giordano
The phyCORE-AM62Ax [1] is a SoM (System on Module) featuring TI's AM62Ax SoC. It can be used in combination with different carrier boards. This module can come with different sizes and models for DDR, eMMC, SPI NOR Flash and various SoCs from the AM62Ax family. A development Kit, called phyBOARD-Lyra [2] is used as a carrier board reference design with a mapper board being used to allow the phyCORE-AM62Ax to fit the phyBOARD-Lyra. Supported features: * Debug UART * SPI NOR Flash * eMMC * 2x Ethernet * Micro SD card * I2C EEPROM * I2C RTC * GPIO Expander * LEDs * USB * HDMI * USB-C * Audio For more details, see: [1] Product page SoM: https://www.phytec.com/product/phycore-am62a [2] Product page CB: https://www.phytec.com/product/phyboard-am62a Signed-off-by: Garrett Giordano <ggiordano@phytec.com> Reviewed-by: Wadim Egorov <w.egorov@phytec.de> Link: https://lore.kernel.org/r/20240626155244.3311436-4-ggiordano@phytec.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-07-01dt-bindings: arm: ti: Add bindings for PHYTEC AM62Ax based hardwareGarrett Giordano
Add devicetree bindings for AM62Ax based phyCORE-AM62A7 SoM and phyBOARD-Lyra RDK. Signed-off-by: Garrett Giordano <ggiordano@phytec.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240626155244.3311436-3-ggiordano@phytec.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-07-01arm64: dts: ti: Add am62x-phyboard-lyra carrier boardGarrett Giordano
PHYTECs phyBOARD-Lyra carrier board is able to accomidate multiple SoMs. Refactor k3-am625-phyboard-lyra-rdk.dts into an include file so it can be reused in combination with our phyCORE-AM62Ax SoM. Signed-off-by: Garrett Giordano <ggiordano@phytec.com> Reviewed-by: Wadim Egorov <w.egorov@phytec.de> Link: https://lore.kernel.org/r/20240626155244.3311436-2-ggiordano@phytec.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-07-01arm64: dts: ti: k3-am62a: Enable AUDIO_REFCLKxGarrett Giordano
On AM62a SoCs the AUDIO_REFCLKx clocks can be used as an input to external peripherals when configured through CTRL_MMR, so add the clock nodes. Based on: Link: https://lore.kernel.org/lkml/20230807202159.13095-2-francesco@dolcini.it/ Signed-off-by: Garrett Giordano <ggiordano@phytec.com> Link: https://lore.kernel.org/r/20240626155244.3311436-1-ggiordano@phytec.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-07-01arm64: dts: ti: k3-j784s4-evm: Enable analog audio supportJayesh Choudhary
The audio support on J784S4-EVM is using PCM3168A[0] codec connected to McASP0 serializers. - Add the nodes for sound-card, audio codec, MAIN_I2C3 and McASP0. - Add pinmux for I2C3, McASP0 and AUDIO_EXT_REFCLK1. - Add necessary GPIO hogs to route the MAIN_I2C3 lines and McASP serializer. - Add idle-state as 1 in mux1 to route McASP clock signals. [0]: <https://www.ti.com/lit/gpn/pcm3168a> Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com> Link: https://lore.kernel.org/r/20240626101645.36764-4-j-choudhary@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-07-01arm64: dts: ti: k3-j784s4-main: Add audio_refclk nodeJayesh Choudhary
On J784S4 SoC, the AUDIO_REFCLK1 can be used as input to external peripherals when configured through CTRL_MMR. Add audio_refclk1 node which would be used as system clock for audio codec PCM3168A. Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com> Link: https://lore.kernel.org/r/20240626101645.36764-3-j-choudhary@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-07-01arm64: dts: ti: k3-j784s4-main: Add McASP nodesJayesh Choudhary
Add McASP 0-4 instances and keep them disabled because several required properties are missing as they are board specific. Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com> Link: https://lore.kernel.org/r/20240626101645.36764-2-j-choudhary@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-07-01arm64: dts: ti: am62-lp-sk: Add overlay for NAND expansion cardRoger Quadros
The NAND expansion card (PROC143E1) connects over the User/MCU/PRU Expansion port on the am62-lp-sk EVM. The following pins are shared between McASP1 and GPMC-NAND so both cannot work simultaneously. Pin name McASP1 function GPMC function ======== =============== ============= J17 MCASP1_AXR0 GPMC0_WEN P21 MCASP1_AFSX GPMC0_WAIT0 K17 MCASP1_ACLKX GPMC0_BE0N_CLE K20 MCASP1_AXR2 GPMC0_ADVN_ALE The factory default sets the pins for McASP1 use. (i.e. Resistor Array RA1 installed, RA4 not installed). For NAND use, RA1 has to be removed and RA4 must be installed. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://lore.kernel.org/r/20240622-am62lp-sk-nand-v1-2-caee496eaf42@kernel.org Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-07-01arm64: dts: ti: k3-am62: Add GPMC and ELM nodesNitin Yadav
Add GPMC and ELM device tree nodes for AM62 SoC family. Signed-off-by: Nitin Yadav <n-yadav@ti.com> Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://lore.kernel.org/r/20240622-am62lp-sk-nand-v1-1-caee496eaf42@kernel.org Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-07-01arm64: dts: ti: k3-j722s-evm: Enable analog audio supportJayesh Choudhary
The audio support on J722S-EVM is using TLV320AIC3106[0] codec connected to McASP1 serializers. - Add the nodes for sound-card, audio codec and McASP1. - Add hog for TRC_MUX_SEL to select between McASP and TRACE signals - Add hogs for GPIO_AUD_RSTn and MCASP1_FET_SEL which is used to switch between HDMI audio and codec audio. - Add pinmux for MCASP1 and AUDIO_EXT_REFCLK1. [0]: <https://www.ti.com/lit/gpn/TLV320AIC3106> Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com> Reviewed-by: Jai Luthra <j-luthra@ti.com> Link: https://lore.kernel.org/r/20240625113301.217369-3-j-choudhary@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-07-01arm64: dts: ti: k3-j722s-main: Add audio_refclk nodeJayesh Choudhary
On J722S SoC, the AUDIO_REFCLK1 can be used as input to external peripherals when configured through CTRL_MMR. Add audio_refclk1 node which would be used as system clock for the audio codec TLV320AIC3106. Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com> Link: https://lore.kernel.org/r/20240625113301.217369-2-j-choudhary@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-07-01arm64: dts: ti: k3-am68-sk-som: Add support for OSPI flashSinthu Raja
AM68 SK has an OSPI NOR flash on its SOM connected to OSPI0 instance. Enable support for the same. Also, describe the OSPI flash partition information through the device tree, according to the offsets in the bootloader. Signed-off-by: Sinthu Raja <sinthu.raja@ti.com> Signed-off-by: Udit Kumar <u-kumar1@ti.com> Link: https://lore.kernel.org/r/20240622161835.3610348-1-u-kumar1@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-07-01arm64: dts: ti: k3-am6xx-phycore-qspi-nor: Add overlay to enable QSPI NORNathan Morrisson
Add an overlay to change from the default OSPI NOR to QSPI NOR for all am6xx-phycore-som boards. The EEPROM on am6xx-phycore-soms contains information about the configuration of the SOM. The standard configuration of the SOM has an ospi nor, but if qspi nor is populated, the EEPROM will indicate that change and we can use this overlay to cleanly change to qspi nor. Signed-off-by: Nathan Morrisson <nmorrisson@phytec.com> Link: https://lore.kernel.org/r/20240621233143.2077941-1-nmorrisson@phytec.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-07-01arm64: dts: ti: k3-am64-tqma64xxl: relicense to GPL-2.0-only OR MITMatthias Schiffer
MIT license was added to the AM64x SoC DTSIs in commit 6248b20e3203 ("arm64: dts: ti: k3-am64: Add MIT license along with GPL-2.0"). Apply the same license change to the TQMa64xxL SoM and MBaX4XxL baseboard Device Trees. The copyright year is updated to indicate the license change. Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Link: https://lore.kernel.org/r/20240625110244.9881-1-matthias.schiffer@ew.tq-group.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-07-01arm64: dts: k3-am625-verdin: enable nau8822 pllAndrejs Cainikovs
In current configuration, nau8822 codec on development carrier board provides distorted audio output. This happens due to reference clock is fixed to 25MHz and no PLL is enabled. Following is the calculation of deviation error for different frequencies: 44100Hz: fs = 256 (fixed) prescaler = 2 target frequency = 44100 * 256 * 2 = 22579200 deviation = 22579200 vs 25000000 = 9.6832% 48000Hz: fs = 256 (fixed) prescaler = 2 target frequency = 48000 * 256 * 2 = 24576000 deviation = 24576000 vs 25000000 = 1.696% Enabling nau822 PLL via providing mclk-fs property to simple-audio-card configures clocks properly, but also adjusts audio reference clock (mclk), which in case of TI AM62 should be avoided, as it only supports 25MHz output [1][2]. This change enables PLL on nau8822 by providing mclk-fs, and moves away audio reference clock from DAI configuration, which prevents simple-audio-card to adjust it before every playback [3]. [1]: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1175479/processor-sdk-am62x-output-audio_ext_refclk0-as-mclk-for-codec-and-mcbsp/4444986#4444986 [2]: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1188051/am625-audio_ext_refclk1-clock-output---dts-support/4476322#4476322 [3]: sound/soc/generic/simple-card-utils.c#L441 Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com> Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com> Link: https://lore.kernel.org/r/20240418105730.120913-1-andrejs.cainikovs@gmail.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-07-01drm/xe/pf: Remove inlined #ifdef CONFIG_PCI_IOVMichal Wajdeczko
We can remove #ifdef CONFIG_PCI_IOV in .c files if we provide dummy replacement of the xe_pci_sriov_configure() function. Suggested-by: Jani Nikula <jani.nikula@linux.intel.com> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Reviewed-by: Francois Dugast <francois.dugast@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240627104305.1477-1-michal.wajdeczko@intel.com
2024-07-01tpm_tis_spi: add missing attpm20p SPI device ID entryVitor Soares
"atmel,attpm20p" DT compatible is missing its SPI device ID entry, not allowing module autoloading and leading to the following message: "SPI driver tpm_tis_spi has no spi_device_id for atmel,attpm20p" Based on: commit 7eba41fe8c7b ("tpm_tis_spi: Add missing SPI ID") Fix this by adding the corresponding "attpm20p" spi_device_id entry. Fixes: 3c45308c44ed ("tpm_tis_spi: Add compatible string atmel,attpm20p") Cc: stable@vger.kernel.org # +v6.9 Signed-off-by: Vitor Soares <vitor.soares@toradex.com> Reviewed-by: Lukas Wunner <lukas@wunner.de> Signed-off-by: Jarkko Sakkinen <jarkko@kernel.org>
2024-07-01char: tpm: Fix possible memory leak in tpm_bios_measurements_open()Joe Hattori
In tpm_bios_measurements_open(), get_device() is called on the device embedded in struct tpm_chip. In the error path, however, put_device() is not called. This results in a reference count leak, which prevents the device from being properly released. This commit makes sure to call put_device() when the seq_open() call fails. Cc: stable@vger.kernel.org # +v4.18 Fixes: 9b01b5356629 ("tpm: Move shared eventlog functions to common.c") Signed-off-by: Joe Hattori <joe@pf.is.s.u-tokyo.ac.jp> Signed-off-by: Jarkko Sakkinen <jarkko@kernel.org>
2024-07-01drm/xe/guc: Configure TLB timeout based on CT buffer sizeNirmoy Das
GuC TLB invalidation depends on GuC to process the request from the CT queue and then the real time to invalidate TLB. Add a function to return overestimated possible time a TLB inval H2G might take which can be used as timeout value for TLB invalidation wait time. v4: Make sure CTB is in 4K blocks(Michal) and other doc fixes v3: Pass CT to xe_guc_ct_queue_proc_time_jiffies() (Michal) Add tlb_timeout_jiffies() that replaces TLB_TIMEOUT(Michal) v2: Address reviews from Michal. Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/1622 Cc: Matthew Brost <matthew.brost@intel.com> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> Suggested-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Acked-by: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240628085845.2369-1-nirmoy.das@intel.com Signed-off-by: Nirmoy Das <nirmoy.das@intel.com>
2024-07-01btrfs: fix adding block group to a reclaim list and the unused list during ↵Naohiro Aota
reclaim There is a potential parallel list adding for retrying in btrfs_reclaim_bgs_work and adding to the unused list. Since the block group is removed from the reclaim list and it is on a relocation work, it can be added into the unused list in parallel. When that happens, adding it to the reclaim list will corrupt the list head and trigger list corruption like below. Fix it by taking fs_info->unused_bgs_lock. [177.504][T2585409] BTRFS error (device nullb1): error relocating ch= unk 2415919104 [177.514][T2585409] list_del corruption. next->prev should be ff1100= 0344b119c0, but was ff11000377e87c70. (next=3Dff110002390cd9c0) [177.529][T2585409] ------------[ cut here ]------------ [177.537][T2585409] kernel BUG at lib/list_debug.c:65! [177.545][T2585409] Oops: invalid opcode: 0000 [#1] PREEMPT SMP KASAN NOPTI [177.555][T2585409] CPU: 9 PID: 2585409 Comm: kworker/u128:2 Tainted: G W 6.10.0-rc5-kts #1 [177.568][T2585409] Hardware name: Supermicro SYS-520P-WTR/X12SPW-TF, BIOS 1.2 02/14/2022 [177.579][T2585409] Workqueue: events_unbound btrfs_reclaim_bgs_work[btrfs] [177.589][T2585409] RIP: 0010:__list_del_entry_valid_or_report.cold+0x70/0x72 [177.624][T2585409] RSP: 0018:ff11000377e87a70 EFLAGS: 00010286 [177.633][T2585409] RAX: 000000000000006d RBX: ff11000344b119c0 RCX:0000000000000000 [177.644][T2585409] RDX: 000000000000006d RSI: 0000000000000008 RDI:ffe21c006efd0f40 [177.655][T2585409] RBP: ff110002e0509f78 R08: 0000000000000001 R09:ffe21c006efd0f08 [177.665][T2585409] R10: ff11000377e87847 R11: 0000000000000000 R12:ff110002390cd9c0 [177.676][T2585409] R13: ff11000344b119c0 R14: ff110002e0508000 R15:dffffc0000000000 [177.687][T2585409] FS: 0000000000000000(0000) GS:ff11000fec880000(0000) knlGS:0000000000000000 [177.700][T2585409] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 [177.709][T2585409] CR2: 00007f06bc7b1978 CR3: 0000001021e86005 CR4:0000000000771ef0 [177.720][T2585409] DR0: 0000000000000000 DR1: 0000000000000000 DR2:0000000000000000 [177.731][T2585409] DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7:0000000000000400 [177.742][T2585409] PKRU: 55555554 [177.748][T2585409] Call Trace: [177.753][T2585409] <TASK> [177.759][T2585409] ? __die_body.cold+0x19/0x27 [177.766][T2585409] ? die+0x2e/0x50 [177.772][T2585409] ? do_trap+0x1ea/0x2d0 [177.779][T2585409] ? __list_del_entry_valid_or_report.cold+0x70/0x72 [177.788][T2585409] ? do_error_trap+0xa3/0x160 [177.795][T2585409] ? __list_del_entry_valid_or_report.cold+0x70/0x72 [177.805][T2585409] ? handle_invalid_op+0x2c/0x40 [177.812][T2585409] ? __list_del_entry_valid_or_report.cold+0x70/0x72 [177.820][T2585409] ? exc_invalid_op+0x2d/0x40 [177.827][T2585409] ? asm_exc_invalid_op+0x1a/0x20 [177.834][T2585409] ? __list_del_entry_valid_or_report.cold+0x70/0x72 [177.843][T2585409] btrfs_delete_unused_bgs+0x3d9/0x14c0 [btrfs] There is a similar retry_list code in btrfs_delete_unused_bgs(), but it is safe, AFAICS. Since the block group was in the unused list, the used bytes should be 0 when it was added to the unused list. Then, it checks block_group->{used,reserved,pinned} are still 0 under the block_group->lock. So, they should be still eligible for the unused list, not the reclaim list. The reason it is safe there it's because because we're holding space_info->groups_sem in write mode. That means no other task can allocate from the block group, so while we are at deleted_unused_bgs() it's not possible for other tasks to allocate and deallocate extents from the block group, so it can't be added to the unused list or the reclaim list by anyone else. The bug can be reproduced by btrfs/166 after a few rounds. In practice this can be hit when relocation cannot find more chunk space and ends with ENOSPC. Reported-by: Shinichiro Kawasaki <shinichiro.kawasaki@wdc.com> Suggested-by: Johannes Thumshirn <Johannes.Thumshirn@wdc.com> Fixes: 4eb4e85c4f81 ("btrfs: retry block group reclaim without infinite loop") CC: stable@vger.kernel.org # 5.15+ Reviewed-by: Filipe Manana <fdmanana@suse.com> Reviewed-by: Johannes Thumshirn <johannes.thumshirn@wdc.com> Reviewed-by: Qu Wenruo <wqu@suse.com> Signed-off-by: Naohiro Aota <naohiro.aota@wdc.com> Reviewed-by: David Sterba <dsterba@suse.com> Signed-off-by: David Sterba <dsterba@suse.com>
2024-07-01MAINTAINERS: change Pavel Begunkov from io_uring reviewer to maintainerJens Axboe
This more accurately describes Pavel's role for the project, so let's make the change to reflect that. Signed-off-by: Jens Axboe <axboe@kernel.dk>
2024-07-01selftests/bpf: Delete extra blank lines in test_sockmapZhu Jun
Delete extra blank lines inside of test_selftest(). Signed-off-by: Zhu Jun <zhujun2@cmss.chinamobile.com> Signed-off-by: Daniel Borkmann <daniel@iogearbox.net> Link: https://lore.kernel.org/bpf/20240627031905.7133-1-zhujun2@cmss.chinamobile.com
2024-07-01io_uring/msg_ring: use kmem_cache_free() to free requestJens Axboe
The change adding caching around the request allocated and freed for data messages changed a kmem_cache_free() to a kfree(), which isn't correct as the request came from slab in the first place. Fix that up and use the right freeing function if the cache is already at its limit. Note that the current mixing of kmem_cache_alloc and kfree is fine, but consistent alloc/free functions should be used as it's otherwise somewhat confusing. Fixes: 50cf5f3842af ("io_uring/msg_ring: add an alloc cache for io_kiocb entries") Signed-off-by: Jens Axboe <axboe@kernel.dk>
2024-07-01riscv, bpf: Use bpf_prog_pack for RV64 bpf trampolinePu Lehui
We used bpf_prog_pack to aggregate bpf programs into huge page to relieve the iTLB pressure on the system. We can apply it to bpf trampoline, as Song had been implemented it in core and x86 [0]. This patch is going to use bpf_prog_pack to RV64 bpf trampoline. Since Song and Puranjay have done a lot of work for bpf_prog_pack on RV64, implementing this function will be easy. Signed-off-by: Pu Lehui <pulehui@huawei.com> Signed-off-by: Daniel Borkmann <daniel@iogearbox.net> Tested-by: Björn Töpel <bjorn@rivosinc.com> #riscv Link: https://lore.kernel.org/all/20231206224054.492250-1-song@kernel.org [0] Link: https://lore.kernel.org/bpf/20240622030437.3973492-4-pulehui@huaweicloud.com
2024-07-01riscv, bpf: Fix out-of-bounds issue when preparing trampoline imagePu Lehui
We get the size of the trampoline image during the dry run phase and allocate memory based on that size. The allocated image will then be populated with instructions during the real patch phase. But after commit 26ef208c209a ("bpf: Use arch_bpf_trampoline_size"), the `im` argument is inconsistent in the dry run and real patch phase. This may cause emit_imm in RV64 to generate a different number of instructions when generating the 'im' address, potentially causing out-of-bounds issues. Let's emit the maximum number of instructions for the "im" address during dry run to fix this problem. Fixes: 26ef208c209a ("bpf: Use arch_bpf_trampoline_size") Signed-off-by: Pu Lehui <pulehui@huawei.com> Signed-off-by: Daniel Borkmann <daniel@iogearbox.net> Link: https://lore.kernel.org/bpf/20240622030437.3973492-3-pulehui@huaweicloud.com
2024-07-01bpf: Use precise image size for struct_ops trampolinePu Lehui
For trampoline using bpf_prog_pack, we need to generate a rw_image buffer with size of (image_end - image). For regular trampoline, we use the precise image size generated by arch_bpf_trampoline_size to allocate rw_image. But for struct_ops trampoline, we allocate rw_image directly using close to PAGE_SIZE size. We do not need to allocate for that much, as the patch size is usually much smaller than PAGE_SIZE. Let's use precise image size for it too. Signed-off-by: Pu Lehui <pulehui@huawei.com> Signed-off-by: Daniel Borkmann <daniel@iogearbox.net> Tested-by: Björn Töpel <bjorn@rivosinc.com> #riscv Acked-by: Song Liu <song@kernel.org> Link: https://lore.kernel.org/bpf/20240622030437.3973492-2-pulehui@huaweicloud.com
2024-07-01libbpf: Fix error handling in btf__distill_base()Alan Maguire
Coverity points out that after calling btf__new_empty_split() the wrong value is checked for error. Fixes: 58e185a0dc35 ("libbpf: Add btf__distill_base() creating split BTF with distilled base BTF") Reported-by: Andrii Nakryiko <andrii@kernel.org> Signed-off-by: Alan Maguire <alan.maguire@oracle.com> Signed-off-by: Daniel Borkmann <daniel@iogearbox.net> Link: https://lore.kernel.org/bpf/20240629100058.2866763-1-alan.maguire@oracle.com
2024-07-01selftests/bpf: Add selftest for bpf_xdp_flow_lookup kfuncLorenzo Bianconi
Introduce e2e selftest for bpf_xdp_flow_lookup kfunc through xdp_flowtable utility. Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Daniel Borkmann <daniel@iogearbox.net> Link: https://lore.kernel.org/bpf/b74393fb4539aecbbd5ac7883605f86a95fb0b6b.1719698275.git.lorenzo@kernel.org
2024-07-01netfilter: Add bpf_xdp_flow_lookup kfuncLorenzo Bianconi
Introduce bpf_xdp_flow_lookup kfunc in order to perform the lookup of a given flowtable entry based on a fib tuple of incoming traffic. bpf_xdp_flow_lookup can be used as building block to offload in xdp the processing of sw flowtable when hw flowtable is not available. Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Daniel Borkmann <daniel@iogearbox.net> Acked-by: Kumar Kartikeya Dwivedi <memxor@gmail.com> Acked-by: Pablo Neira Ayuso <pablo@netfilter.org> Link: https://lore.kernel.org/bpf/55d38a4e5856f6d1509d823ff4e98aaa6d356097.1719698275.git.lorenzo@kernel.org
2024-07-01netfilter: nf_tables: Add flowtable map for xdp offloadFlorian Westphal
This adds a small internal mapping table so that a new bpf (xdp) kfunc can perform lookups in a flowtable. As-is, xdp program has access to the device pointer, but no way to do a lookup in a flowtable -- there is no way to obtain the needed struct without questionable stunts. This allows to obtain an nf_flowtable pointer given a net_device structure. In order to keep backward compatibility, the infrastructure allows the user to add a given device to multiple flowtables, but it will always return the first added mapping performing the lookup since it assumes the right configuration is 1:1 mapping between flowtables and net_devices. Co-developed-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Florian Westphal <fw@strlen.de> Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Daniel Borkmann <daniel@iogearbox.net> Acked-by: Pablo Neira Ayuso <pablo@netfilter.org> Link: https://lore.kernel.org/bpf/9f20e2c36f494b3bf177328718367f636bb0b2ab.1719698275.git.lorenzo@kernel.org
2024-07-01io_uring/msg_ring: check for dead submitter taskJens Axboe
The change for improving the handling of the target CQE posting inadvertently dropped the NULL check for the submitter task on the target ring, reinstate that. Fixes: 0617bb500bfa ("io_uring/msg_ring: improve handling of target CQE posting") Reported-by: Pavel Begunkov <asml.silence@gmail.com> Signed-off-by: Jens Axboe <axboe@kernel.dk>
2024-07-01perf: imx_perf: add support for i.MX95 platformXu Yang
i.MX95 has a DDR PMU which is almostly same as i.MX93, it now supports read beat and write beat filter capabilities. This will add support for i.MX95 and enhance the driver to support specific filter handling for it. Usage: For read beat: ~# perf stat -a -I 1000 -e imx9_ddr0/eddrtq_pm_rd_beat_filt2,axi_mask=ID_MASK,axi_id=ID/ ~# perf stat -a -I 1000 -e imx9_ddr0/eddrtq_pm_rd_beat_filt1,axi_mask=ID_MASK,axi_id=ID/ ~# perf stat -a -I 1000 -e imx9_ddr0/eddrtq_pm_rd_beat_filt0,axi_mask=ID_MASK,axi_id=ID/ eg: For edma2: perf stat -a -I 1000 -e imx9_ddr0/eddrtq_pm_rd_beat_filt0,axi_mask=0x00f,axi_id=0x00c/ For write beat: ~# perf stat -a -I 1000 -e imx9_ddr0/eddrtq_pm_wr_beat_filt,axi_mask=ID_MASK,axi_id=ID/ eg: For edma2: perf stat -a -I 1000 -e imx9_ddr0/eddrtq_pm_wr_beat_filt,axi_mask=0x00f,axi_id=0x00c/ Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Xu Yang <xu.yang_2@nxp.com> Link: https://lore.kernel.org/r/20240529080358.703784-6-xu.yang_2@nxp.com Signed-off-by: Will Deacon <will@kernel.org>
2024-07-01perf: imx_perf: fix counter start and config sequenceXu Yang
In current driver, the counter will start firstly and then be configured. This sequence is not correct for AXI filter events since the correct AXI_MASK and AXI_ID are not set yet. Then the results may be inaccurate. Reviewed-by: Frank Li <Frank.Li@nxp.com> Fixes: 55691f99d417 ("drivers/perf: imx_ddr: Add support for NXP i.MX9 SoC DDRC PMU driver") cc: stable@vger.kernel.org Signed-off-by: Xu Yang <xu.yang_2@nxp.com> Link: https://lore.kernel.org/r/20240529080358.703784-5-xu.yang_2@nxp.com Signed-off-by: Will Deacon <will@kernel.org>
2024-07-01perf: imx_perf: refactor driver for imx93Xu Yang
This driver is initinally used to support imx93 Soc and now it's time to add support for imx95 Soc. However, some macro definitions and events are different on these two Socs. For preparing imx95 supports, this will refactor driver for imx93. Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Xu Yang <xu.yang_2@nxp.com> Link: https://lore.kernel.org/r/20240529080358.703784-4-xu.yang_2@nxp.com Signed-off-by: Will Deacon <will@kernel.org>
2024-07-01perf: imx_perf: let the driver manage the counter usage rather the userXu Yang
In current design, the user of perf app needs to input counter ID to count events. However, this is not user-friendly since the user needs to lookup the map table to find the counter. Instead of letting the user to input the counter, let this driver to manage the counters in this patch. This will be implemented by: 1. allocate counter 0 for cycle event. 2. find unused counter from 1-10 for reference events. 3. allocate specific counter for counter-specific events. In this patch, counter attr will be kept for back-compatible but all the value passed down by counter=<n> will be ignored. To mark counter-specific events, counter ID will be encoded into perf_pmu_events_attr.id. Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Xu Yang <xu.yang_2@nxp.com> Link: https://lore.kernel.org/r/20240529080358.703784-3-xu.yang_2@nxp.com Signed-off-by: Will Deacon <will@kernel.org>
2024-07-01perf: imx_perf: add macro definitions for parsing config attrXu Yang
The user can set event and counter in cmdline and the driver need to parse it using 'config' attr value. This will add macro definitions to avoid hard-code in driver. Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Xu Yang <xu.yang_2@nxp.com> Link: https://lore.kernel.org/r/20240529080358.703784-2-xu.yang_2@nxp.com Signed-off-by: Will Deacon <will@kernel.org>
2024-07-01dt-bindings: perf: fsl-imx-ddr: Add i.MX95 compatibleXu Yang
i.MX95 has a DDR pmu. This will add a compatible for it. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Xu Yang <xu.yang_2@nxp.com> Link: https://lore.kernel.org/r/20240529080358.703784-1-xu.yang_2@nxp.com Signed-off-by: Will Deacon <will@kernel.org>
2024-07-01arm64: dts: imx8mm-verdin: add TPM deviceVitor Soares
Add TPM device found on Verdin iMX8M Mini PID4 0090 variant. While adding the node, rename `pinctrl_pmic_tpm_ena` to `pinctrl_tpm_spi_cs`. Signed-off-by: Vitor Soares <vitor.soares@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-07-01arm64: dts: imx8mp-evk: Add audio XCVR sound cardShengjiu Wang
Add audio XCVR sound card, which supports SPDIF TX & RX, eARC RX, ARC RX functions. HDMI_HPD is shared with the HDMI module so use pinctrl_hog. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-07-01arm64: dts: imx8mp: Add audio XCVR device nodeShengjiu Wang
XCVR (Audio Transceiver) is a on-chip functional module found on i.MX8MP. It supports HDMI2.1 eARC, HDMI1.4 ARC and SPDIF. The reset controller is provided by the audio block control driver. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>